Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s3c2412/s3c2412.c |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 2 | * |
| 3 | * Copyright (c) 2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * http://armlinux.simtec.co.uk/. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/types.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/timer.h> |
| 18 | #include <linux/init.h> |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 19 | #include <linux/clk.h> |
Ben Dooks | eca8c24 | 2007-05-28 18:19:16 +0100 | [diff] [blame] | 20 | #include <linux/delay.h> |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 21 | #include <linux/device.h> |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 22 | #include <linux/syscore_ops.h> |
Ben Dooks | b6d1f54 | 2006-12-17 23:22:26 +0100 | [diff] [blame] | 23 | #include <linux/serial_core.h> |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 24 | #include <linux/platform_device.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 25 | #include <linux/io.h> |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 26 | |
| 27 | #include <asm/mach/arch.h> |
| 28 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/irq.h> |
| 30 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 31 | #include <mach/hardware.h> |
Ben Dooks | c84cbb2 | 2006-09-14 13:29:15 +0100 | [diff] [blame] | 32 | #include <asm/proc-fns.h> |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 33 | #include <asm/irq.h> |
| 34 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 35 | #include <mach/idle.h> |
Ben Dooks | c84cbb2 | 2006-09-14 13:29:15 +0100 | [diff] [blame] | 36 | |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 37 | #include <plat/cpu-freq.h> |
| 38 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 39 | #include <mach/regs-clock.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 40 | #include <plat/regs-serial.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 41 | #include <mach/regs-power.h> |
| 42 | #include <mach/regs-gpio.h> |
| 43 | #include <mach/regs-gpioj.h> |
| 44 | #include <mach/regs-dsc.h> |
Ben Dooks | 1362270 | 2008-10-30 10:14:38 +0000 | [diff] [blame] | 45 | #include <plat/regs-spi.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 46 | #include <mach/regs-s3c2412.h> |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 47 | |
Ben Dooks | d5120ae | 2008-10-07 23:09:51 +0100 | [diff] [blame] | 48 | #include <plat/s3c2412.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 49 | #include <plat/cpu.h> |
| 50 | #include <plat/devs.h> |
Ben Dooks | d5120ae | 2008-10-07 23:09:51 +0100 | [diff] [blame] | 51 | #include <plat/clock.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 52 | #include <plat/pm.h> |
Ben Dooks | e24b864 | 2008-10-21 14:06:34 +0100 | [diff] [blame] | 53 | #include <plat/pll.h> |
Atul Dahiya | ef3f2dd | 2010-10-18 19:56:45 +0900 | [diff] [blame] | 54 | #include <plat/nand-core.h> |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 55 | |
| 56 | #ifndef CONFIG_CPU_S3C2412_ONLY |
| 57 | void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; |
Ben Dooks | 50dedf1 | 2006-09-18 10:19:06 +0100 | [diff] [blame] | 58 | |
| 59 | static inline void s3c2412_init_gpio2(void) |
| 60 | { |
| 61 | s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10; |
| 62 | } |
| 63 | #else |
| 64 | #define s3c2412_init_gpio2() do { } while(0) |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 65 | #endif |
| 66 | |
| 67 | /* Initial IO mappings */ |
| 68 | |
| 69 | static struct map_desc s3c2412_iodesc[] __initdata = { |
| 70 | IODESC_ENT(CLKPWR), |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 71 | IODESC_ENT(TIMER), |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 72 | IODESC_ENT(WATCHDOG), |
Ben Dooks | 2540003 | 2009-07-30 23:23:36 +0100 | [diff] [blame] | 73 | { |
| 74 | .virtual = (unsigned long)S3C2412_VA_SSMC, |
| 75 | .pfn = __phys_to_pfn(S3C2412_PA_SSMC), |
| 76 | .length = SZ_1M, |
| 77 | .type = MT_DEVICE, |
| 78 | }, |
| 79 | { |
| 80 | .virtual = (unsigned long)S3C2412_VA_EBI, |
| 81 | .pfn = __phys_to_pfn(S3C2412_PA_EBI), |
| 82 | .length = SZ_1M, |
| 83 | .type = MT_DEVICE, |
| 84 | }, |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 85 | }; |
| 86 | |
| 87 | /* uart registration process */ |
| 88 | |
| 89 | void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
| 90 | { |
| 91 | s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no); |
| 92 | |
| 93 | /* rename devices that are s3c2412/s3c2413 specific */ |
| 94 | s3c_device_sdi.name = "s3c2412-sdi"; |
Ben Dooks | 72d70d0 | 2006-09-20 20:46:09 +0100 | [diff] [blame] | 95 | s3c_device_lcd.name = "s3c2412-lcd"; |
Atul Dahiya | ef3f2dd | 2010-10-18 19:56:45 +0900 | [diff] [blame] | 96 | s3c_nand_setname("s3c2412-nand"); |
Sandeep Sanjay Patil | e903382 | 2007-05-16 10:51:45 +0100 | [diff] [blame] | 97 | |
Ben Dooks | f3fb5a5 | 2007-10-04 21:41:20 +0100 | [diff] [blame] | 98 | /* alter IRQ of SDI controller */ |
| 99 | |
| 100 | s3c_device_sdi.resource[1].start = IRQ_S3C2412_SDI; |
| 101 | s3c_device_sdi.resource[1].end = IRQ_S3C2412_SDI; |
| 102 | |
Sandeep Sanjay Patil | e903382 | 2007-05-16 10:51:45 +0100 | [diff] [blame] | 103 | /* spi channel related changes, s3c2412/13 specific */ |
| 104 | s3c_device_spi0.name = "s3c2412-spi"; |
| 105 | s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24; |
| 106 | s3c_device_spi1.name = "s3c2412-spi"; |
| 107 | s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1; |
| 108 | s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24; |
| 109 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 110 | } |
| 111 | |
Ben Dooks | c84cbb2 | 2006-09-14 13:29:15 +0100 | [diff] [blame] | 112 | /* s3c2412_idle |
| 113 | * |
| 114 | * use the standard idle call by ensuring the idle mode |
| 115 | * in power config, then issuing the idle co-processor |
| 116 | * instruction |
| 117 | */ |
| 118 | |
| 119 | static void s3c2412_idle(void) |
| 120 | { |
| 121 | unsigned long tmp; |
| 122 | |
| 123 | /* ensure our idle mode is to go to idle */ |
| 124 | |
| 125 | tmp = __raw_readl(S3C2412_PWRCFG); |
| 126 | tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK; |
| 127 | tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE; |
| 128 | __raw_writel(tmp, S3C2412_PWRCFG); |
| 129 | |
| 130 | cpu_do_idle(); |
| 131 | } |
| 132 | |
Heiko Stuebner | 5753897 | 2011-12-22 23:37:44 +0100 | [diff] [blame] | 133 | void s3c2412_restart(char mode, const char *cmd) |
Ben Dooks | eca8c24 | 2007-05-28 18:19:16 +0100 | [diff] [blame] | 134 | { |
Heiko Stuebner | 5753897 | 2011-12-22 23:37:44 +0100 | [diff] [blame] | 135 | if (mode == 's') |
| 136 | soft_restart(0); |
| 137 | |
Ben Dooks | eca8c24 | 2007-05-28 18:19:16 +0100 | [diff] [blame] | 138 | /* errata "Watch-dog/Software Reset Problem" specifies that |
| 139 | * this reset must be done with the SYSCLK sourced from |
| 140 | * EXTCLK instead of FOUT to avoid a glitch in the reset |
| 141 | * mechanism. |
| 142 | * |
| 143 | * See the watchdog section of the S3C2412 manual for more |
| 144 | * information on this fix. |
| 145 | */ |
| 146 | |
| 147 | __raw_writel(0x00, S3C2412_CLKSRC); |
| 148 | __raw_writel(S3C2412_SWRST_RESET, S3C2412_SWRST); |
| 149 | |
| 150 | mdelay(1); |
| 151 | } |
| 152 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 153 | /* s3c2412_map_io |
| 154 | * |
| 155 | * register the standard cpu IO areas, and any passed in from the |
| 156 | * machine specific initialisation. |
| 157 | */ |
| 158 | |
Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 159 | void __init s3c2412_map_io(void) |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 160 | { |
| 161 | /* move base of IO */ |
| 162 | |
Ben Dooks | 50dedf1 | 2006-09-18 10:19:06 +0100 | [diff] [blame] | 163 | s3c2412_init_gpio2(); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 164 | |
Ben Dooks | c84cbb2 | 2006-09-14 13:29:15 +0100 | [diff] [blame] | 165 | /* set our idle function */ |
| 166 | |
| 167 | s3c24xx_idle = s3c2412_idle; |
| 168 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 169 | /* register our io-tables */ |
| 170 | |
| 171 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 172 | } |
| 173 | |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 174 | void __init_or_cpufreq s3c2412_setup_clocks(void) |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 175 | { |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 176 | struct clk *xtal_clk; |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 177 | unsigned long tmp; |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 178 | unsigned long xtal; |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 179 | unsigned long fclk; |
| 180 | unsigned long hclk; |
| 181 | unsigned long pclk; |
| 182 | |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 183 | xtal_clk = clk_get(NULL, "xtal"); |
| 184 | xtal = clk_get_rate(xtal_clk); |
| 185 | clk_put(xtal_clk); |
| 186 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 187 | /* now we've got our machine bits initialised, work out what |
| 188 | * clocks we've got */ |
| 189 | |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 190 | fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 191 | |
Ben Dooks | cca851d | 2008-01-28 13:01:30 +0100 | [diff] [blame] | 192 | clk_mpll.rate = fclk; |
| 193 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 194 | tmp = __raw_readl(S3C2410_CLKDIVN); |
| 195 | |
| 196 | /* work out clock scalings */ |
| 197 | |
| 198 | hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); |
Ben Dooks | 1017be8 | 2008-04-16 00:08:36 +0100 | [diff] [blame] | 199 | hclk /= ((tmp & S3C2412_CLKDIVN_ARMDIVN) ? 2 : 1); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 200 | pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); |
| 201 | |
| 202 | /* print brieft summary of clocks, etc */ |
| 203 | |
| 204 | printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", |
| 205 | print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); |
| 206 | |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 207 | s3c24xx_setup_clocks(fclk, hclk, pclk); |
| 208 | } |
| 209 | |
| 210 | void __init s3c2412_init_clocks(int xtal) |
| 211 | { |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 212 | /* initialise the clocks here, to allow other things like the |
| 213 | * console to use them |
| 214 | */ |
| 215 | |
Ben Dooks | e425382 | 2008-10-21 14:06:38 +0100 | [diff] [blame] | 216 | s3c24xx_register_baseclocks(xtal); |
| 217 | s3c2412_setup_clocks(); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 218 | s3c2412_baseclk_add(); |
| 219 | } |
| 220 | |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 221 | /* need to register the subsystem before we actually register the device, and |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 222 | * we also need to ensure that it has been initialised before any of the |
| 223 | * drivers even try to use it (even if not on an s3c2412 based system) |
| 224 | * as a driver which may support both 2410 and 2440 may try and use it. |
| 225 | */ |
| 226 | |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 227 | struct bus_type s3c2412_subsys = { |
Kay Sievers | af5ca3f | 2007-12-20 02:09:39 +0100 | [diff] [blame] | 228 | .name = "s3c2412-core", |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 229 | .dev_name = "s3c2412-core", |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 230 | }; |
| 231 | |
| 232 | static int __init s3c2412_core_init(void) |
| 233 | { |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 234 | return subsys_system_register(&s3c2412_subsys, NULL); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | core_initcall(s3c2412_core_init); |
| 238 | |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 239 | static struct device s3c2412_dev = { |
| 240 | .bus = &s3c2412_subsys, |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 241 | }; |
| 242 | |
| 243 | int __init s3c2412_init(void) |
| 244 | { |
| 245 | printk("S3C2412: Initialising architecture\n"); |
| 246 | |
Domenico Andreoli | fb630b9 | 2011-10-22 04:00:53 +0900 | [diff] [blame] | 247 | #ifdef CONFIG_PM |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 248 | register_syscore_ops(&s3c2412_pm_syscore_ops); |
Domenico Andreoli | fb630b9 | 2011-10-22 04:00:53 +0900 | [diff] [blame] | 249 | #endif |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 250 | register_syscore_ops(&s3c24xx_irq_syscore_ops); |
| 251 | |
Kay Sievers | 4a858cf | 2011-12-21 16:01:38 -0800 | [diff] [blame] | 252 | return device_register(&s3c2412_dev); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 253 | } |