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Stephen Rothwellda80d462005-11-03 15:14:36 +11001#ifndef _ASM_POWERPC_PTRACE_H
2#define _ASM_POWERPC_PTRACE_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This struct defines the way the registers are stored on the
8 * kernel stack during a system call or other kernel entry.
9 *
10 * this should only contain volatile regs
11 * since we can keep non-volatile in the thread_struct
12 * should set this up when only volatiles are saved
13 * by intr code.
14 *
15 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
16 * that the overall structure is a multiple of 16 bytes in length.
17 *
18 * Note that the offsets of the fields in this struct correspond with
Stephen Rothwellda80d462005-11-03 15:14:36 +110019 * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version
24 * 2 of the License, or (at your option) any later version.
25 */
26
Dave Kleikamp3162d922010-02-08 11:51:05 +000027#include <linux/types.h>
Dave Kleikamp3162d922010-02-08 11:51:05 +000028
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#ifndef __ASSEMBLY__
Anton Blancharda0987222005-09-10 16:01:08 +100030
Linus Torvalds1da177e2005-04-16 15:20:36 -070031struct pt_regs {
Anton Blancharda0987222005-09-10 16:01:08 +100032 unsigned long gpr[32];
33 unsigned long nip;
34 unsigned long msr;
Stephen Rothwellda80d462005-11-03 15:14:36 +110035 unsigned long orig_gpr3; /* Used for restarting system calls */
Anton Blancharda0987222005-09-10 16:01:08 +100036 unsigned long ctr;
37 unsigned long link;
38 unsigned long xer;
39 unsigned long ccr;
Stephen Rothwellda80d462005-11-03 15:14:36 +110040#ifdef __powerpc64__
41 unsigned long softe; /* Soft enabled/disabled */
42#else
43 unsigned long mq; /* 601 only (not used at present) */
44 /* Used on APUS to hold IPL value. */
45#endif
46 unsigned long trap; /* Reason for being here */
47 /* N.B. for critical exceptions on 4xx, the dar and dsisr
48 fields are overloaded to hold srr0 and srr1. */
49 unsigned long dar; /* Fault registers */
50 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
51 unsigned long result; /* Result of a system call */
Linus Torvalds1da177e2005-04-16 15:20:36 -070052};
53
Stephen Rothwellda80d462005-11-03 15:14:36 +110054#endif /* __ASSEMBLY__ */
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Anton Blancharda0987222005-09-10 16:01:08 +100056#ifdef __KERNEL__
57
Stephen Rothwellda80d462005-11-03 15:14:36 +110058#ifdef __powerpc64__
Anton Blancharda0987222005-09-10 16:01:08 +100059
60#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +100061#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
62#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
63#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
64 STACK_FRAME_OVERHEAD + 288)
65#define STACK_FRAME_MARKER 12
Anton Blancharda0987222005-09-10 16:01:08 +100066
67/* Size of dummy stack frame allocated when calling signal handler. */
68#define __SIGNAL_FRAMESIZE 128
69#define __SIGNAL_FRAMESIZE32 64
70
Stephen Rothwellda80d462005-11-03 15:14:36 +110071#else /* __powerpc64__ */
72
73#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +100074#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
75#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
76#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
77#define STACK_FRAME_MARKER 2
Stephen Rothwellda80d462005-11-03 15:14:36 +110078
79/* Size of stack frame allocated when calling signal handler. */
80#define __SIGNAL_FRAMESIZE 64
81
82#endif /* __powerpc64__ */
83
84#ifndef __ASSEMBLY__
85
86#define instruction_pointer(regs) ((regs)->nip)
Roland McGrathf1ba1282008-07-27 16:51:35 +100087#define user_stack_pointer(regs) ((regs)->gpr[1])
Mahesh Salgaonkar359e4282010-04-07 18:10:20 +100088#define kernel_stack_pointer(regs) ((regs)->gpr[1])
Eric Parisd7e75282012-01-03 14:23:06 -050089static inline int is_syscall_success(struct pt_regs *regs)
90{
91 return !(regs->ccr & 0x10000000);
92}
93
94static inline long regs_return_value(struct pt_regs *regs)
95{
96 if (is_syscall_success(regs))
97 return regs->gpr[3];
98 else
99 return -regs->gpr[3];
100}
Ananth N Mavinakayanahallib3f827c2006-10-02 02:17:31 -0700101
Stephen Rothwellda80d462005-11-03 15:14:36 +1100102#ifdef CONFIG_SMP
103extern unsigned long profile_pc(struct pt_regs *regs);
104#else
105#define profile_pc(regs) instruction_pointer(regs)
106#endif
107
108#ifdef __powerpc64__
109#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
110#else
111#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
112#endif
113
114#define force_successful_syscall_return() \
115 do { \
David Woodhouse401d1f02005-11-15 18:52:18 +0000116 set_thread_flag(TIF_NOERROR); \
Stephen Rothwellda80d462005-11-03 15:14:36 +1100117 } while(0)
118
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000119struct task_struct;
120extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
121extern int ptrace_put_reg(struct task_struct *task, int regno,
122 unsigned long data);
123
Stephen Rothwellda80d462005-11-03 15:14:36 +1100124/*
125 * We use the least-significant bit of the trap field to indicate
126 * whether we have saved the full set of registers, or only a
127 * partial set. A 1 there means the partial set.
128 * On 4xx we use the next bit to indicate whether the exception
129 * is a critical exception (1 means it is).
130 */
131#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
132#ifndef __powerpc64__
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100133#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
134#define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
Kumar Gala663276b2008-04-30 20:44:53 +1000135#define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0)
Stephen Rothwellda80d462005-11-03 15:14:36 +1100136#endif /* ! __powerpc64__ */
137#define TRAP(regs) ((regs)->trap & ~0xF)
138#ifdef __powerpc64__
Mike Wolfa71f5d52011-03-21 11:14:53 +1100139#define NV_REG_POISON 0xdeadbeefdeadbeefUL
Stephen Rothwellda80d462005-11-03 15:14:36 +1100140#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
141#else
Mike Wolfa71f5d52011-03-21 11:14:53 +1100142#define NV_REG_POISON 0xdeadbeef
Stephen Rothwellda80d462005-11-03 15:14:36 +1100143#define CHECK_FULL_REGS(regs) \
144do { \
145 if ((regs)->trap & 1) \
Harvey Harrison653c0312008-10-20 16:00:08 -0700146 printk(KERN_CRIT "%s: partial register set\n", __func__); \
Stephen Rothwellda80d462005-11-03 15:14:36 +1100147} while (0)
148#endif /* __powerpc64__ */
149
Roland McGrath2a84b0d2008-01-30 13:30:51 +0100150#define arch_has_single_step() (1)
Roland McGrathec097c82009-05-28 21:26:38 +0000151#define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601))
Oleg Nesterov25baa352009-12-15 16:47:18 -0800152#define ARCH_HAS_USER_SINGLE_STEP_INFO
153
Mahesh Salgaonkar359e4282010-04-07 18:10:20 +1000154/*
155 * kprobe-based event tracer support
156 */
157
158#include <linux/stddef.h>
159#include <linux/thread_info.h>
160extern int regs_query_register_offset(const char *name);
161extern const char *regs_query_register_name(unsigned int offset);
162#define MAX_REG_OFFSET (offsetof(struct pt_regs, dsisr))
163
164/**
165 * regs_get_register() - get register value from its offset
166 * @regs: pt_regs from which register value is gotten
167 * @offset: offset number of the register.
168 *
169 * regs_get_register returns the value of a register whose offset from @regs.
170 * The @offset is the offset of the register in struct pt_regs.
171 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
172 */
173static inline unsigned long regs_get_register(struct pt_regs *regs,
174 unsigned int offset)
175{
176 if (unlikely(offset > MAX_REG_OFFSET))
177 return 0;
178 return *(unsigned long *)((unsigned long)regs + offset);
179}
180
181/**
182 * regs_within_kernel_stack() - check the address in the stack
183 * @regs: pt_regs which contains kernel stack pointer.
184 * @addr: address which is checked.
185 *
186 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
187 * If @addr is within the kernel stack, it returns true. If not, returns false.
188 */
189
190static inline bool regs_within_kernel_stack(struct pt_regs *regs,
191 unsigned long addr)
192{
193 return ((addr & ~(THREAD_SIZE - 1)) ==
194 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
195}
196
197/**
198 * regs_get_kernel_stack_nth() - get Nth entry of the stack
199 * @regs: pt_regs which contains kernel stack pointer.
200 * @n: stack entry number.
201 *
202 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
203 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
204 * this returns 0.
205 */
206static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
207 unsigned int n)
208{
209 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
210 addr += n;
211 if (regs_within_kernel_stack(regs, (unsigned long)addr))
212 return *addr;
213 else
214 return 0;
215}
216
Stephen Rothwellda80d462005-11-03 15:14:36 +1100217#endif /* __ASSEMBLY__ */
218
219#endif /* __KERNEL__ */
220
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221/*
222 * Offsets used by 'ptrace' system call interface.
Stephen Rothwellda80d462005-11-03 15:14:36 +1100223 * These can't be changed without breaking binary compatibility
224 * with MkLinux, etc.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 */
226#define PT_R0 0
227#define PT_R1 1
228#define PT_R2 2
229#define PT_R3 3
230#define PT_R4 4
231#define PT_R5 5
232#define PT_R6 6
233#define PT_R7 7
234#define PT_R8 8
235#define PT_R9 9
236#define PT_R10 10
237#define PT_R11 11
238#define PT_R12 12
239#define PT_R13 13
240#define PT_R14 14
241#define PT_R15 15
242#define PT_R16 16
243#define PT_R17 17
244#define PT_R18 18
245#define PT_R19 19
246#define PT_R20 20
247#define PT_R21 21
248#define PT_R22 22
249#define PT_R23 23
250#define PT_R24 24
251#define PT_R25 25
252#define PT_R26 26
253#define PT_R27 27
254#define PT_R28 28
255#define PT_R29 29
256#define PT_R30 30
257#define PT_R31 31
258
259#define PT_NIP 32
260#define PT_MSR 33
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261#define PT_ORIG_R3 34
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262#define PT_CTR 35
263#define PT_LNK 36
264#define PT_XER 37
265#define PT_CCR 38
Stephen Rothwellda80d462005-11-03 15:14:36 +1100266#ifndef __powerpc64__
267#define PT_MQ 39
268#else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269#define PT_SOFTE 39
Benjamin Herrenschmidte17666b2007-06-04 15:15:43 +1000270#endif
Anton Blancharda0987222005-09-10 16:01:08 +1000271#define PT_TRAP 40
272#define PT_DAR 41
273#define PT_DSISR 42
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274#define PT_RESULT 43
Benjamin Herrenschmidte17666b2007-06-04 15:15:43 +1000275#define PT_REGS_COUNT 44
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276
Stephen Rothwellda80d462005-11-03 15:14:36 +1100277#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278
Stephen Rothwellda80d462005-11-03 15:14:36 +1100279#ifndef __powerpc64__
280
281#define PT_FPR31 (PT_FPR0 + 2*31)
282#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
283
284#else /* __powerpc64__ */
285
Anton Blancharda0987222005-09-10 16:01:08 +1000286#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
288#ifdef __KERNEL__
Anton Blancharda0987222005-09-10 16:01:08 +1000289#define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290#endif
291
292#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
293#define PT_VSCR (PT_VR0 + 32*2 + 1)
294#define PT_VRSAVE (PT_VR0 + 33*2)
295
296#ifdef __KERNEL__
297#define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
298#define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
299#define PT_VRSAVE_32 (PT_VR0 + 33*4)
300#endif
301
Michael Neulingce48b212008-06-25 14:07:18 +1000302/*
303 * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
304 */
305#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
306#define PT_VSR31 (PT_VSR0 + 2*31)
307#ifdef __KERNEL__
308#define PT_VSR0_32 300 /* each VSR reg occupies 4 slots in 32-bit */
309#endif
Stephen Rothwellda80d462005-11-03 15:14:36 +1100310#endif /* __powerpc64__ */
311
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312/*
Stephen Rothwellda80d462005-11-03 15:14:36 +1100313 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
314 * The transfer totals 34 quadword. Quadwords 0-31 contain the
315 * corresponding vector registers. Quadword 32 contains the vscr as the
316 * last word (offset 12) within that quadword. Quadword 33 contains the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 * vrsave as the first word (offset 0) within the quadword.
318 *
Stephen Rothwellda80d462005-11-03 15:14:36 +1100319 * This definition of the VMX state is compatible with the current PPC32
320 * ptrace interface. This allows signal handling and ptrace to use the same
321 * structures. This also simplifies the implementation of a bi-arch
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 * (combined (32- and 64-bit) gdb.
323 */
324#define PTRACE_GETVRREGS 18
325#define PTRACE_SETVRREGS 19
326
Stephen Rothwellda80d462005-11-03 15:14:36 +1100327/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
328 * spefscr, in one go */
329#define PTRACE_GETEVRREGS 20
330#define PTRACE_SETEVRREGS 21
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331
Michael Neulingce48b212008-06-25 14:07:18 +1000332/* Get the first 32 128bit VSX registers */
333#define PTRACE_GETVSRREGS 27
334#define PTRACE_SETVSRREGS 28
335
Anton Blancharda94d3082005-09-10 16:01:10 +1000336/*
337 * Get or set a debug register. The first 16 are DABR registers and the
338 * second 16 are IABR registers.
339 */
340#define PTRACE_GET_DEBUGREG 25
341#define PTRACE_SET_DEBUGREG 26
342
Benjamin Herrenschmidte17666b2007-06-04 15:15:43 +1000343/* (new) PTRACE requests using the same numbers as x86 and the same
344 * argument ordering. Additionally, they support more registers too
345 */
346#define PTRACE_GETREGS 12
347#define PTRACE_SETREGS 13
348#define PTRACE_GETFPREGS 14
349#define PTRACE_SETFPREGS 15
350#define PTRACE_GETREGS64 22
351#define PTRACE_SETREGS64 23
352
353/* (old) PTRACE requests with inverted arguments */
Anton Blancharda0987222005-09-10 16:01:08 +1000354#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
355#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
356#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
357#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
358
359/* Calls to trace a 64bit program from a 32bit program */
360#define PPC_PTRACE_PEEKTEXT_3264 0x95
361#define PPC_PTRACE_PEEKDATA_3264 0x94
362#define PPC_PTRACE_POKETEXT_3264 0x93
363#define PPC_PTRACE_POKEDATA_3264 0x92
364#define PPC_PTRACE_PEEKUSR_3264 0x91
365#define PPC_PTRACE_POKEUSR_3264 0x90
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366
Roland McGrathec097c82009-05-28 21:26:38 +0000367#define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */
368
Dave Kleikamp3162d922010-02-08 11:51:05 +0000369#define PPC_PTRACE_GETHWDBGINFO 0x89
370#define PPC_PTRACE_SETHWDEBUG 0x88
371#define PPC_PTRACE_DELHWDEBUG 0x87
372
373#ifndef __ASSEMBLY__
374
375struct ppc_debug_info {
Sam Ravnborgbf236902010-05-09 08:52:31 +0200376 __u32 version; /* Only version 1 exists to date */
377 __u32 num_instruction_bps;
378 __u32 num_data_bps;
379 __u32 num_condition_regs;
380 __u32 data_bp_alignment;
381 __u32 sizeof_condition; /* size of the DVC register */
382 __u64 features;
Dave Kleikamp3162d922010-02-08 11:51:05 +0000383};
384
385#endif /* __ASSEMBLY__ */
386
387/*
388 * features will have bits indication whether there is support for:
389 */
390#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x0000000000000001
391#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x0000000000000002
392#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x0000000000000004
393#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x0000000000000008
394
395#ifndef __ASSEMBLY__
396
397struct ppc_hw_breakpoint {
Sam Ravnborgbf236902010-05-09 08:52:31 +0200398 __u32 version; /* currently, version must be 1 */
399 __u32 trigger_type; /* only some combinations allowed */
400 __u32 addr_mode; /* address match mode */
401 __u32 condition_mode; /* break/watchpoint condition flags */
402 __u64 addr; /* break/watchpoint address */
403 __u64 addr2; /* range end or mask */
404 __u64 condition_value; /* contents of the DVC register */
Dave Kleikamp3162d922010-02-08 11:51:05 +0000405};
406
407#endif /* __ASSEMBLY__ */
408
409/*
410 * Trigger Type
411 */
412#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x00000001
413#define PPC_BREAKPOINT_TRIGGER_READ 0x00000002
414#define PPC_BREAKPOINT_TRIGGER_WRITE 0x00000004
415#define PPC_BREAKPOINT_TRIGGER_RW \
416 (PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
417
418/*
419 * Address Mode
420 */
421#define PPC_BREAKPOINT_MODE_EXACT 0x00000000
422#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x00000001
423#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x00000002
424#define PPC_BREAKPOINT_MODE_MASK 0x00000003
425
426/*
427 * Condition Mode
428 */
429#define PPC_BREAKPOINT_CONDITION_MODE 0x00000003
430#define PPC_BREAKPOINT_CONDITION_NONE 0x00000000
431#define PPC_BREAKPOINT_CONDITION_AND 0x00000001
432#define PPC_BREAKPOINT_CONDITION_EXACT PPC_BREAKPOINT_CONDITION_AND
433#define PPC_BREAKPOINT_CONDITION_OR 0x00000002
434#define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003
435#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
436#define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
437#define PPC_BREAKPOINT_CONDITION_BE(n) \
438 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
439
Stephen Rothwellda80d462005-11-03 15:14:36 +1100440#endif /* _ASM_POWERPC_PTRACE_H */