blob: 6dfd4ab97b2aaf2e6982de227dd17e403dce7d24 [file] [log] [blame]
Thomas Petazzoni27432822014-11-21 17:00:08 +01001/*
2 * Board-level suspend/resume support.
3 *
4 * Copyright (C) 2014 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/delay.h>
14#include <linux/gpio.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/of_gpio.h>
20#include <linux/slab.h>
21#include "common.h"
22
23#define ARMADA_XP_GP_PIC_NR_GPIOS 3
24
25static void __iomem *gpio_ctrl;
26static int pic_gpios[ARMADA_XP_GP_PIC_NR_GPIOS];
27static int pic_raw_gpios[ARMADA_XP_GP_PIC_NR_GPIOS];
28
29static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
30{
31 u32 reg, ackcmd;
32 int i;
33
34 /* Put 001 as value on the GPIOs */
35 reg = readl(gpio_ctrl);
36 for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
37 reg &= ~BIT(pic_raw_gpios[i]);
38 reg |= BIT(pic_raw_gpios[0]);
39 writel(reg, gpio_ctrl);
40
41 /* Prepare writing 111 to the GPIOs */
42 ackcmd = readl(gpio_ctrl);
43 for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
44 ackcmd |= BIT(pic_raw_gpios[i]);
45
46 /*
47 * Wait a while, the PIC needs quite a bit of time between the
48 * two GPIO commands.
49 */
50 mdelay(3000);
51
52 asm volatile (
53 /* Align to a cache line */
54 ".balign 32\n\t"
55
56 /* Enter self refresh */
57 "str %[srcmd], [%[sdram_reg]]\n\t"
58
59 /*
60 * Wait 100 cycles for DDR to enter self refresh, by
61 * doing 50 times two instructions.
62 */
63 "mov r1, #50\n\t"
64 "1: subs r1, r1, #1\n\t"
65 "bne 1b\n\t"
66
67 /* Issue the command ACK */
68 "str %[ackcmd], [%[gpio_ctrl]]\n\t"
69
70 /* Trap the processor */
71 "b .\n\t"
72 : : [srcmd] "r" (srcmd), [sdram_reg] "r" (sdram_reg),
73 [ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1");
74}
75
76static int mvebu_armada_xp_gp_pm_init(void)
77{
78 struct device_node *np;
79 struct device_node *gpio_ctrl_np;
80 int ret = 0, i;
81
82 if (!of_machine_is_compatible("marvell,axp-gp"))
83 return -ENODEV;
84
85 np = of_find_node_by_name(NULL, "pm_pic");
86 if (!np)
87 return -ENODEV;
88
89 for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++) {
90 char *name;
91 struct of_phandle_args args;
92
93 pic_gpios[i] = of_get_named_gpio(np, "ctrl-gpios", i);
94 if (pic_gpios[i] < 0) {
95 ret = -ENODEV;
96 goto out;
97 }
98
99 name = kasprintf(GFP_KERNEL, "pic-pin%d", i);
100 if (!name) {
101 ret = -ENOMEM;
102 goto out;
103 }
104
105 ret = gpio_request(pic_gpios[i], name);
106 if (ret < 0) {
107 kfree(name);
108 goto out;
109 }
110
111 ret = gpio_direction_output(pic_gpios[i], 0);
112 if (ret < 0) {
113 gpio_free(pic_gpios[i]);
114 kfree(name);
115 goto out;
116 }
117
118 ret = of_parse_phandle_with_fixed_args(np, "ctrl-gpios", 2,
119 i, &args);
120 if (ret < 0) {
121 gpio_free(pic_gpios[i]);
122 kfree(name);
123 goto out;
124 }
125
126 gpio_ctrl_np = args.np;
127 pic_raw_gpios[i] = args.args[0];
128 }
129
130 gpio_ctrl = of_iomap(gpio_ctrl_np, 0);
131 if (!gpio_ctrl)
132 return -ENOMEM;
133
134 mvebu_pm_init(mvebu_armada_xp_gp_pm_enter);
135
136out:
137 of_node_put(np);
138 return ret;
139}
140
141late_initcall(mvebu_armada_xp_gp_pm_init);