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Vladimir Barinov83f53222007-07-10 13:10:04 +01001/*
Kevin Hilman5526b3f2009-04-14 09:50:37 -05002 * Utility to set the DAVINCI MUX register from a table in mux.h
Vladimir Barinov83f53222007-07-10 13:10:04 +01003 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 *
Kevin Hilman5526b3f2009-04-14 09:50:37 -05006 * Based on linux/arch/arm/plat-omap/mux.c:
7 * Copyright (C) 2003 - 2005 Nokia Corporation
8 *
9 * Written by Tony Lindgren
10 *
Vladimir Barinov83f53222007-07-10 13:10:04 +010011 * 2007 (c) MontaVista Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
14 * or implied.
Kevin Hilman5526b3f2009-04-14 09:50:37 -050015 *
16 * Copyright (C) 2008 Texas Instruments.
Vladimir Barinov83f53222007-07-10 13:10:04 +010017 */
18#include <linux/io.h>
Kevin Hilman5526b3f2009-04-14 09:50:37 -050019#include <linux/module.h>
Vladimir Barinov83f53222007-07-10 13:10:04 +010020#include <linux/spinlock.h>
21
Russell Kinga09e64f2008-08-05 16:14:15 +010022#include <mach/mux.h>
Mark A. Greer0e585952009-04-15 12:39:48 -070023#include <mach/common.h>
Kevin Hilman5526b3f2009-04-14 09:50:37 -050024
25/*
26 * Sets the DAVINCI MUX register based on the table
27 */
28int __init_or_module davinci_cfg_reg(const unsigned long index)
29{
30 static DEFINE_SPINLOCK(mux_spin_lock);
Mark A. Greer0e585952009-04-15 12:39:48 -070031 struct davinci_soc_info *soc_info = &davinci_soc_info;
32 void __iomem *base = soc_info->pinmux_base;
Kevin Hilman5526b3f2009-04-14 09:50:37 -050033 unsigned long flags;
34 const struct mux_config *cfg;
35 unsigned int reg_orig = 0, reg = 0;
36 unsigned int mask, warn = 0;
37
Mark A. Greer0e585952009-04-15 12:39:48 -070038 if (!soc_info->pinmux_pins)
Kevin Hilman5526b3f2009-04-14 09:50:37 -050039 BUG();
40
Mark A. Greer0e585952009-04-15 12:39:48 -070041 if (index >= soc_info->pinmux_pins_num) {
Kevin Hilman5526b3f2009-04-14 09:50:37 -050042 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
Mark A. Greer0e585952009-04-15 12:39:48 -070043 index, soc_info->pinmux_pins_num);
Kevin Hilman5526b3f2009-04-14 09:50:37 -050044 dump_stack();
45 return -ENODEV;
Vladimir Barinov83f53222007-07-10 13:10:04 +010046 }
47
Mark A. Greer0e585952009-04-15 12:39:48 -070048 cfg = &soc_info->pinmux_pins[index];
Kevin Hilman5526b3f2009-04-14 09:50:37 -050049
50 if (cfg->name == NULL) {
51 printk(KERN_ERR "No entry for the specified index\n");
52 return -ENODEV;
53 }
54
55 /* Update the mux register in question */
56 if (cfg->mask) {
57 unsigned tmp1, tmp2;
58
59 spin_lock_irqsave(&mux_spin_lock, flags);
60 reg_orig = __raw_readl(base + cfg->mux_reg);
61
62 mask = (cfg->mask << cfg->mask_offset);
63 tmp1 = reg_orig & mask;
64 reg = reg_orig & ~mask;
65
66 tmp2 = (cfg->mode << cfg->mask_offset);
67 reg |= tmp2;
68
69 if (tmp1 != tmp2)
70 warn = 1;
71
72 __raw_writel(reg, base + cfg->mux_reg);
73 spin_unlock_irqrestore(&mux_spin_lock, flags);
74 }
75
76 if (warn) {
77#ifdef CONFIG_DAVINCI_MUX_WARNINGS
78 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
79#endif
80 }
81
82#ifdef CONFIG_DAVINCI_MUX_DEBUG
83 if (cfg->debug || warn) {
84 printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
85 printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n",
86 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
87 }
88#endif
89
90 return 0;
Vladimir Barinov83f53222007-07-10 13:10:04 +010091}
Kevin Hilman5526b3f2009-04-14 09:50:37 -050092EXPORT_SYMBOL(davinci_cfg_reg);
Sudhakar Rajashekharac96b56c2009-07-16 05:45:32 -040093
94int da8xx_pinmux_setup(const short pins[])
95{
96 int i, error = -EINVAL;
97
98 if (pins)
99 for (i = 0; pins[i] >= 0; i++) {
100 error = davinci_cfg_reg(pins[i]);
101 if (error)
102 break;
103 }
104
105 return error;
106}