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Tomoya MORINAGA49a36792011-01-12 17:00:22 -08001/*
2 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
16 */
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/gpio.h>
20
21#define PCI_VENDOR_ID_ROHM 0x10DB
22
23struct ioh_reg_comn {
24 u32 ien;
25 u32 istatus;
26 u32 idisp;
27 u32 iclr;
28 u32 imask;
29 u32 imaskclr;
30 u32 po;
31 u32 pi;
32 u32 pm;
33 u32 im_0;
34 u32 im_1;
35 u32 reserved;
36};
37
38struct ioh_regs {
39 struct ioh_reg_comn regs[8];
40 u32 reserve1[16];
41 u32 ioh_sel_reg[4];
42 u32 reserve2[11];
43 u32 srst;
44};
45
46/**
47 * struct ioh_gpio_reg_data - The register store data.
48 * @po_reg: To store contents of PO register.
49 * @pm_reg: To store contents of PM register.
50 */
51struct ioh_gpio_reg_data {
52 u32 po_reg;
53 u32 pm_reg;
54};
55
56/**
57 * struct ioh_gpio - GPIO private data structure.
58 * @base: PCI base address of Memory mapped I/O register.
59 * @reg: Memory mapped IOH GPIO register list.
60 * @dev: Pointer to device structure.
61 * @gpio: Data for GPIO infrastructure.
62 * @ioh_gpio_reg: Memory mapped Register data is saved here
63 * when suspend.
64 * @ch: Indicate GPIO channel
65 */
66struct ioh_gpio {
67 void __iomem *base;
68 struct ioh_regs __iomem *reg;
69 struct device *dev;
70 struct gpio_chip gpio;
71 struct ioh_gpio_reg_data ioh_gpio_reg;
72 struct mutex lock;
73 int ch;
74};
75
76static const int num_ports[] = {6, 12, 16, 16, 15, 16, 16, 12};
77
78static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
79{
80 u32 reg_val;
81 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
82
83 mutex_lock(&chip->lock);
84 reg_val = ioread32(&chip->reg->regs[chip->ch].po);
85 if (val)
86 reg_val |= (1 << nr);
87 else
88 reg_val &= ~(1 << nr);
89
90 iowrite32(reg_val, &chip->reg->regs[chip->ch].po);
91 mutex_unlock(&chip->lock);
92}
93
94static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr)
95{
96 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
97
98 return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr);
99}
100
101static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
102 int val)
103{
104 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
105 u32 pm;
106 u32 reg_val;
107
108 mutex_lock(&chip->lock);
109 pm = ioread32(&chip->reg->regs[chip->ch].pm) &
110 ((1 << num_ports[chip->ch]) - 1);
111 pm |= (1 << nr);
112 iowrite32(pm, &chip->reg->regs[chip->ch].pm);
113
114 reg_val = ioread32(&chip->reg->regs[chip->ch].po);
115 if (val)
116 reg_val |= (1 << nr);
117 else
118 reg_val &= ~(1 << nr);
Peter Tyserba438612011-03-24 18:17:14 -0500119 iowrite32(reg_val, &chip->reg->regs[chip->ch].po);
Tomoya MORINAGA49a36792011-01-12 17:00:22 -0800120
121 mutex_unlock(&chip->lock);
122
123 return 0;
124}
125
126static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
127{
128 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
129 u32 pm;
130
131 mutex_lock(&chip->lock);
132 pm = ioread32(&chip->reg->regs[chip->ch].pm) &
133 ((1 << num_ports[chip->ch]) - 1);
134 pm &= ~(1 << nr);
135 iowrite32(pm, &chip->reg->regs[chip->ch].pm);
136 mutex_unlock(&chip->lock);
137
138 return 0;
139}
140
141/*
142 * Save register configuration and disable interrupts.
143 */
144static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip)
145{
146 chip->ioh_gpio_reg.po_reg = ioread32(&chip->reg->regs[chip->ch].po);
147 chip->ioh_gpio_reg.pm_reg = ioread32(&chip->reg->regs[chip->ch].pm);
148}
149
150/*
151 * This function restores the register configuration of the GPIO device.
152 */
153static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip)
154{
155 /* to store contents of PO register */
156 iowrite32(chip->ioh_gpio_reg.po_reg, &chip->reg->regs[chip->ch].po);
157 /* to store contents of PM register */
158 iowrite32(chip->ioh_gpio_reg.pm_reg, &chip->reg->regs[chip->ch].pm);
159}
160
161static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port)
162{
163 struct gpio_chip *gpio = &chip->gpio;
164
165 gpio->label = dev_name(chip->dev);
166 gpio->owner = THIS_MODULE;
167 gpio->direction_input = ioh_gpio_direction_input;
168 gpio->get = ioh_gpio_get;
169 gpio->direction_output = ioh_gpio_direction_output;
170 gpio->set = ioh_gpio_set;
171 gpio->dbg_show = NULL;
172 gpio->base = -1;
173 gpio->ngpio = num_port;
174 gpio->can_sleep = 0;
175}
176
177static int __devinit ioh_gpio_probe(struct pci_dev *pdev,
178 const struct pci_device_id *id)
179{
180 int ret;
181 int i;
182 struct ioh_gpio *chip;
183 void __iomem *base;
184 void __iomem *chip_save;
185
186 ret = pci_enable_device(pdev);
187 if (ret) {
188 dev_err(&pdev->dev, "%s : pci_enable_device failed", __func__);
189 goto err_pci_enable;
190 }
191
192 ret = pci_request_regions(pdev, KBUILD_MODNAME);
193 if (ret) {
194 dev_err(&pdev->dev, "pci_request_regions failed-%d", ret);
195 goto err_request_regions;
196 }
197
198 base = pci_iomap(pdev, 1, 0);
199 if (base == 0) {
200 dev_err(&pdev->dev, "%s : pci_iomap failed", __func__);
201 ret = -ENOMEM;
202 goto err_iomap;
203 }
204
205 chip_save = kzalloc(sizeof(*chip) * 8, GFP_KERNEL);
206 if (chip_save == NULL) {
207 dev_err(&pdev->dev, "%s : kzalloc failed", __func__);
208 ret = -ENOMEM;
209 goto err_kzalloc;
210 }
211
212 chip = chip_save;
213 for (i = 0; i < 8; i++, chip++) {
214 chip->dev = &pdev->dev;
215 chip->base = base;
216 chip->reg = chip->base;
217 chip->ch = i;
218 mutex_init(&chip->lock);
219 ioh_gpio_setup(chip, num_ports[i]);
220 ret = gpiochip_add(&chip->gpio);
221 if (ret) {
222 dev_err(&pdev->dev, "IOH gpio: Failed to register GPIO\n");
223 goto err_gpiochip_add;
224 }
225 }
226
227 chip = chip_save;
228 pci_set_drvdata(pdev, chip);
229
230 return 0;
231
232err_gpiochip_add:
233 for (; i != 0; i--) {
234 chip--;
235 ret = gpiochip_remove(&chip->gpio);
236 if (ret)
237 dev_err(&pdev->dev, "Failed gpiochip_remove(%d)\n", i);
238 }
239 kfree(chip_save);
240
241err_kzalloc:
242 pci_iounmap(pdev, base);
243
244err_iomap:
245 pci_release_regions(pdev);
246
247err_request_regions:
248 pci_disable_device(pdev);
249
250err_pci_enable:
251
252 dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret);
253 return ret;
254}
255
256static void __devexit ioh_gpio_remove(struct pci_dev *pdev)
257{
258 int err;
259 int i;
260 struct ioh_gpio *chip = pci_get_drvdata(pdev);
261 void __iomem *chip_save;
262
263 chip_save = chip;
264 for (i = 0; i < 8; i++, chip++) {
265 err = gpiochip_remove(&chip->gpio);
266 if (err)
267 dev_err(&pdev->dev, "Failed gpiochip_remove\n");
268 }
269
270 chip = chip_save;
271 pci_iounmap(pdev, chip->base);
272 pci_release_regions(pdev);
273 pci_disable_device(pdev);
274 kfree(chip);
275}
276
277#ifdef CONFIG_PM
278static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state)
279{
280 s32 ret;
281 struct ioh_gpio *chip = pci_get_drvdata(pdev);
282
283 ioh_gpio_save_reg_conf(chip);
284 ioh_gpio_restore_reg_conf(chip);
285
286 ret = pci_save_state(pdev);
287 if (ret) {
288 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret);
289 return ret;
290 }
291 pci_disable_device(pdev);
292 pci_set_power_state(pdev, PCI_D0);
293 ret = pci_enable_wake(pdev, PCI_D0, 1);
294 if (ret)
295 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret);
296
297 return 0;
298}
299
300static int ioh_gpio_resume(struct pci_dev *pdev)
301{
302 s32 ret;
303 struct ioh_gpio *chip = pci_get_drvdata(pdev);
304
305 ret = pci_enable_wake(pdev, PCI_D0, 0);
306
307 pci_set_power_state(pdev, PCI_D0);
308 ret = pci_enable_device(pdev);
309 if (ret) {
310 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret);
311 return ret;
312 }
313 pci_restore_state(pdev);
314
315 iowrite32(0x01, &chip->reg->srst);
316 iowrite32(0x00, &chip->reg->srst);
317 ioh_gpio_restore_reg_conf(chip);
318
319 return 0;
320}
321#else
322#define ioh_gpio_suspend NULL
323#define ioh_gpio_resume NULL
324#endif
325
326static DEFINE_PCI_DEVICE_TABLE(ioh_gpio_pcidev_id) = {
327 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) },
328 { 0, }
329};
Axel Lin19234cd2011-03-11 14:58:30 -0800330MODULE_DEVICE_TABLE(pci, ioh_gpio_pcidev_id);
Tomoya MORINAGA49a36792011-01-12 17:00:22 -0800331
332static struct pci_driver ioh_gpio_driver = {
333 .name = "ml_ioh_gpio",
334 .id_table = ioh_gpio_pcidev_id,
335 .probe = ioh_gpio_probe,
336 .remove = __devexit_p(ioh_gpio_remove),
337 .suspend = ioh_gpio_suspend,
338 .resume = ioh_gpio_resume
339};
340
341static int __init ioh_gpio_pci_init(void)
342{
343 return pci_register_driver(&ioh_gpio_driver);
344}
345module_init(ioh_gpio_pci_init);
346
347static void __exit ioh_gpio_pci_exit(void)
348{
349 pci_unregister_driver(&ioh_gpio_driver);
350}
351module_exit(ioh_gpio_pci_exit);
352
353MODULE_DESCRIPTION("OKI SEMICONDUCTOR ML-IOH series GPIO Driver");
354MODULE_LICENSE("GPL");