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Daniel Macka3819342009-03-09 02:13:17 +01001/*
2 * AK4104 ALSA SoC (ASoC) driver
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090013#include <linux/slab.h>
Daniel Macka3819342009-03-09 02:13:17 +010014#include <sound/core.h>
15#include <sound/soc.h>
16#include <sound/initval.h>
17#include <linux/spi/spi.h>
18#include <sound/asoundef.h>
19
Daniel Macka3819342009-03-09 02:13:17 +010020/* AK4104 registers addresses */
21#define AK4104_REG_CONTROL1 0x00
22#define AK4104_REG_RESERVED 0x01
23#define AK4104_REG_CONTROL2 0x02
24#define AK4104_REG_TX 0x03
25#define AK4104_REG_CHN_STATUS(x) ((x) + 0x04)
26#define AK4104_NUM_REGS 10
27
28#define AK4104_REG_MASK 0x1f
29#define AK4104_READ 0xc0
30#define AK4104_WRITE 0xe0
31#define AK4104_RESERVED_VAL 0x5b
32
33/* Bit masks for AK4104 registers */
34#define AK4104_CONTROL1_RSTN (1 << 0)
35#define AK4104_CONTROL1_PW (1 << 1)
36#define AK4104_CONTROL1_DIF0 (1 << 2)
37#define AK4104_CONTROL1_DIF1 (1 << 3)
38
39#define AK4104_CONTROL2_SEL0 (1 << 0)
40#define AK4104_CONTROL2_SEL1 (1 << 1)
41#define AK4104_CONTROL2_MODE (1 << 2)
42
43#define AK4104_TX_TXE (1 << 0)
44#define AK4104_TX_V (1 << 1)
45
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000046#define DRV_NAME "ak4104-codec"
Daniel Macka3819342009-03-09 02:13:17 +010047
48struct ak4104_private {
Mark Brown2901d6e2012-02-17 12:14:18 -080049 struct regmap *regmap;
Daniel Macka3819342009-03-09 02:13:17 +010050};
51
Daniel Macka3819342009-03-09 02:13:17 +010052static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
53 unsigned int format)
54{
55 struct snd_soc_codec *codec = codec_dai->codec;
56 int val = 0;
Mark Brown2901d6e2012-02-17 12:14:18 -080057 int ret;
Daniel Macka3819342009-03-09 02:13:17 +010058
Daniel Macka3819342009-03-09 02:13:17 +010059 /* set DAI format */
60 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
61 case SND_SOC_DAIFMT_RIGHT_J:
62 break;
63 case SND_SOC_DAIFMT_LEFT_J:
64 val |= AK4104_CONTROL1_DIF0;
65 break;
66 case SND_SOC_DAIFMT_I2S:
67 val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1;
68 break;
69 default:
70 dev_err(codec->dev, "invalid dai format\n");
71 return -EINVAL;
72 }
73
74 /* This device can only be slave */
75 if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
76 return -EINVAL;
77
Mark Brownafad95f2012-02-17 12:04:41 -080078 ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
79 AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1,
80 val);
81 if (ret < 0)
82 return ret;
83
84 return 0;
Daniel Macka3819342009-03-09 02:13:17 +010085}
86
87static int ak4104_hw_params(struct snd_pcm_substream *substream,
88 struct snd_pcm_hw_params *params,
89 struct snd_soc_dai *dai)
90{
91 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000092 struct snd_soc_codec *codec = rtd->codec;
Daniel Macka3819342009-03-09 02:13:17 +010093 int val = 0;
94
95 /* set the IEC958 bits: consumer mode, no copyright bit */
96 val |= IEC958_AES0_CON_NOT_COPYRIGHT;
Mark Brown34baf222012-02-17 12:05:51 -080097 snd_soc_write(codec, AK4104_REG_CHN_STATUS(0), val);
Daniel Macka3819342009-03-09 02:13:17 +010098
99 val = 0;
100
101 switch (params_rate(params)) {
102 case 44100:
103 val |= IEC958_AES3_CON_FS_44100;
104 break;
105 case 48000:
106 val |= IEC958_AES3_CON_FS_48000;
107 break;
108 case 32000:
109 val |= IEC958_AES3_CON_FS_32000;
110 break;
111 default:
112 dev_err(codec->dev, "unsupported sampling rate\n");
113 return -EINVAL;
114 }
115
Mark Brown34baf222012-02-17 12:05:51 -0800116 return snd_soc_write(codec, AK4104_REG_CHN_STATUS(3), val);
Daniel Macka3819342009-03-09 02:13:17 +0100117}
118
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100119static const struct snd_soc_dai_ops ak4101_dai_ops = {
Mark Brown65ec1cd2009-03-11 16:51:31 +0000120 .hw_params = ak4104_hw_params,
121 .set_fmt = ak4104_set_dai_fmt,
122};
123
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000124static struct snd_soc_dai_driver ak4104_dai = {
125 .name = "ak4104-hifi",
Daniel Macka3819342009-03-09 02:13:17 +0100126 .playback = {
127 .stream_name = "Playback",
128 .channels_min = 2,
129 .channels_max = 2,
Daniel Mack617b14c2010-01-13 11:25:05 +0100130 .rates = SNDRV_PCM_RATE_8000_192000,
Daniel Macka3819342009-03-09 02:13:17 +0100131 .formats = SNDRV_PCM_FMTBIT_S16_LE |
132 SNDRV_PCM_FMTBIT_S24_3LE |
133 SNDRV_PCM_FMTBIT_S24_LE
134 },
Mark Brown65ec1cd2009-03-11 16:51:31 +0000135 .ops = &ak4101_dai_ops,
Daniel Macka3819342009-03-09 02:13:17 +0100136};
137
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000138static int ak4104_probe(struct snd_soc_codec *codec)
139{
140 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
Mark Brown2901d6e2012-02-17 12:14:18 -0800141 int ret;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000142
Mark Brown2901d6e2012-02-17 12:14:18 -0800143 codec->control_data = ak4104->regmap;
144 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
145 if (ret != 0)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000146 return ret;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000147
148 /* set power-up and non-reset bits */
Mark Brownafad95f2012-02-17 12:04:41 -0800149 ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
150 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN,
151 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000152 if (ret < 0)
153 return ret;
154
155 /* enable transmitter */
Mark Brownafad95f2012-02-17 12:04:41 -0800156 ret = snd_soc_update_bits(codec, AK4104_REG_TX,
157 AK4104_TX_TXE, AK4104_TX_TXE);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000158 if (ret < 0)
159 return ret;
160
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000161 return 0;
162}
163
164static int ak4104_remove(struct snd_soc_codec *codec)
165{
Mark Brownafad95f2012-02-17 12:04:41 -0800166 snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
167 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 0);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000168
Mark Brownafad95f2012-02-17 12:04:41 -0800169 return 0;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000170}
171
172static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
173 .probe = ak4104_probe,
174 .remove = ak4104_remove,
Mark Brown2901d6e2012-02-17 12:14:18 -0800175};
176
177static const struct regmap_config ak4104_regmap = {
178 .reg_bits = 8,
179 .val_bits = 8,
180
181 .max_register = AK4104_NUM_REGS - 1,
182 .read_flag_mask = AK4104_READ,
183 .write_flag_mask = AK4104_WRITE,
184
185 .cache_type = REGCACHE_RBTREE,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000186};
Daniel Macka3819342009-03-09 02:13:17 +0100187
188static int ak4104_spi_probe(struct spi_device *spi)
189{
Daniel Macka3819342009-03-09 02:13:17 +0100190 struct ak4104_private *ak4104;
Mark Brown2901d6e2012-02-17 12:14:18 -0800191 unsigned int val;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000192 int ret;
Daniel Macka3819342009-03-09 02:13:17 +0100193
194 spi->bits_per_word = 8;
195 spi->mode = SPI_MODE_0;
196 ret = spi_setup(spi);
197 if (ret < 0)
198 return ret;
199
Axel Lin3922d512011-12-20 14:37:12 +0800200 ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private),
201 GFP_KERNEL);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000202 if (ak4104 == NULL)
Daniel Macka3819342009-03-09 02:13:17 +0100203 return -ENOMEM;
Daniel Macka3819342009-03-09 02:13:17 +0100204
Mark Brown2901d6e2012-02-17 12:14:18 -0800205 ak4104->regmap = regmap_init_spi(spi, &ak4104_regmap);
206 if (IS_ERR(ak4104->regmap)) {
207 ret = PTR_ERR(ak4104->regmap);
208 return ret;
209 }
210
211 /* read the 'reserved' register - according to the datasheet, it
212 * should contain 0x5b. Not a good way to verify the presence of
213 * the device, but there is no hardware ID register. */
214 ret = regmap_read(ak4104->regmap, AK4104_REG_RESERVED, &val);
215 if (ret != 0)
216 goto err;
217 if (val != AK4104_RESERVED_VAL) {
218 ret = -ENODEV;
219 goto err;
220 }
221
Daniel Macka3819342009-03-09 02:13:17 +0100222 spi_set_drvdata(spi, ak4104);
Daniel Macka3819342009-03-09 02:13:17 +0100223
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000224 ret = snd_soc_register_codec(&spi->dev,
225 &soc_codec_device_ak4104, &ak4104_dai, 1);
Mark Brown2901d6e2012-02-17 12:14:18 -0800226 if (ret != 0)
227 goto err;
228
229 return 0;
230
231err:
232 regmap_exit(ak4104->regmap);
Daniel Macka3819342009-03-09 02:13:17 +0100233 return ret;
234}
235
236static int __devexit ak4104_spi_remove(struct spi_device *spi)
237{
Mark Brown2901d6e2012-02-17 12:14:18 -0800238 struct ak4104_private *ak4101 = spi_get_drvdata(spi);
239 regmap_exit(ak4101->regmap);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000240 snd_soc_unregister_codec(&spi->dev);
Daniel Macka3819342009-03-09 02:13:17 +0100241 return 0;
242}
243
Daniel Macka3819342009-03-09 02:13:17 +0100244static struct spi_driver ak4104_spi_driver = {
245 .driver = {
246 .name = DRV_NAME,
247 .owner = THIS_MODULE,
248 },
249 .probe = ak4104_spi_probe,
250 .remove = __devexit_p(ak4104_spi_remove),
251};
252
Mark Brown38d78ba2012-02-16 22:50:35 -0800253module_spi_driver(ak4104_spi_driver);
Daniel Macka3819342009-03-09 02:13:17 +0100254
255MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
256MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
257MODULE_LICENSE("GPL");
258