blob: 900d14562de85a67d8caefa098c3257effbc7587 [file] [log] [blame]
Sascha Hauer29693242012-03-15 10:04:35 +01001/*
2 * simple driver for PWM (Pulse Width Modulator) controller
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/slab.h>
15#include <linux/err.h>
16#include <linux/clk.h>
17#include <linux/io.h>
18#include <linux/pwm.h>
19#include <mach/hardware.h>
20
21
22/* i.MX1 and i.MX21 share the same PWM function block: */
23
24#define MX1_PWMC 0x00 /* PWM Control Register */
25#define MX1_PWMS 0x04 /* PWM Sample Register */
26#define MX1_PWMP 0x08 /* PWM Period Register */
27
28
29/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
30
31#define MX3_PWMCR 0x00 /* PWM Control Register */
32#define MX3_PWMSAR 0x0C /* PWM Sample Register */
33#define MX3_PWMPR 0x10 /* PWM Period Register */
34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
35#define MX3_PWMCR_DOZEEN (1 << 24)
36#define MX3_PWMCR_WAITEN (1 << 23)
37#define MX3_PWMCR_DBGEN (1 << 22)
38#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
39#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
40#define MX3_PWMCR_EN (1 << 0)
41
42struct imx_chip {
43 struct clk *clk;
44
45 int clk_enabled;
46 void __iomem *mmio_base;
47
48 struct pwm_chip chip;
49};
50
51#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
52
53static int imx_pwm_config(struct pwm_chip *chip,
54 struct pwm_device *pwm, int duty_ns, int period_ns)
55{
56 struct imx_chip *imx = to_imx_chip(chip);
57
58 if (!(cpu_is_mx1() || cpu_is_mx21())) {
59 unsigned long long c;
60 unsigned long period_cycles, duty_cycles, prescale;
61 u32 cr;
62
63 c = clk_get_rate(imx->clk);
64 c = c * period_ns;
65 do_div(c, 1000000000);
66 period_cycles = c;
67
68 prescale = period_cycles / 0x10000 + 1;
69
70 period_cycles /= prescale;
71 c = (unsigned long long)period_cycles * duty_ns;
72 do_div(c, period_ns);
73 duty_cycles = c;
74
75 /*
76 * according to imx pwm RM, the real period value should be
77 * PERIOD value in PWMPR plus 2.
78 */
79 if (period_cycles > 2)
80 period_cycles -= 2;
81 else
82 period_cycles = 0;
83
84 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
85 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
86
87 cr = MX3_PWMCR_PRESCALER(prescale) |
88 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
89 MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
90
91 if (cpu_is_mx25())
92 cr |= MX3_PWMCR_CLKSRC_IPG;
93 else
94 cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
95
96 writel(cr, imx->mmio_base + MX3_PWMCR);
97 } else if (cpu_is_mx1() || cpu_is_mx21()) {
98 /* The PWM subsystem allows for exact frequencies. However,
99 * I cannot connect a scope on my device to the PWM line and
100 * thus cannot provide the program the PWM controller
101 * exactly. Instead, I'm relying on the fact that the
102 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
103 * function group already. So I'll just modify the PWM sample
104 * register to follow the ratio of duty_ns vs. period_ns
105 * accordingly.
106 *
107 * This is good enough for programming the brightness of
108 * the LCD backlight.
109 *
110 * The real implementation would divide PERCLK[0] first by
111 * both the prescaler (/1 .. /128) and then by CLKSEL
112 * (/2 .. /16).
113 */
114 u32 max = readl(imx->mmio_base + MX1_PWMP);
115 u32 p = max * duty_ns / period_ns;
116 writel(max - p, imx->mmio_base + MX1_PWMS);
117 } else {
118 BUG();
119 }
120
121 return 0;
122}
123
124static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
125{
126 struct imx_chip *imx = to_imx_chip(chip);
127 int rc = 0;
128
129 if (!imx->clk_enabled) {
130 rc = clk_prepare_enable(imx->clk);
131 if (!rc)
132 imx->clk_enabled = 1;
133 }
134 return rc;
135}
136
137static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
138{
139 struct imx_chip *imx = to_imx_chip(chip);
140
141 writel(0, imx->mmio_base + MX3_PWMCR);
142
143 if (imx->clk_enabled) {
144 clk_disable_unprepare(imx->clk);
145 imx->clk_enabled = 0;
146 }
147}
148
149static struct pwm_ops imx_pwm_ops = {
150 .enable = imx_pwm_enable,
151 .disable = imx_pwm_disable,
152 .config = imx_pwm_config,
153 .owner = THIS_MODULE,
154};
155
156static int __devinit imx_pwm_probe(struct platform_device *pdev)
157{
158 struct imx_chip *imx;
159 struct resource *r;
160 int ret = 0;
161
162 imx = kzalloc(sizeof(*imx), GFP_KERNEL);
163 if (imx == NULL) {
164 dev_err(&pdev->dev, "failed to allocate memory\n");
165 return -ENOMEM;
166 }
167
168 imx->clk = clk_get(&pdev->dev, "pwm");
169
170 if (IS_ERR(imx->clk)) {
171 ret = PTR_ERR(imx->clk);
172 goto err_free;
173 }
174
175 imx->chip.ops = &imx_pwm_ops;
176 imx->chip.dev = &pdev->dev;
177 imx->chip.base = -1;
178 imx->chip.npwm = 1;
179
180 imx->clk_enabled = 0;
181
182 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
183 if (r == NULL) {
184 dev_err(&pdev->dev, "no memory resource defined\n");
185 ret = -ENODEV;
186 goto err_free_clk;
187 }
188
189 r = request_mem_region(r->start, resource_size(r), pdev->name);
190 if (r == NULL) {
191 dev_err(&pdev->dev, "failed to request memory resource\n");
192 ret = -EBUSY;
193 goto err_free_clk;
194 }
195
196 imx->mmio_base = ioremap(r->start, resource_size(r));
197 if (imx->mmio_base == NULL) {
198 dev_err(&pdev->dev, "failed to ioremap() registers\n");
199 ret = -ENODEV;
200 goto err_free_mem;
201 }
202
203 ret = pwmchip_add(&imx->chip);
204 if (ret < 0)
205 goto err_iounmap;
206
207 platform_set_drvdata(pdev, imx);
208 return 0;
209
210err_iounmap:
211 iounmap(imx->mmio_base);
212err_free_mem:
213 release_mem_region(r->start, resource_size(r));
214err_free_clk:
215 clk_put(imx->clk);
216err_free:
217 kfree(imx);
218 return ret;
219}
220
221static int __devexit imx_pwm_remove(struct platform_device *pdev)
222{
223 struct imx_chip *imx;
224 struct resource *r;
225 int ret;
226
227 imx = platform_get_drvdata(pdev);
228 if (imx == NULL)
229 return -ENODEV;
230
231 ret = pwmchip_remove(&imx->chip);
232 if (ret)
233 return ret;
234
235 iounmap(imx->mmio_base);
236
237 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
238 release_mem_region(r->start, resource_size(r));
239
240 clk_put(imx->clk);
241
242 kfree(imx);
243 return 0;
244}
245
246static struct platform_driver imx_pwm_driver = {
247 .driver = {
248 .name = "mxc_pwm",
249 },
250 .probe = imx_pwm_probe,
251 .remove = __devexit_p(imx_pwm_remove),
252};
253
254static int __init imx_pwm_init(void)
255{
256 return platform_driver_register(&imx_pwm_driver);
257}
258arch_initcall(imx_pwm_init);
259
260static void __exit imx_pwm_exit(void)
261{
262 platform_driver_unregister(&imx_pwm_driver);
263}
264module_exit(imx_pwm_exit);
265
266MODULE_LICENSE("GPL v2");
267MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");