AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * QTI Crypto Engine driver API |
| 3 | * |
| 4 | * Copyright (c) 2010-2017, The Linux Foundation. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 and |
| 8 | * only version 2 as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | |
| 17 | #ifndef __CRYPTO_MSM_QCE_H |
| 18 | #define __CRYPTO_MSM_QCE_H |
| 19 | |
| 20 | #include <linux/types.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/crypto.h> |
| 23 | |
| 24 | #include <crypto/algapi.h> |
| 25 | #include <crypto/aes.h> |
| 26 | #include <crypto/des.h> |
| 27 | #include <crypto/sha.h> |
| 28 | #include <crypto/aead.h> |
| 29 | #include <crypto/authenc.h> |
| 30 | #include <crypto/scatterwalk.h> |
| 31 | |
| 32 | /* SHA digest size in bytes */ |
| 33 | #define SHA256_DIGESTSIZE 32 |
| 34 | #define SHA1_DIGESTSIZE 20 |
| 35 | |
| 36 | #define AES_CE_BLOCK_SIZE 16 |
| 37 | |
| 38 | /* key size in bytes */ |
| 39 | #define HMAC_KEY_SIZE (SHA1_DIGESTSIZE) /* hmac-sha1 */ |
| 40 | #define SHA_HMAC_KEY_SIZE 64 |
| 41 | #define DES_KEY_SIZE 8 |
| 42 | #define TRIPLE_DES_KEY_SIZE 24 |
| 43 | #define AES128_KEY_SIZE 16 |
| 44 | #define AES192_KEY_SIZE 24 |
| 45 | #define AES256_KEY_SIZE 32 |
| 46 | #define MAX_CIPHER_KEY_SIZE AES256_KEY_SIZE |
| 47 | |
| 48 | /* iv length in bytes */ |
| 49 | #define AES_IV_LENGTH 16 |
| 50 | #define DES_IV_LENGTH 8 |
| 51 | #define MAX_IV_LENGTH AES_IV_LENGTH |
| 52 | |
| 53 | /* Maximum number of bytes per transfer */ |
| 54 | #define QCE_MAX_OPER_DATA 0xFF00 |
| 55 | |
| 56 | /* Maximum Nonce bytes */ |
| 57 | #define MAX_NONCE 16 |
| 58 | |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 59 | /* Crypto clock control flags */ |
| 60 | #define QCE_CLK_ENABLE_FIRST 1 |
| 61 | #define QCE_BW_REQUEST_FIRST 2 |
| 62 | #define QCE_CLK_DISABLE_FIRST 3 |
| 63 | #define QCE_BW_REQUEST_RESET_FIRST 4 |
| 64 | |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 65 | typedef void (*qce_comp_func_ptr_t)(void *areq, |
| 66 | unsigned char *icv, unsigned char *iv, int ret); |
| 67 | |
| 68 | /* Cipher algorithms supported */ |
| 69 | enum qce_cipher_alg_enum { |
| 70 | CIPHER_ALG_DES = 0, |
| 71 | CIPHER_ALG_3DES = 1, |
| 72 | CIPHER_ALG_AES = 2, |
| 73 | CIPHER_ALG_LAST |
| 74 | }; |
| 75 | |
| 76 | /* Hash and hmac algorithms supported */ |
| 77 | enum qce_hash_alg_enum { |
| 78 | QCE_HASH_SHA1 = 0, |
| 79 | QCE_HASH_SHA256 = 1, |
| 80 | QCE_HASH_SHA1_HMAC = 2, |
| 81 | QCE_HASH_SHA256_HMAC = 3, |
| 82 | QCE_HASH_AES_CMAC = 4, |
| 83 | QCE_HASH_LAST |
| 84 | }; |
| 85 | |
| 86 | /* Cipher encryption/decryption operations */ |
| 87 | enum qce_cipher_dir_enum { |
| 88 | QCE_ENCRYPT = 0, |
| 89 | QCE_DECRYPT = 1, |
| 90 | QCE_CIPHER_DIR_LAST |
| 91 | }; |
| 92 | |
| 93 | /* Cipher algorithms modes */ |
| 94 | enum qce_cipher_mode_enum { |
| 95 | QCE_MODE_CBC = 0, |
| 96 | QCE_MODE_ECB = 1, |
| 97 | QCE_MODE_CTR = 2, |
| 98 | QCE_MODE_XTS = 3, |
| 99 | QCE_MODE_CCM = 4, |
| 100 | QCE_CIPHER_MODE_LAST |
| 101 | }; |
| 102 | |
| 103 | /* Cipher operation type */ |
| 104 | enum qce_req_op_enum { |
| 105 | QCE_REQ_ABLK_CIPHER = 0, |
| 106 | QCE_REQ_ABLK_CIPHER_NO_KEY = 1, |
| 107 | QCE_REQ_AEAD = 2, |
| 108 | QCE_REQ_LAST |
| 109 | }; |
| 110 | |
| 111 | /* Algorithms/features supported in CE HW engine */ |
| 112 | struct ce_hw_support { |
| 113 | bool sha1_hmac_20; /* Supports 20 bytes of HMAC key*/ |
| 114 | bool sha1_hmac; /* supports max HMAC key of 64 bytes*/ |
| 115 | bool sha256_hmac; /* supports max HMAC key of 64 bytes*/ |
| 116 | bool sha_hmac; /* supports SHA1 and SHA256 MAX HMAC key of 64 bytes*/ |
| 117 | bool cmac; |
| 118 | bool aes_key_192; |
| 119 | bool aes_xts; |
| 120 | bool aes_ccm; |
| 121 | bool ota; |
| 122 | bool aligned_only; |
| 123 | bool bam; |
| 124 | bool is_shared; |
| 125 | bool hw_key; |
| 126 | bool use_sw_aes_cbc_ecb_ctr_algo; |
| 127 | bool use_sw_aead_algo; |
| 128 | bool use_sw_aes_xts_algo; |
| 129 | bool use_sw_ahash_algo; |
| 130 | bool use_sw_hmac_algo; |
| 131 | bool use_sw_aes_ccm_algo; |
| 132 | bool clk_mgmt_sus_res; |
AnilKumar Chimata | 70cf177 | 2017-05-02 18:39:39 -0700 | [diff] [blame] | 133 | bool req_bw_before_clk; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 134 | unsigned int ce_device; |
| 135 | unsigned int ce_hw_instance; |
| 136 | unsigned int max_request; |
| 137 | }; |
| 138 | |
| 139 | /* Sha operation parameters */ |
| 140 | struct qce_sha_req { |
| 141 | qce_comp_func_ptr_t qce_cb; /* call back */ |
| 142 | enum qce_hash_alg_enum alg; /* sha algorithm */ |
| 143 | unsigned char *digest; /* sha digest */ |
| 144 | struct scatterlist *src; /* pointer to scatter list entry */ |
| 145 | uint32_t auth_data[4]; /* byte count */ |
| 146 | unsigned char *authkey; /* auth key */ |
| 147 | unsigned int authklen; /* auth key length */ |
| 148 | bool first_blk; /* first block indicator */ |
| 149 | bool last_blk; /* last block indicator */ |
| 150 | unsigned int size; /* data length in bytes */ |
| 151 | void *areq; |
| 152 | unsigned int flags; |
| 153 | }; |
| 154 | |
| 155 | struct qce_req { |
| 156 | enum qce_req_op_enum op; /* operation type */ |
| 157 | qce_comp_func_ptr_t qce_cb; /* call back */ |
| 158 | void *areq; |
| 159 | enum qce_cipher_alg_enum alg; /* cipher algorithms*/ |
| 160 | enum qce_cipher_dir_enum dir; /* encryption? decryption? */ |
| 161 | enum qce_cipher_mode_enum mode; /* algorithm mode */ |
| 162 | enum qce_hash_alg_enum auth_alg;/* authentication algorithm for aead */ |
| 163 | unsigned char *authkey; /* authentication key */ |
| 164 | unsigned int authklen; /* authentication key kength */ |
| 165 | unsigned int authsize; /* authentication key kength */ |
| 166 | unsigned char nonce[MAX_NONCE];/* nonce for ccm mode */ |
| 167 | unsigned char *assoc; /* Ptr to formatted associated data */ |
| 168 | unsigned int assoclen; /* Formatted associated data length */ |
| 169 | struct scatterlist *asg; /* Formatted associated data sg */ |
| 170 | unsigned char *enckey; /* cipher key */ |
| 171 | unsigned int encklen; /* cipher key length */ |
| 172 | unsigned char *iv; /* initialization vector */ |
| 173 | unsigned int ivsize; /* initialization vector size*/ |
| 174 | unsigned int cryptlen; /* data length */ |
| 175 | unsigned int use_pmem; /* is source of data PMEM allocated? */ |
| 176 | struct qcedev_pmem_info *pmem; /* pointer to pmem_info structure*/ |
| 177 | unsigned int flags; |
| 178 | }; |
| 179 | |
| 180 | struct qce_pm_table { |
| 181 | int (*suspend)(void *handle); |
| 182 | int (*resume)(void *handle); |
| 183 | }; |
| 184 | |
| 185 | extern struct qce_pm_table qce_pm_table; |
| 186 | |
| 187 | void *qce_open(struct platform_device *pdev, int *rc); |
| 188 | int qce_close(void *handle); |
| 189 | int qce_aead_req(void *handle, struct qce_req *req); |
| 190 | int qce_ablk_cipher_req(void *handle, struct qce_req *req); |
| 191 | int qce_hw_support(void *handle, struct ce_hw_support *support); |
| 192 | int qce_process_sha_req(void *handle, struct qce_sha_req *s_req); |
| 193 | int qce_enable_clk(void *handle); |
| 194 | int qce_disable_clk(void *handle); |
| 195 | void qce_get_driver_stats(void *handle); |
| 196 | void qce_clear_driver_stats(void *handle); |
| 197 | |
| 198 | #endif /* __CRYPTO_MSM_QCE_H */ |