| Siddartha Mohanadoss | 603f765 | 2017-01-26 15:59:41 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef _MHI_HWIO_ |
| 14 | #define _MHI_HWIO_ |
| 15 | |
| 16 | /* MHI register definition */ |
| 17 | #define MHI_CTRL_INT_STATUS_A7 (0x0004) |
| 18 | #define MHI_CTRL_INT_STATUS_A7_STATUS_MASK 0xffffffff |
| 19 | #define MHI_CTRL_INT_STATUS_A7_STATUS_SHIFT 0x0 |
| 20 | |
| 21 | #define MHI_CHDB_INT_STATUS_A7_n(n) (0x0028 + 0x4 * (n)) |
| 22 | #define MHI_CHDB_INT_STATUS_A7_n_STATUS_MASK 0xffffffff |
| 23 | #define MHI_CHDB_INT_STATUS_A7_n_STATUS_SHIFT 0x0 |
| 24 | |
| 25 | #define MHI_ERDB_INT_STATUS_A7_n(n) (0x0038 + 0x4 * (n)) |
| 26 | #define MHI_ERDB_INT_STATUS_A7_n_STATUS_MASK 0xffffffff |
| 27 | #define MHI_ERDB_INT_STATUS_A7_n_STATUS_SHIFT 0x0 |
| 28 | |
| 29 | #define MHI_CTRL_INT_CLEAR_A7 (0x004C) |
| 30 | #define MHI_CTRL_INT_CLEAR_A7_CLEAR_MASK 0xffffffff |
| 31 | #define MHI_CTRL_INT_CLEAR_A7_CLEAR_SHIFT 0x0 |
| 32 | #define MHI_CTRL_INT_CRDB_CLEAR BIT(1) |
| 33 | #define MHI_CTRL_INT_CRDB_MHICTRL_CLEAR BIT(0) |
| 34 | |
| 35 | #define MHI_CHDB_INT_CLEAR_A7_n(n) (0x0070 + 0x4 * (n)) |
| 36 | #define MHI_CHDB_INT_CLEAR_A7_n_CLEAR_MASK 0xffffffff |
| 37 | #define MHI_CHDB_INT_CLEAR_A7_n_CLEAR_SHIFT 0x0 |
| 38 | |
| 39 | #define MHI_ERDB_INT_CLEAR_A7_n(n) (0x0080 + 0x4 * (n)) |
| 40 | #define MHI_ERDB_INT_CLEAR_A7_n_CLEAR_MASK 0xffffffff |
| 41 | #define MHI_ERDB_INT_CLEAR_A7_n_CLEAR_SHIFT 0x0 |
| 42 | |
| 43 | #define MHI_CTRL_INT_MASK_A7 (0x0094) |
| 44 | #define MHI_CTRL_INT_MASK_A7_MASK_MASK 0x3 |
| 45 | #define MHI_CTRL_INT_MASK_A7_MASK_SHIFT 0x0 |
| 46 | #define MHI_CTRL_MHICTRL_MASK BIT(0) |
| 47 | #define MHI_CTRL_MHICTRL_SHFT 0 |
| 48 | #define MHI_CTRL_CRDB_MASK BIT(1) |
| 49 | #define MHI_CTRL_CRDB_SHFT 1 |
| 50 | |
| 51 | #define MHI_CHDB_INT_MASK_A7_n(n) (0x00B8 + 0x4 * (n)) |
| 52 | #define MHI_CHDB_INT_MASK_A7_n_MASK_MASK 0xffffffff |
| 53 | #define MHI_CHDB_INT_MASK_A7_n_MASK_SHIFT 0x0 |
| 54 | |
| 55 | #define MHI_ERDB_INT_MASK_A7_n(n) (0x00C8 + 0x4 * (n)) |
| 56 | #define MHI_ERDB_INT_MASK_A7_n_MASK_MASK 0xffffffff |
| 57 | #define MHI_ERDB_INT_MASK_A7_n_MASK_SHIFT 0x0 |
| 58 | |
| 59 | #define MHIREGLEN (0x0100) |
| 60 | #define MHIREGLEN_MHIREGLEN_MASK 0xffffffff |
| 61 | #define MHIREGLEN_MHIREGLEN_SHIFT 0x0 |
| 62 | |
| 63 | #define MHIVER (0x0108) |
| 64 | #define MHIVER_MHIVER_MASK 0xffffffff |
| 65 | #define MHIVER_MHIVER_SHIFT 0x0 |
| 66 | |
| 67 | #define MHICFG (0x0110) |
| 68 | #define MHICFG_RESERVED_BITS31_24_MASK 0xff000000 |
| 69 | #define MHICFG_RESERVED_BITS31_24_SHIFT 0x18 |
| 70 | #define MHICFG_NER_MASK 0xff0000 |
| 71 | #define MHICFG_NER_SHIFT 0x10 |
| 72 | #define MHICFG_RESERVED_BITS15_8_MASK 0xff00 |
| 73 | #define MHICFG_RESERVED_BITS15_8_SHIFT 0x8 |
| 74 | #define MHICFG_NCH_MASK 0xff |
| 75 | #define MHICFG_NCH_SHIFT 0x0 |
| 76 | |
| 77 | #define CHDBOFF (0x0118) |
| 78 | #define CHDBOFF_CHDBOFF_MASK 0xffffffff |
| 79 | #define CHDBOFF_CHDBOFF_SHIFT 0x0 |
| 80 | |
| 81 | #define ERDBOFF (0x0120) |
| 82 | #define ERDBOFF_ERDBOFF_MASK 0xffffffff |
| 83 | #define ERDBOFF_ERDBOFF_SHIFT 0x0 |
| 84 | |
| 85 | #define BHIOFF (0x0128) |
| 86 | #define BHIOFF_BHIOFF_MASK 0xffffffff |
| 87 | #define BHIOFF_BHIOFF_SHIFT 0x0 |
| 88 | |
| 89 | #define DEBUGOFF (0x0130) |
| 90 | #define DEBUGOFF_DEBUGOFF_MASK 0xffffffff |
| 91 | #define DEBUGOFF_DEBUGOFF_SHIFT 0x0 |
| 92 | |
| 93 | #define MHICTRL (0x0138) |
| 94 | #define MHICTRL_MHISTATE_MASK 0x0000FF00 |
| 95 | #define MHICTRL_MHISTATE_SHIFT 0x8 |
| 96 | #define MHICTRL_RESET_MASK 0x2 |
| 97 | #define MHICTRL_RESET_SHIFT 0x1 |
| 98 | |
| 99 | #define MHISTATUS (0x0148) |
| 100 | #define MHISTATUS_MHISTATE_MASK 0x0000ff00 |
| 101 | #define MHISTATUS_MHISTATE_SHIFT 0x8 |
| 102 | #define MHISTATUS_SYSERR_MASK 0x4 |
| 103 | #define MHISTATUS_SYSERR_SHIFT 0x2 |
| 104 | #define MHISTATUS_READY_MASK 0x1 |
| 105 | #define MHISTATUS_READY_SHIFT 0x0 |
| 106 | |
| 107 | #define CCABAP_LOWER (0x0158) |
| 108 | #define CCABAP_LOWER_CCABAP_LOWER_MASK 0xffffffff |
| 109 | #define CCABAP_LOWER_CCABAP_LOWER_SHIFT 0x0 |
| 110 | |
| 111 | #define CCABAP_HIGHER (0x015C) |
| 112 | #define CCABAP_HIGHER_CCABAP_HIGHER_MASK 0xffffffff |
| 113 | #define CCABAP_HIGHER_CCABAP_HIGHER_SHIFT 0x0 |
| 114 | |
| 115 | #define ECABAP_LOWER (0x0160) |
| 116 | #define ECABAP_LOWER_ECABAP_LOWER_MASK 0xffffffff |
| 117 | #define ECABAP_LOWER_ECABAP_LOWER_SHIFT 0x0 |
| 118 | |
| 119 | #define ECABAP_HIGHER (0x0164) |
| 120 | #define ECABAP_HIGHER_ECABAP_HIGHER_MASK 0xffffffff |
| 121 | #define ECABAP_HIGHER_ECABAP_HIGHER_SHIFT 0x0 |
| 122 | |
| 123 | #define CRCBAP_LOWER (0x0168) |
| 124 | #define CRCBAP_LOWER_CRCBAP_LOWER_MASK 0xffffffff |
| 125 | #define CRCBAP_LOWER_CRCBAP_LOWER_SHIFT 0x0 |
| 126 | |
| 127 | #define CRCBAP_HIGHER (0x016C) |
| 128 | #define CRCBAP_HIGHER_CRCBAP_HIGHER_MASK 0xffffffff |
| 129 | #define CRCBAP_HIGHER_CRCBAP_HIGHER_SHIFT 0x0 |
| 130 | |
| 131 | #define CRDB_LOWER (0x0170) |
| 132 | #define CRDB_LOWER_CRDB_LOWER_MASK 0xffffffff |
| 133 | #define CRDB_LOWER_CRDB_LOWER_SHIFT 0x0 |
| 134 | |
| 135 | #define CRDB_HIGHER (0x0174) |
| 136 | #define CRDB_HIGHER_CRDB_HIGHER_MASK 0xffffffff |
| 137 | #define CRDB_HIGHER_CRDB_HIGHER_SHIFT 0x0 |
| 138 | |
| 139 | #define MHICTRLBASE_LOWER (0x0180) |
| 140 | #define MHICTRLBASE_LOWER_MHICTRLBASE_LOWER_MASK 0xffffffff |
| 141 | #define MHICTRLBASE_LOWER_MHICTRLBASE_LOWER_SHIFT 0x0 |
| 142 | |
| 143 | #define MHICTRLBASE_HIGHER (0x0184) |
| 144 | #define MHICTRLBASE_HIGHER_MHICTRLBASE_HIGHER_MASK 0xffffffff |
| 145 | #define MHICTRLBASE_HIGHER_MHICTRLBASE_HIGHER_SHIFT 0x0 |
| 146 | |
| 147 | #define MHICTRLLIMIT_LOWER (0x0188) |
| 148 | #define MHICTRLLIMIT_LOWER_MHICTRLLIMIT_LOWER_MASK 0xffffffff |
| 149 | #define MHICTRLLIMIT_LOWER_MHICTRLLIMIT_LOWER_SHIFT 0x0 |
| 150 | |
| 151 | #define MHICTRLLIMIT_HIGHER (0x018C) |
| 152 | #define MHICTRLLIMIT_HIGHER_MHICTRLLIMIT_HIGHER_MASK 0xffffffff |
| 153 | #define MHICTRLLIMIT_HIGHER_MHICTRLLIMIT_HIGHER_SHIFT 0x0 |
| 154 | |
| 155 | #define MHIDATABASE_LOWER (0x0198) |
| 156 | #define MHIDATABASE_LOWER_MHIDATABASE_LOWER_MASK 0xffffffff |
| 157 | #define MHIDATABASE_LOWER_MHIDATABASE_LOWER_SHIFT 0x0 |
| 158 | |
| 159 | #define MHIDATABASE_HIGHER (0x019C) |
| 160 | #define MHIDATABASE_HIGHER_MHIDATABASE_HIGHER_MASK 0xffffffff |
| 161 | #define MHIDATABASE_HIGHER_MHIDATABASE_HIGHER_SHIFT 0x0 |
| 162 | |
| 163 | #define MHIDATALIMIT_LOWER (0x01A0) |
| 164 | #define MHIDATALIMIT_LOWER_MHIDATALIMIT_LOWER_MASK 0xffffffff |
| 165 | #define MHIDATALIMIT_LOWER_MHIDATALIMIT_LOWER_SHIFT 0x0 |
| 166 | |
| 167 | #define MHIDATALIMIT_HIGHER (0x01A4) |
| 168 | #define MHIDATALIMIT_HIGHER_MHIDATALIMIT_HIGHER_MASK 0xffffffff |
| 169 | #define MHIDATALIMIT_HIGHER_MHIDATALIMIT_HIGHER_SHIFT 0x0 |
| 170 | |
| 171 | #define CHDB_LOWER_n(n) (0x0400 + 0x8 * (n)) |
| 172 | #define CHDB_LOWER_n_CHDB_LOWER_MASK 0xffffffff |
| 173 | #define CHDB_LOWER_n_CHDB_LOWER_SHIFT 0x0 |
| 174 | |
| 175 | #define CHDB_HIGHER_n(n) (0x0404 + 0x8 * (n)) |
| 176 | #define CHDB_HIGHER_n_CHDB_HIGHER_MASK 0xffffffff |
| 177 | #define CHDB_HIGHER_n_CHDB_HIGHER_SHIFT 0x0 |
| 178 | |
| 179 | #define ERDB_LOWER_n(n) (0x0800 + 0x8 * (n)) |
| 180 | #define ERDB_LOWER_n_ERDB_LOWER_MASK 0xffffffff |
| 181 | #define ERDB_LOWER_n_ERDB_LOWER_SHIFT 0x0 |
| 182 | |
| 183 | #define ERDB_HIGHER_n(n) (0x0804 + 0x8 * (n)) |
| 184 | #define ERDB_HIGHER_n_ERDB_HIGHER_MASK 0xffffffff |
| 185 | #define ERDB_HIGHER_n_ERDB_HIGHER_SHIFT 0x0 |
| 186 | |
| 187 | #define BHI_EXECENV (0x228) |
| 188 | #define BHI_EXECENV_MASK 0xFFFFFFFF |
| 189 | #define BHI_EXECENV_SHIFT 0 |
| 190 | |
| 191 | #endif |