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Boris Brezillon1a396782015-01-06 11:13:28 +01001/*
2 * Copyright (C) 2014 Traphandler
3 * Copyright (C) 2014 Free Electrons
4 * Copyright (C) 2014 Atmel
5 *
6 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published by
11 * the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#ifndef DRM_ATMEL_HLCDC_H
23#define DRM_ATMEL_HLCDC_H
24
25#include <linux/clk.h>
26#include <linux/irqdomain.h>
27#include <linux/pwm.h>
28
Boris Brezillon2389fc12015-02-05 16:32:33 +010029#include <drm/drm_atomic.h>
30#include <drm/drm_atomic_helper.h>
Boris Brezillon1a396782015-01-06 11:13:28 +010031#include <drm/drm_crtc.h>
32#include <drm/drm_crtc_helper.h>
33#include <drm/drm_fb_cma_helper.h>
34#include <drm/drm_gem_cma_helper.h>
35#include <drm/drm_panel.h>
Boris Brezillon2389fc12015-02-05 16:32:33 +010036#include <drm/drm_plane_helper.h>
Boris Brezillon1a396782015-01-06 11:13:28 +010037#include <drm/drmP.h>
38
39#include "atmel_hlcdc_layer.h"
40
41#define ATMEL_HLCDC_MAX_LAYERS 5
42
43/**
44 * Atmel HLCDC Display Controller description structure.
45 *
46 * This structure describe the HLCDC IP capabilities and depends on the
47 * HLCDC IP version (or Atmel SoC family).
48 *
49 * @min_width: minimum width supported by the Display Controller
50 * @min_height: minimum height supported by the Display Controller
51 * @max_width: maximum width supported by the Display Controller
52 * @max_height: maximum height supported by the Display Controller
53 * @layers: a layer description table describing available layers
54 * @nlayers: layer description table size
55 */
56struct atmel_hlcdc_dc_desc {
57 int min_width;
58 int min_height;
59 int max_width;
60 int max_height;
61 const struct atmel_hlcdc_layer_desc *layers;
62 int nlayers;
63};
64
65/**
66 * Atmel HLCDC Plane properties.
67 *
68 * This structure stores plane property definitions.
69 *
70 * @alpha: alpha blending (or transparency) property
71 * @rotation: rotation property
72 */
73struct atmel_hlcdc_plane_properties {
74 struct drm_property *alpha;
Boris Brezillon1a396782015-01-06 11:13:28 +010075};
76
77/**
78 * Atmel HLCDC Plane.
79 *
80 * @base: base DRM plane structure
81 * @layer: HLCDC layer structure
82 * @properties: pointer to the property definitions structure
83 * @rotation: current rotation status
84 */
85struct atmel_hlcdc_plane {
86 struct drm_plane base;
87 struct atmel_hlcdc_layer layer;
88 struct atmel_hlcdc_plane_properties *properties;
Boris Brezillon1a396782015-01-06 11:13:28 +010089};
90
91static inline struct atmel_hlcdc_plane *
92drm_plane_to_atmel_hlcdc_plane(struct drm_plane *p)
93{
94 return container_of(p, struct atmel_hlcdc_plane, base);
95}
96
97static inline struct atmel_hlcdc_plane *
98atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *l)
99{
100 return container_of(l, struct atmel_hlcdc_plane, layer);
101}
102
103/**
Boris Brezillon1a396782015-01-06 11:13:28 +0100104 * Atmel HLCDC Planes.
105 *
106 * This structure stores the instantiated HLCDC Planes and can be accessed by
107 * the HLCDC Display Controller or the HLCDC CRTC.
108 *
109 * @primary: primary plane
110 * @cursor: hardware cursor plane
111 * @overlays: overlay plane table
112 * @noverlays: number of overlay planes
113 */
114struct atmel_hlcdc_planes {
115 struct atmel_hlcdc_plane *primary;
116 struct atmel_hlcdc_plane *cursor;
117 struct atmel_hlcdc_plane **overlays;
118 int noverlays;
119};
120
121/**
122 * Atmel HLCDC Display Controller.
123 *
124 * @desc: HLCDC Display Controller description
125 * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
126 * @fbdev: framebuffer device attached to the Display Controller
127 * @crtc: CRTC provided by the display controller
128 * @planes: instantiated planes
129 * @layers: active HLCDC layer
130 * @wq: display controller workqueue
131 */
132struct atmel_hlcdc_dc {
133 const struct atmel_hlcdc_dc_desc *desc;
134 struct atmel_hlcdc *hlcdc;
135 struct drm_fbdev_cma *fbdev;
136 struct drm_crtc *crtc;
137 struct atmel_hlcdc_planes *planes;
138 struct atmel_hlcdc_layer *layers[ATMEL_HLCDC_MAX_LAYERS];
139 struct workqueue_struct *wq;
140};
141
142extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_formats;
143extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_and_yuv_formats;
144
145int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc,
146 struct drm_display_mode *mode);
147
148struct atmel_hlcdc_planes *
149atmel_hlcdc_create_planes(struct drm_device *dev);
150
Boris Brezillon59570172015-02-06 16:25:06 +0100151int atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state *c_state);
152
Boris Brezillon1a396782015-01-06 11:13:28 +0100153void atmel_hlcdc_crtc_irq(struct drm_crtc *c);
154
155void atmel_hlcdc_crtc_cancel_page_flip(struct drm_crtc *crtc,
156 struct drm_file *file);
157
Sylvain Rochetf026eb62015-03-12 19:47:19 +0100158void atmel_hlcdc_crtc_suspend(struct drm_crtc *crtc);
159void atmel_hlcdc_crtc_resume(struct drm_crtc *crtc);
160
Boris Brezillon1a396782015-01-06 11:13:28 +0100161int atmel_hlcdc_crtc_create(struct drm_device *dev);
162
163int atmel_hlcdc_create_outputs(struct drm_device *dev);
164
165#endif /* DRM_ATMEL_HLCDC_H */