blob: 1915464e4cd6022189fe88451c14147e6a0e8be1 [file] [log] [blame]
David Brownellf96411a2008-10-20 23:50:05 +02001/*
Balaji T Kef3b7d02009-12-13 21:30:48 +01002 * rtc-twl.c -- TWL Real Time Clock interface
David Brownellf96411a2008-10-20 23:50:05 +02003 *
4 * Copyright (C) 2007 MontaVista Software, Inc
5 * Author: Alexandre Rusev <source@mvista.com>
6 *
7 * Based on original TI driver twl4030-rtc.c
8 * Copyright (C) 2006 Texas Instruments, Inc.
9 *
10 * Based on rtc-omap.c
11 * Copyright (C) 2003 MontaVista Software, Inc.
12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
13 * Copyright (C) 2006 David Brownell
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20
21#include <linux/kernel.h>
Anton Vorontsov2fac6672009-01-06 14:42:11 -080022#include <linux/errno.h>
David Brownellf96411a2008-10-20 23:50:05 +020023#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/rtc.h>
27#include <linux/bcd.h>
28#include <linux/platform_device.h>
29#include <linux/interrupt.h>
Sachin Kamatc8a60462013-02-21 16:44:28 -080030#include <linux/of.h>
David Brownellf96411a2008-10-20 23:50:05 +020031
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010032#include <linux/i2c/twl.h>
David Brownellf96411a2008-10-20 23:50:05 +020033
34
35/*
36 * RTC block register offsets (use TWL_MODULE_RTC)
37 */
Balaji T Ka6b49ff2009-12-13 22:16:31 +010038enum {
39 REG_SECONDS_REG = 0,
40 REG_MINUTES_REG,
41 REG_HOURS_REG,
42 REG_DAYS_REG,
43 REG_MONTHS_REG,
44 REG_YEARS_REG,
45 REG_WEEKS_REG,
David Brownellf96411a2008-10-20 23:50:05 +020046
Balaji T Ka6b49ff2009-12-13 22:16:31 +010047 REG_ALARM_SECONDS_REG,
48 REG_ALARM_MINUTES_REG,
49 REG_ALARM_HOURS_REG,
50 REG_ALARM_DAYS_REG,
51 REG_ALARM_MONTHS_REG,
52 REG_ALARM_YEARS_REG,
David Brownellf96411a2008-10-20 23:50:05 +020053
Balaji T Ka6b49ff2009-12-13 22:16:31 +010054 REG_RTC_CTRL_REG,
55 REG_RTC_STATUS_REG,
56 REG_RTC_INTERRUPTS_REG,
David Brownellf96411a2008-10-20 23:50:05 +020057
Balaji T Ka6b49ff2009-12-13 22:16:31 +010058 REG_RTC_COMP_LSB_REG,
59 REG_RTC_COMP_MSB_REG,
60};
Tobias Klauser2e840672010-03-05 13:44:23 -080061static const u8 twl4030_rtc_reg_map[] = {
Balaji T Ka6b49ff2009-12-13 22:16:31 +010062 [REG_SECONDS_REG] = 0x00,
63 [REG_MINUTES_REG] = 0x01,
64 [REG_HOURS_REG] = 0x02,
65 [REG_DAYS_REG] = 0x03,
66 [REG_MONTHS_REG] = 0x04,
67 [REG_YEARS_REG] = 0x05,
68 [REG_WEEKS_REG] = 0x06,
69
70 [REG_ALARM_SECONDS_REG] = 0x07,
71 [REG_ALARM_MINUTES_REG] = 0x08,
72 [REG_ALARM_HOURS_REG] = 0x09,
73 [REG_ALARM_DAYS_REG] = 0x0A,
74 [REG_ALARM_MONTHS_REG] = 0x0B,
75 [REG_ALARM_YEARS_REG] = 0x0C,
76
77 [REG_RTC_CTRL_REG] = 0x0D,
78 [REG_RTC_STATUS_REG] = 0x0E,
79 [REG_RTC_INTERRUPTS_REG] = 0x0F,
80
81 [REG_RTC_COMP_LSB_REG] = 0x10,
82 [REG_RTC_COMP_MSB_REG] = 0x11,
83};
Tobias Klauser2e840672010-03-05 13:44:23 -080084static const u8 twl6030_rtc_reg_map[] = {
Balaji T Ka6b49ff2009-12-13 22:16:31 +010085 [REG_SECONDS_REG] = 0x00,
86 [REG_MINUTES_REG] = 0x01,
87 [REG_HOURS_REG] = 0x02,
88 [REG_DAYS_REG] = 0x03,
89 [REG_MONTHS_REG] = 0x04,
90 [REG_YEARS_REG] = 0x05,
91 [REG_WEEKS_REG] = 0x06,
92
93 [REG_ALARM_SECONDS_REG] = 0x08,
94 [REG_ALARM_MINUTES_REG] = 0x09,
95 [REG_ALARM_HOURS_REG] = 0x0A,
96 [REG_ALARM_DAYS_REG] = 0x0B,
97 [REG_ALARM_MONTHS_REG] = 0x0C,
98 [REG_ALARM_YEARS_REG] = 0x0D,
99
100 [REG_RTC_CTRL_REG] = 0x10,
101 [REG_RTC_STATUS_REG] = 0x11,
102 [REG_RTC_INTERRUPTS_REG] = 0x12,
103
104 [REG_RTC_COMP_LSB_REG] = 0x13,
105 [REG_RTC_COMP_MSB_REG] = 0x14,
106};
David Brownellf96411a2008-10-20 23:50:05 +0200107
108/* RTC_CTRL_REG bitfields */
109#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
110#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
111#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
112#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
113#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
114#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
115#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700116#define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80
David Brownellf96411a2008-10-20 23:50:05 +0200117
118/* RTC_STATUS_REG bitfields */
119#define BIT_RTC_STATUS_REG_RUN_M 0x02
120#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
121#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
122#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
123#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
124#define BIT_RTC_STATUS_REG_ALARM_M 0x40
125#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
126
127/* RTC_INTERRUPTS_REG bitfields */
128#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
129#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
130#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
131
132
133/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
134#define ALL_TIME_REGS 6
135
136/*----------------------------------------------------------------------*/
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100137static u8 *rtc_reg_map;
David Brownellf96411a2008-10-20 23:50:05 +0200138
139/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100140 * Supports 1 byte read from TWL RTC register.
David Brownellf96411a2008-10-20 23:50:05 +0200141 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100142static int twl_rtc_read_u8(u8 *data, u8 reg)
David Brownellf96411a2008-10-20 23:50:05 +0200143{
144 int ret;
145
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100146 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
David Brownellf96411a2008-10-20 23:50:05 +0200147 if (ret < 0)
Balaji T Kef3b7d02009-12-13 21:30:48 +0100148 pr_err("twl_rtc: Could not read TWL"
David Brownellf96411a2008-10-20 23:50:05 +0200149 "register %X - error %d\n", reg, ret);
150 return ret;
151}
152
153/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100154 * Supports 1 byte write to TWL RTC registers.
David Brownellf96411a2008-10-20 23:50:05 +0200155 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100156static int twl_rtc_write_u8(u8 data, u8 reg)
David Brownellf96411a2008-10-20 23:50:05 +0200157{
158 int ret;
159
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100160 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
David Brownellf96411a2008-10-20 23:50:05 +0200161 if (ret < 0)
Balaji T Kef3b7d02009-12-13 21:30:48 +0100162 pr_err("twl_rtc: Could not write TWL"
David Brownellf96411a2008-10-20 23:50:05 +0200163 "register %X - error %d\n", reg, ret);
164 return ret;
165}
166
167/*
168 * Cache the value for timer/alarm interrupts register; this is
169 * only changed by callers holding rtc ops lock (or resume).
170 */
171static unsigned char rtc_irq_bits;
172
173/*
Alessandro Zummoa7483842009-01-15 13:50:52 -0800174 * Enable 1/second update and/or alarm interrupts.
David Brownellf96411a2008-10-20 23:50:05 +0200175 */
176static int set_rtc_irq_bit(unsigned char bit)
177{
178 unsigned char val;
179 int ret;
180
Venu Byravarasuce9f6502012-03-23 15:02:32 -0700181 /* if the bit is set, return from here */
182 if (rtc_irq_bits & bit)
183 return 0;
184
David Brownellf96411a2008-10-20 23:50:05 +0200185 val = rtc_irq_bits | bit;
Alessandro Zummoa7483842009-01-15 13:50:52 -0800186 val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
Balaji T Kef3b7d02009-12-13 21:30:48 +0100187 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200188 if (ret == 0)
189 rtc_irq_bits = val;
190
191 return ret;
192}
193
194/*
Alessandro Zummoa7483842009-01-15 13:50:52 -0800195 * Disable update and/or alarm interrupts.
David Brownellf96411a2008-10-20 23:50:05 +0200196 */
197static int mask_rtc_irq_bit(unsigned char bit)
198{
199 unsigned char val;
200 int ret;
201
Venu Byravarasuce9f6502012-03-23 15:02:32 -0700202 /* if the bit is clear, return from here */
203 if (!(rtc_irq_bits & bit))
204 return 0;
205
David Brownellf96411a2008-10-20 23:50:05 +0200206 val = rtc_irq_bits & ~bit;
Balaji T Kef3b7d02009-12-13 21:30:48 +0100207 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200208 if (ret == 0)
209 rtc_irq_bits = val;
210
211 return ret;
212}
213
Balaji T Kef3b7d02009-12-13 21:30:48 +0100214static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
David Brownellf96411a2008-10-20 23:50:05 +0200215{
Kevin Hilmanae845892013-07-03 15:07:53 -0700216 struct platform_device *pdev = to_platform_device(dev);
217 int irq = platform_get_irq(pdev, 0);
218 static bool twl_rtc_wake_enabled;
David Brownellf96411a2008-10-20 23:50:05 +0200219 int ret;
220
Kevin Hilmanae845892013-07-03 15:07:53 -0700221 if (enabled) {
David Brownellf96411a2008-10-20 23:50:05 +0200222 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
Kevin Hilmanae845892013-07-03 15:07:53 -0700223 if (device_can_wakeup(dev) && !twl_rtc_wake_enabled) {
224 enable_irq_wake(irq);
225 twl_rtc_wake_enabled = true;
226 }
227 } else {
David Brownellf96411a2008-10-20 23:50:05 +0200228 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
Kevin Hilmanae845892013-07-03 15:07:53 -0700229 if (twl_rtc_wake_enabled) {
230 disable_irq_wake(irq);
231 twl_rtc_wake_enabled = false;
232 }
233 }
David Brownellf96411a2008-10-20 23:50:05 +0200234
235 return ret;
236}
237
David Brownellf96411a2008-10-20 23:50:05 +0200238/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100239 * Gets current TWL RTC time and date parameters.
David Brownellf96411a2008-10-20 23:50:05 +0200240 *
241 * The RTC's time/alarm representation is not what gmtime(3) requires
242 * Linux to use:
243 *
244 * - Months are 1..12 vs Linux 0-11
245 * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
246 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100247static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
David Brownellf96411a2008-10-20 23:50:05 +0200248{
Peter Ujfalusi14591d82012-11-13 09:28:45 +0100249 unsigned char rtc_data[ALL_TIME_REGS];
David Brownellf96411a2008-10-20 23:50:05 +0200250 int ret;
251 u8 save_control;
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700252 u8 rtc_control;
David Brownellf96411a2008-10-20 23:50:05 +0200253
Balaji T Kef3b7d02009-12-13 21:30:48 +0100254 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700255 if (ret < 0) {
256 dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret);
David Brownellf96411a2008-10-20 23:50:05 +0200257 return ret;
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700258 }
259 /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */
260 if (twl_class_is_6030()) {
261 if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) {
262 save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M;
263 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
264 if (ret < 0) {
265 dev_err(dev, "%s clr GET_TIME, error %d\n",
266 __func__, ret);
267 return ret;
268 }
269 }
270 }
David Brownellf96411a2008-10-20 23:50:05 +0200271
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700272 /* Copy RTC counting registers to static registers or latches */
273 rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M;
David Brownellf96411a2008-10-20 23:50:05 +0200274
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700275 /* for twl6030/32 enable read access to static shadowed registers */
276 if (twl_class_is_6030())
277 rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT;
278
279 ret = twl_rtc_write_u8(rtc_control, REG_RTC_CTRL_REG);
280 if (ret < 0) {
281 dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret);
David Brownellf96411a2008-10-20 23:50:05 +0200282 return ret;
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700283 }
David Brownellf96411a2008-10-20 23:50:05 +0200284
Balaji T Kef3b7d02009-12-13 21:30:48 +0100285 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100286 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200287
288 if (ret < 0) {
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700289 dev_err(dev, "%s: reading data, error %d\n", __func__, ret);
David Brownellf96411a2008-10-20 23:50:05 +0200290 return ret;
291 }
292
Konstantin Shlyakhovoyf3ec4342012-04-12 12:49:15 -0700293 /* for twl6030 restore original state of rtc control register */
294 if (twl_class_is_6030()) {
295 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
296 if (ret < 0) {
297 dev_err(dev, "%s: restore CTRL_REG, error %d\n",
298 __func__, ret);
299 return ret;
300 }
301 }
302
David Brownellf96411a2008-10-20 23:50:05 +0200303 tm->tm_sec = bcd2bin(rtc_data[0]);
304 tm->tm_min = bcd2bin(rtc_data[1]);
305 tm->tm_hour = bcd2bin(rtc_data[2]);
306 tm->tm_mday = bcd2bin(rtc_data[3]);
307 tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
308 tm->tm_year = bcd2bin(rtc_data[5]) + 100;
309
310 return ret;
311}
312
Balaji T Kef3b7d02009-12-13 21:30:48 +0100313static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
David Brownellf96411a2008-10-20 23:50:05 +0200314{
315 unsigned char save_control;
Peter Ujfalusi14591d82012-11-13 09:28:45 +0100316 unsigned char rtc_data[ALL_TIME_REGS];
David Brownellf96411a2008-10-20 23:50:05 +0200317 int ret;
318
Peter Ujfalusi14591d82012-11-13 09:28:45 +0100319 rtc_data[0] = bin2bcd(tm->tm_sec);
320 rtc_data[1] = bin2bcd(tm->tm_min);
321 rtc_data[2] = bin2bcd(tm->tm_hour);
322 rtc_data[3] = bin2bcd(tm->tm_mday);
323 rtc_data[4] = bin2bcd(tm->tm_mon + 1);
324 rtc_data[5] = bin2bcd(tm->tm_year - 100);
David Brownellf96411a2008-10-20 23:50:05 +0200325
326 /* Stop RTC while updating the TC registers */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100327 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200328 if (ret < 0)
329 goto out;
330
331 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
Jesper Juhl8f6b0dd2011-07-25 17:13:34 -0700332 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200333 if (ret < 0)
334 goto out;
335
336 /* update all the time registers in one shot */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100337 ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100338 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200339 if (ret < 0) {
340 dev_err(dev, "rtc_set_time error %d\n", ret);
341 goto out;
342 }
343
344 /* Start back RTC */
345 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
Balaji T Kef3b7d02009-12-13 21:30:48 +0100346 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200347
348out:
349 return ret;
350}
351
352/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100353 * Gets current TWL RTC alarm time.
David Brownellf96411a2008-10-20 23:50:05 +0200354 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100355static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
David Brownellf96411a2008-10-20 23:50:05 +0200356{
Peter Ujfalusi14591d82012-11-13 09:28:45 +0100357 unsigned char rtc_data[ALL_TIME_REGS];
David Brownellf96411a2008-10-20 23:50:05 +0200358 int ret;
359
Balaji T Kef3b7d02009-12-13 21:30:48 +0100360 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100361 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200362 if (ret < 0) {
363 dev_err(dev, "rtc_read_alarm error %d\n", ret);
364 return ret;
365 }
366
367 /* some of these fields may be wildcard/"match all" */
368 alm->time.tm_sec = bcd2bin(rtc_data[0]);
369 alm->time.tm_min = bcd2bin(rtc_data[1]);
370 alm->time.tm_hour = bcd2bin(rtc_data[2]);
371 alm->time.tm_mday = bcd2bin(rtc_data[3]);
372 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
373 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
374
375 /* report cached alarm enable state */
376 if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
377 alm->enabled = 1;
378
379 return ret;
380}
381
Balaji T Kef3b7d02009-12-13 21:30:48 +0100382static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
David Brownellf96411a2008-10-20 23:50:05 +0200383{
Peter Ujfalusi14591d82012-11-13 09:28:45 +0100384 unsigned char alarm_data[ALL_TIME_REGS];
David Brownellf96411a2008-10-20 23:50:05 +0200385 int ret;
386
Balaji T Kef3b7d02009-12-13 21:30:48 +0100387 ret = twl_rtc_alarm_irq_enable(dev, 0);
David Brownellf96411a2008-10-20 23:50:05 +0200388 if (ret)
389 goto out;
390
Peter Ujfalusi14591d82012-11-13 09:28:45 +0100391 alarm_data[0] = bin2bcd(alm->time.tm_sec);
392 alarm_data[1] = bin2bcd(alm->time.tm_min);
393 alarm_data[2] = bin2bcd(alm->time.tm_hour);
394 alarm_data[3] = bin2bcd(alm->time.tm_mday);
395 alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
396 alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
David Brownellf96411a2008-10-20 23:50:05 +0200397
398 /* update all the alarm registers in one shot */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100399 ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100400 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200401 if (ret) {
402 dev_err(dev, "rtc_set_alarm error %d\n", ret);
403 goto out;
404 }
405
406 if (alm->enabled)
Balaji T Kef3b7d02009-12-13 21:30:48 +0100407 ret = twl_rtc_alarm_irq_enable(dev, 1);
David Brownellf96411a2008-10-20 23:50:05 +0200408out:
409 return ret;
410}
411
Balaji T Kef3b7d02009-12-13 21:30:48 +0100412static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
David Brownellf96411a2008-10-20 23:50:05 +0200413{
Venu Byravarasu2778ebc2012-03-23 15:02:34 -0700414 unsigned long events;
David Brownellf96411a2008-10-20 23:50:05 +0200415 int ret = IRQ_NONE;
416 int res;
417 u8 rd_reg;
418
Balaji T Kef3b7d02009-12-13 21:30:48 +0100419 res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200420 if (res)
421 goto out;
422 /*
423 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
424 * only one (ALARM or RTC) interrupt source may be enabled
425 * at time, we also could check our results
426 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
427 */
428 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
Venu Byravarasu2778ebc2012-03-23 15:02:34 -0700429 events = RTC_IRQF | RTC_AF;
David Brownellf96411a2008-10-20 23:50:05 +0200430 else
Venu Byravarasu2778ebc2012-03-23 15:02:34 -0700431 events = RTC_IRQF | RTC_PF;
David Brownellf96411a2008-10-20 23:50:05 +0200432
Venu Byravarasu94a339d2012-03-23 15:02:33 -0700433 res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M,
David Brownellf96411a2008-10-20 23:50:05 +0200434 REG_RTC_STATUS_REG);
435 if (res)
436 goto out;
437
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100438 if (twl_class_is_4030()) {
439 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
440 * needs 2 reads to clear the interrupt. One read is done in
441 * do_twl_pwrirq(). Doing the second read, to clear
442 * the bit.
443 *
444 * FIXME the reason PWR_ISR1 needs an extra read is that
445 * RTC_IF retriggered until we cleared REG_ALARM_M above.
446 * But re-reading like this is a bad hack; by doing so we
447 * risk wrongly clearing status for some other IRQ (losing
448 * the interrupt). Be smarter about handling RTC_UF ...
449 */
450 res = twl_i2c_read_u8(TWL4030_MODULE_INT,
David Brownellf96411a2008-10-20 23:50:05 +0200451 &rd_reg, TWL4030_INT_PWR_ISR1);
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100452 if (res)
453 goto out;
454 }
David Brownellf96411a2008-10-20 23:50:05 +0200455
456 /* Notify RTC core on event */
457 rtc_update_irq(rtc, 1, events);
458
459 ret = IRQ_HANDLED;
460out:
461 return ret;
462}
463
Balaji T Kef3b7d02009-12-13 21:30:48 +0100464static struct rtc_class_ops twl_rtc_ops = {
465 .read_time = twl_rtc_read_time,
466 .set_time = twl_rtc_set_time,
467 .read_alarm = twl_rtc_read_alarm,
468 .set_alarm = twl_rtc_set_alarm,
469 .alarm_irq_enable = twl_rtc_alarm_irq_enable,
David Brownellf96411a2008-10-20 23:50:05 +0200470};
471
472/*----------------------------------------------------------------------*/
473
Greg Kroah-Hartman5a167f42012-12-21 13:09:38 -0800474static int twl_rtc_probe(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200475{
476 struct rtc_device *rtc;
Todd Poynor7e72c682011-08-10 20:20:36 -0700477 int ret = -EINVAL;
David Brownellf96411a2008-10-20 23:50:05 +0200478 int irq = platform_get_irq(pdev, 0);
479 u8 rd_reg;
480
Anton Vorontsov2fac6672009-01-06 14:42:11 -0800481 if (irq <= 0)
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800482 return ret;
David Brownellf96411a2008-10-20 23:50:05 +0200483
Peter Ujfalusid3869ff2013-07-03 15:07:55 -0700484 /* Initialize the register map */
485 if (twl_class_is_4030())
486 rtc_reg_map = (u8 *)twl4030_rtc_reg_map;
487 else
488 rtc_reg_map = (u8 *)twl6030_rtc_reg_map;
489
Balaji T Kef3b7d02009-12-13 21:30:48 +0100490 ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200491 if (ret < 0)
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800492 return ret;
David Brownellf96411a2008-10-20 23:50:05 +0200493
494 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
495 dev_warn(&pdev->dev, "Power up reset detected.\n");
496
497 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
498 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
499
500 /* Clear RTC Power up reset and pending alarm interrupts */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100501 ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200502 if (ret < 0)
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800503 return ret;
David Brownellf96411a2008-10-20 23:50:05 +0200504
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100505 if (twl_class_is_6030()) {
506 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
507 REG_INT_MSK_LINE_A);
508 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
509 REG_INT_MSK_STS_A);
510 }
511
Venu Byravarasuf7439bc2012-03-23 15:02:33 -0700512 dev_info(&pdev->dev, "Enabling TWL-RTC\n");
513 ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200514 if (ret < 0)
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800515 return ret;
David Brownellf96411a2008-10-20 23:50:05 +0200516
Kevin Hilman8dcebaa92012-09-17 14:09:17 -0700517 /* ensure interrupts are disabled, bootloaders can be strange */
518 ret = twl_rtc_write_u8(0, REG_RTC_INTERRUPTS_REG);
519 if (ret < 0)
520 dev_warn(&pdev->dev, "unable to disable interrupt\n");
521
David Brownellf96411a2008-10-20 23:50:05 +0200522 /* init cached IRQ enable bits */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100523 ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200524 if (ret < 0)
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800525 return ret;
David Brownellf96411a2008-10-20 23:50:05 +0200526
Grygorii Strashkob99b94b2013-07-31 13:53:41 -0700527 device_init_wakeup(&pdev->dev, 1);
528
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800529 rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
530 &twl_rtc_ops, THIS_MODULE);
Todd Poynor7e72c682011-08-10 20:20:36 -0700531 if (IS_ERR(rtc)) {
Todd Poynor7e72c682011-08-10 20:20:36 -0700532 dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
533 PTR_ERR(rtc));
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800534 return PTR_ERR(rtc);
Todd Poynor7e72c682011-08-10 20:20:36 -0700535 }
536
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800537 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
538 twl_rtc_interrupt,
539 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
540 dev_name(&rtc->dev), rtc);
Todd Poynor7e72c682011-08-10 20:20:36 -0700541 if (ret < 0) {
542 dev_err(&pdev->dev, "IRQ is not free.\n");
Jingoo Hanf53eeb82014-01-23 15:55:06 -0800543 return ret;
Todd Poynor7e72c682011-08-10 20:20:36 -0700544 }
545
546 platform_set_drvdata(pdev, rtc);
547 return 0;
David Brownellf96411a2008-10-20 23:50:05 +0200548}
549
550/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100551 * Disable all TWL RTC module interrupts.
David Brownellf96411a2008-10-20 23:50:05 +0200552 * Sets status flag to free.
553 */
Greg Kroah-Hartman5a167f42012-12-21 13:09:38 -0800554static int twl_rtc_remove(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200555{
556 /* leave rtc running, but disable irqs */
David Brownellf96411a2008-10-20 23:50:05 +0200557 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
558 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100559 if (twl_class_is_6030()) {
560 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
561 REG_INT_MSK_LINE_A);
562 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
563 REG_INT_MSK_STS_A);
564 }
565
David Brownellf96411a2008-10-20 23:50:05 +0200566 return 0;
567}
568
Balaji T Kef3b7d02009-12-13 21:30:48 +0100569static void twl_rtc_shutdown(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200570{
Matti Halmecafa1d82009-01-15 13:50:56 -0800571 /* mask timer interrupts, but leave alarm interrupts on to enable
572 power-on when alarm is triggered */
573 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
David Brownellf96411a2008-10-20 23:50:05 +0200574}
575
Jingoo Hanb9d8c462013-04-29 16:21:04 -0700576#ifdef CONFIG_PM_SLEEP
David Brownellf96411a2008-10-20 23:50:05 +0200577static unsigned char irqstat;
578
Jingoo Hanb9d8c462013-04-29 16:21:04 -0700579static int twl_rtc_suspend(struct device *dev)
David Brownellf96411a2008-10-20 23:50:05 +0200580{
581 irqstat = rtc_irq_bits;
582
Kim Kyuwonf9930042009-05-12 13:19:38 -0700583 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
David Brownellf96411a2008-10-20 23:50:05 +0200584 return 0;
585}
586
Jingoo Hanb9d8c462013-04-29 16:21:04 -0700587static int twl_rtc_resume(struct device *dev)
David Brownellf96411a2008-10-20 23:50:05 +0200588{
589 set_rtc_irq_bit(irqstat);
590 return 0;
591}
David Brownellf96411a2008-10-20 23:50:05 +0200592#endif
593
Jingoo Hanb9d8c462013-04-29 16:21:04 -0700594static SIMPLE_DEV_PM_OPS(twl_rtc_pm_ops, twl_rtc_suspend, twl_rtc_resume);
595
Sachin Kamatc8a60462013-02-21 16:44:28 -0800596#ifdef CONFIG_OF
Benoit Cousson948170f2012-01-10 15:10:59 -0800597static const struct of_device_id twl_rtc_of_match[] = {
598 {.compatible = "ti,twl4030-rtc", },
599 { },
600};
601MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
Sachin Kamatc8a60462013-02-21 16:44:28 -0800602#endif
603
Balaji T Kef3b7d02009-12-13 21:30:48 +0100604MODULE_ALIAS("platform:twl_rtc");
David Brownellf96411a2008-10-20 23:50:05 +0200605
606static struct platform_driver twl4030rtc_driver = {
Balaji T Kef3b7d02009-12-13 21:30:48 +0100607 .probe = twl_rtc_probe,
Greg Kroah-Hartman5a167f42012-12-21 13:09:38 -0800608 .remove = twl_rtc_remove,
Balaji T Kef3b7d02009-12-13 21:30:48 +0100609 .shutdown = twl_rtc_shutdown,
David Brownellf96411a2008-10-20 23:50:05 +0200610 .driver = {
Benoit Cousson948170f2012-01-10 15:10:59 -0800611 .owner = THIS_MODULE,
612 .name = "twl_rtc",
Jingoo Hanb9d8c462013-04-29 16:21:04 -0700613 .pm = &twl_rtc_pm_ops,
Sachin Kamatc8a60462013-02-21 16:44:28 -0800614 .of_match_table = of_match_ptr(twl_rtc_of_match),
David Brownellf96411a2008-10-20 23:50:05 +0200615 },
616};
617
Peter Ujfalusi5ee67482013-07-03 15:07:56 -0700618module_platform_driver(twl4030rtc_driver);
David Brownellf96411a2008-10-20 23:50:05 +0200619
620MODULE_AUTHOR("Texas Instruments, MontaVista Software");
621MODULE_LICENSE("GPL");