David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 1 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 2 | * rtc-twl.c -- TWL Real Time Clock interface |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 MontaVista Software, Inc |
| 5 | * Author: Alexandre Rusev <source@mvista.com> |
| 6 | * |
| 7 | * Based on original TI driver twl4030-rtc.c |
| 8 | * Copyright (C) 2006 Texas Instruments, Inc. |
| 9 | * |
| 10 | * Based on rtc-omap.c |
| 11 | * Copyright (C) 2003 MontaVista Software, Inc. |
| 12 | * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> |
| 13 | * Copyright (C) 2006 David Brownell |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License |
| 17 | * as published by the Free Software Foundation; either version |
| 18 | * 2 of the License, or (at your option) any later version. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/kernel.h> |
Anton Vorontsov | 2fac667 | 2009-01-06 14:42:11 -0800 | [diff] [blame] | 22 | #include <linux/errno.h> |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 23 | #include <linux/init.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/types.h> |
| 26 | #include <linux/rtc.h> |
| 27 | #include <linux/bcd.h> |
| 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/interrupt.h> |
Sachin Kamat | c8a6046 | 2013-02-21 16:44:28 -0800 | [diff] [blame] | 30 | #include <linux/of.h> |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 31 | |
Santosh Shilimkar | b07682b | 2009-12-13 20:05:51 +0100 | [diff] [blame] | 32 | #include <linux/i2c/twl.h> |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 33 | |
| 34 | |
| 35 | /* |
| 36 | * RTC block register offsets (use TWL_MODULE_RTC) |
| 37 | */ |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 38 | enum { |
| 39 | REG_SECONDS_REG = 0, |
| 40 | REG_MINUTES_REG, |
| 41 | REG_HOURS_REG, |
| 42 | REG_DAYS_REG, |
| 43 | REG_MONTHS_REG, |
| 44 | REG_YEARS_REG, |
| 45 | REG_WEEKS_REG, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 46 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 47 | REG_ALARM_SECONDS_REG, |
| 48 | REG_ALARM_MINUTES_REG, |
| 49 | REG_ALARM_HOURS_REG, |
| 50 | REG_ALARM_DAYS_REG, |
| 51 | REG_ALARM_MONTHS_REG, |
| 52 | REG_ALARM_YEARS_REG, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 53 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 54 | REG_RTC_CTRL_REG, |
| 55 | REG_RTC_STATUS_REG, |
| 56 | REG_RTC_INTERRUPTS_REG, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 57 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 58 | REG_RTC_COMP_LSB_REG, |
| 59 | REG_RTC_COMP_MSB_REG, |
| 60 | }; |
Tobias Klauser | 2e84067 | 2010-03-05 13:44:23 -0800 | [diff] [blame] | 61 | static const u8 twl4030_rtc_reg_map[] = { |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 62 | [REG_SECONDS_REG] = 0x00, |
| 63 | [REG_MINUTES_REG] = 0x01, |
| 64 | [REG_HOURS_REG] = 0x02, |
| 65 | [REG_DAYS_REG] = 0x03, |
| 66 | [REG_MONTHS_REG] = 0x04, |
| 67 | [REG_YEARS_REG] = 0x05, |
| 68 | [REG_WEEKS_REG] = 0x06, |
| 69 | |
| 70 | [REG_ALARM_SECONDS_REG] = 0x07, |
| 71 | [REG_ALARM_MINUTES_REG] = 0x08, |
| 72 | [REG_ALARM_HOURS_REG] = 0x09, |
| 73 | [REG_ALARM_DAYS_REG] = 0x0A, |
| 74 | [REG_ALARM_MONTHS_REG] = 0x0B, |
| 75 | [REG_ALARM_YEARS_REG] = 0x0C, |
| 76 | |
| 77 | [REG_RTC_CTRL_REG] = 0x0D, |
| 78 | [REG_RTC_STATUS_REG] = 0x0E, |
| 79 | [REG_RTC_INTERRUPTS_REG] = 0x0F, |
| 80 | |
| 81 | [REG_RTC_COMP_LSB_REG] = 0x10, |
| 82 | [REG_RTC_COMP_MSB_REG] = 0x11, |
| 83 | }; |
Tobias Klauser | 2e84067 | 2010-03-05 13:44:23 -0800 | [diff] [blame] | 84 | static const u8 twl6030_rtc_reg_map[] = { |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 85 | [REG_SECONDS_REG] = 0x00, |
| 86 | [REG_MINUTES_REG] = 0x01, |
| 87 | [REG_HOURS_REG] = 0x02, |
| 88 | [REG_DAYS_REG] = 0x03, |
| 89 | [REG_MONTHS_REG] = 0x04, |
| 90 | [REG_YEARS_REG] = 0x05, |
| 91 | [REG_WEEKS_REG] = 0x06, |
| 92 | |
| 93 | [REG_ALARM_SECONDS_REG] = 0x08, |
| 94 | [REG_ALARM_MINUTES_REG] = 0x09, |
| 95 | [REG_ALARM_HOURS_REG] = 0x0A, |
| 96 | [REG_ALARM_DAYS_REG] = 0x0B, |
| 97 | [REG_ALARM_MONTHS_REG] = 0x0C, |
| 98 | [REG_ALARM_YEARS_REG] = 0x0D, |
| 99 | |
| 100 | [REG_RTC_CTRL_REG] = 0x10, |
| 101 | [REG_RTC_STATUS_REG] = 0x11, |
| 102 | [REG_RTC_INTERRUPTS_REG] = 0x12, |
| 103 | |
| 104 | [REG_RTC_COMP_LSB_REG] = 0x13, |
| 105 | [REG_RTC_COMP_MSB_REG] = 0x14, |
| 106 | }; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 107 | |
| 108 | /* RTC_CTRL_REG bitfields */ |
| 109 | #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 |
| 110 | #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 |
| 111 | #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 |
| 112 | #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 |
| 113 | #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 |
| 114 | #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 |
| 115 | #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 116 | #define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80 |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 117 | |
| 118 | /* RTC_STATUS_REG bitfields */ |
| 119 | #define BIT_RTC_STATUS_REG_RUN_M 0x02 |
| 120 | #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 |
| 121 | #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 |
| 122 | #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 |
| 123 | #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 |
| 124 | #define BIT_RTC_STATUS_REG_ALARM_M 0x40 |
| 125 | #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 |
| 126 | |
| 127 | /* RTC_INTERRUPTS_REG bitfields */ |
| 128 | #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 |
| 129 | #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 |
| 130 | #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 |
| 131 | |
| 132 | |
| 133 | /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ |
| 134 | #define ALL_TIME_REGS 6 |
| 135 | |
| 136 | /*----------------------------------------------------------------------*/ |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 137 | static u8 *rtc_reg_map; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 138 | |
| 139 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 140 | * Supports 1 byte read from TWL RTC register. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 141 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 142 | static int twl_rtc_read_u8(u8 *data, u8 reg) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 143 | { |
| 144 | int ret; |
| 145 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 146 | ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 147 | if (ret < 0) |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 148 | pr_err("twl_rtc: Could not read TWL" |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 149 | "register %X - error %d\n", reg, ret); |
| 150 | return ret; |
| 151 | } |
| 152 | |
| 153 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 154 | * Supports 1 byte write to TWL RTC registers. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 155 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 156 | static int twl_rtc_write_u8(u8 data, u8 reg) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 157 | { |
| 158 | int ret; |
| 159 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 160 | ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 161 | if (ret < 0) |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 162 | pr_err("twl_rtc: Could not write TWL" |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 163 | "register %X - error %d\n", reg, ret); |
| 164 | return ret; |
| 165 | } |
| 166 | |
| 167 | /* |
| 168 | * Cache the value for timer/alarm interrupts register; this is |
| 169 | * only changed by callers holding rtc ops lock (or resume). |
| 170 | */ |
| 171 | static unsigned char rtc_irq_bits; |
| 172 | |
| 173 | /* |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 174 | * Enable 1/second update and/or alarm interrupts. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 175 | */ |
| 176 | static int set_rtc_irq_bit(unsigned char bit) |
| 177 | { |
| 178 | unsigned char val; |
| 179 | int ret; |
| 180 | |
Venu Byravarasu | ce9f650 | 2012-03-23 15:02:32 -0700 | [diff] [blame] | 181 | /* if the bit is set, return from here */ |
| 182 | if (rtc_irq_bits & bit) |
| 183 | return 0; |
| 184 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 185 | val = rtc_irq_bits | bit; |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 186 | val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 187 | ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 188 | if (ret == 0) |
| 189 | rtc_irq_bits = val; |
| 190 | |
| 191 | return ret; |
| 192 | } |
| 193 | |
| 194 | /* |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 195 | * Disable update and/or alarm interrupts. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 196 | */ |
| 197 | static int mask_rtc_irq_bit(unsigned char bit) |
| 198 | { |
| 199 | unsigned char val; |
| 200 | int ret; |
| 201 | |
Venu Byravarasu | ce9f650 | 2012-03-23 15:02:32 -0700 | [diff] [blame] | 202 | /* if the bit is clear, return from here */ |
| 203 | if (!(rtc_irq_bits & bit)) |
| 204 | return 0; |
| 205 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 206 | val = rtc_irq_bits & ~bit; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 207 | ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 208 | if (ret == 0) |
| 209 | rtc_irq_bits = val; |
| 210 | |
| 211 | return ret; |
| 212 | } |
| 213 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 214 | static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 215 | { |
Kevin Hilman | ae84589 | 2013-07-03 15:07:53 -0700 | [diff] [blame] | 216 | struct platform_device *pdev = to_platform_device(dev); |
| 217 | int irq = platform_get_irq(pdev, 0); |
| 218 | static bool twl_rtc_wake_enabled; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 219 | int ret; |
| 220 | |
Kevin Hilman | ae84589 | 2013-07-03 15:07:53 -0700 | [diff] [blame] | 221 | if (enabled) { |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 222 | ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
Kevin Hilman | ae84589 | 2013-07-03 15:07:53 -0700 | [diff] [blame] | 223 | if (device_can_wakeup(dev) && !twl_rtc_wake_enabled) { |
| 224 | enable_irq_wake(irq); |
| 225 | twl_rtc_wake_enabled = true; |
| 226 | } |
| 227 | } else { |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 228 | ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
Kevin Hilman | ae84589 | 2013-07-03 15:07:53 -0700 | [diff] [blame] | 229 | if (twl_rtc_wake_enabled) { |
| 230 | disable_irq_wake(irq); |
| 231 | twl_rtc_wake_enabled = false; |
| 232 | } |
| 233 | } |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 234 | |
| 235 | return ret; |
| 236 | } |
| 237 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 238 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 239 | * Gets current TWL RTC time and date parameters. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 240 | * |
| 241 | * The RTC's time/alarm representation is not what gmtime(3) requires |
| 242 | * Linux to use: |
| 243 | * |
| 244 | * - Months are 1..12 vs Linux 0-11 |
| 245 | * - Years are 0..99 vs Linux 1900..N (we assume 21st century) |
| 246 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 247 | static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 248 | { |
Peter Ujfalusi | 14591d8 | 2012-11-13 09:28:45 +0100 | [diff] [blame] | 249 | unsigned char rtc_data[ALL_TIME_REGS]; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 250 | int ret; |
| 251 | u8 save_control; |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 252 | u8 rtc_control; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 253 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 254 | ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 255 | if (ret < 0) { |
| 256 | dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 257 | return ret; |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 258 | } |
| 259 | /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */ |
| 260 | if (twl_class_is_6030()) { |
| 261 | if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) { |
| 262 | save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M; |
| 263 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
| 264 | if (ret < 0) { |
| 265 | dev_err(dev, "%s clr GET_TIME, error %d\n", |
| 266 | __func__, ret); |
| 267 | return ret; |
| 268 | } |
| 269 | } |
| 270 | } |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 271 | |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 272 | /* Copy RTC counting registers to static registers or latches */ |
| 273 | rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 274 | |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 275 | /* for twl6030/32 enable read access to static shadowed registers */ |
| 276 | if (twl_class_is_6030()) |
| 277 | rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT; |
| 278 | |
| 279 | ret = twl_rtc_write_u8(rtc_control, REG_RTC_CTRL_REG); |
| 280 | if (ret < 0) { |
| 281 | dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 282 | return ret; |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 283 | } |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 284 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 285 | ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 286 | (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 287 | |
| 288 | if (ret < 0) { |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 289 | dev_err(dev, "%s: reading data, error %d\n", __func__, ret); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 290 | return ret; |
| 291 | } |
| 292 | |
Konstantin Shlyakhovoy | f3ec434 | 2012-04-12 12:49:15 -0700 | [diff] [blame] | 293 | /* for twl6030 restore original state of rtc control register */ |
| 294 | if (twl_class_is_6030()) { |
| 295 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
| 296 | if (ret < 0) { |
| 297 | dev_err(dev, "%s: restore CTRL_REG, error %d\n", |
| 298 | __func__, ret); |
| 299 | return ret; |
| 300 | } |
| 301 | } |
| 302 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 303 | tm->tm_sec = bcd2bin(rtc_data[0]); |
| 304 | tm->tm_min = bcd2bin(rtc_data[1]); |
| 305 | tm->tm_hour = bcd2bin(rtc_data[2]); |
| 306 | tm->tm_mday = bcd2bin(rtc_data[3]); |
| 307 | tm->tm_mon = bcd2bin(rtc_data[4]) - 1; |
| 308 | tm->tm_year = bcd2bin(rtc_data[5]) + 100; |
| 309 | |
| 310 | return ret; |
| 311 | } |
| 312 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 313 | static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 314 | { |
| 315 | unsigned char save_control; |
Peter Ujfalusi | 14591d8 | 2012-11-13 09:28:45 +0100 | [diff] [blame] | 316 | unsigned char rtc_data[ALL_TIME_REGS]; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 317 | int ret; |
| 318 | |
Peter Ujfalusi | 14591d8 | 2012-11-13 09:28:45 +0100 | [diff] [blame] | 319 | rtc_data[0] = bin2bcd(tm->tm_sec); |
| 320 | rtc_data[1] = bin2bcd(tm->tm_min); |
| 321 | rtc_data[2] = bin2bcd(tm->tm_hour); |
| 322 | rtc_data[3] = bin2bcd(tm->tm_mday); |
| 323 | rtc_data[4] = bin2bcd(tm->tm_mon + 1); |
| 324 | rtc_data[5] = bin2bcd(tm->tm_year - 100); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 325 | |
| 326 | /* Stop RTC while updating the TC registers */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 327 | ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 328 | if (ret < 0) |
| 329 | goto out; |
| 330 | |
| 331 | save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; |
Jesper Juhl | 8f6b0dd | 2011-07-25 17:13:34 -0700 | [diff] [blame] | 332 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 333 | if (ret < 0) |
| 334 | goto out; |
| 335 | |
| 336 | /* update all the time registers in one shot */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 337 | ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 338 | (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 339 | if (ret < 0) { |
| 340 | dev_err(dev, "rtc_set_time error %d\n", ret); |
| 341 | goto out; |
| 342 | } |
| 343 | |
| 344 | /* Start back RTC */ |
| 345 | save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 346 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 347 | |
| 348 | out: |
| 349 | return ret; |
| 350 | } |
| 351 | |
| 352 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 353 | * Gets current TWL RTC alarm time. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 354 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 355 | static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 356 | { |
Peter Ujfalusi | 14591d8 | 2012-11-13 09:28:45 +0100 | [diff] [blame] | 357 | unsigned char rtc_data[ALL_TIME_REGS]; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 358 | int ret; |
| 359 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 360 | ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 361 | (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 362 | if (ret < 0) { |
| 363 | dev_err(dev, "rtc_read_alarm error %d\n", ret); |
| 364 | return ret; |
| 365 | } |
| 366 | |
| 367 | /* some of these fields may be wildcard/"match all" */ |
| 368 | alm->time.tm_sec = bcd2bin(rtc_data[0]); |
| 369 | alm->time.tm_min = bcd2bin(rtc_data[1]); |
| 370 | alm->time.tm_hour = bcd2bin(rtc_data[2]); |
| 371 | alm->time.tm_mday = bcd2bin(rtc_data[3]); |
| 372 | alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; |
| 373 | alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; |
| 374 | |
| 375 | /* report cached alarm enable state */ |
| 376 | if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) |
| 377 | alm->enabled = 1; |
| 378 | |
| 379 | return ret; |
| 380 | } |
| 381 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 382 | static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 383 | { |
Peter Ujfalusi | 14591d8 | 2012-11-13 09:28:45 +0100 | [diff] [blame] | 384 | unsigned char alarm_data[ALL_TIME_REGS]; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 385 | int ret; |
| 386 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 387 | ret = twl_rtc_alarm_irq_enable(dev, 0); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 388 | if (ret) |
| 389 | goto out; |
| 390 | |
Peter Ujfalusi | 14591d8 | 2012-11-13 09:28:45 +0100 | [diff] [blame] | 391 | alarm_data[0] = bin2bcd(alm->time.tm_sec); |
| 392 | alarm_data[1] = bin2bcd(alm->time.tm_min); |
| 393 | alarm_data[2] = bin2bcd(alm->time.tm_hour); |
| 394 | alarm_data[3] = bin2bcd(alm->time.tm_mday); |
| 395 | alarm_data[4] = bin2bcd(alm->time.tm_mon + 1); |
| 396 | alarm_data[5] = bin2bcd(alm->time.tm_year - 100); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 397 | |
| 398 | /* update all the alarm registers in one shot */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 399 | ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 400 | (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 401 | if (ret) { |
| 402 | dev_err(dev, "rtc_set_alarm error %d\n", ret); |
| 403 | goto out; |
| 404 | } |
| 405 | |
| 406 | if (alm->enabled) |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 407 | ret = twl_rtc_alarm_irq_enable(dev, 1); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 408 | out: |
| 409 | return ret; |
| 410 | } |
| 411 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 412 | static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 413 | { |
Venu Byravarasu | 2778ebc | 2012-03-23 15:02:34 -0700 | [diff] [blame] | 414 | unsigned long events; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 415 | int ret = IRQ_NONE; |
| 416 | int res; |
| 417 | u8 rd_reg; |
| 418 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 419 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 420 | if (res) |
| 421 | goto out; |
| 422 | /* |
| 423 | * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. |
| 424 | * only one (ALARM or RTC) interrupt source may be enabled |
| 425 | * at time, we also could check our results |
| 426 | * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] |
| 427 | */ |
| 428 | if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) |
Venu Byravarasu | 2778ebc | 2012-03-23 15:02:34 -0700 | [diff] [blame] | 429 | events = RTC_IRQF | RTC_AF; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 430 | else |
Venu Byravarasu | 2778ebc | 2012-03-23 15:02:34 -0700 | [diff] [blame] | 431 | events = RTC_IRQF | RTC_PF; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 432 | |
Venu Byravarasu | 94a339d | 2012-03-23 15:02:33 -0700 | [diff] [blame] | 433 | res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 434 | REG_RTC_STATUS_REG); |
| 435 | if (res) |
| 436 | goto out; |
| 437 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 438 | if (twl_class_is_4030()) { |
| 439 | /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 |
| 440 | * needs 2 reads to clear the interrupt. One read is done in |
| 441 | * do_twl_pwrirq(). Doing the second read, to clear |
| 442 | * the bit. |
| 443 | * |
| 444 | * FIXME the reason PWR_ISR1 needs an extra read is that |
| 445 | * RTC_IF retriggered until we cleared REG_ALARM_M above. |
| 446 | * But re-reading like this is a bad hack; by doing so we |
| 447 | * risk wrongly clearing status for some other IRQ (losing |
| 448 | * the interrupt). Be smarter about handling RTC_UF ... |
| 449 | */ |
| 450 | res = twl_i2c_read_u8(TWL4030_MODULE_INT, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 451 | &rd_reg, TWL4030_INT_PWR_ISR1); |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 452 | if (res) |
| 453 | goto out; |
| 454 | } |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 455 | |
| 456 | /* Notify RTC core on event */ |
| 457 | rtc_update_irq(rtc, 1, events); |
| 458 | |
| 459 | ret = IRQ_HANDLED; |
| 460 | out: |
| 461 | return ret; |
| 462 | } |
| 463 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 464 | static struct rtc_class_ops twl_rtc_ops = { |
| 465 | .read_time = twl_rtc_read_time, |
| 466 | .set_time = twl_rtc_set_time, |
| 467 | .read_alarm = twl_rtc_read_alarm, |
| 468 | .set_alarm = twl_rtc_set_alarm, |
| 469 | .alarm_irq_enable = twl_rtc_alarm_irq_enable, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 470 | }; |
| 471 | |
| 472 | /*----------------------------------------------------------------------*/ |
| 473 | |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 474 | static int twl_rtc_probe(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 475 | { |
| 476 | struct rtc_device *rtc; |
Todd Poynor | 7e72c68 | 2011-08-10 20:20:36 -0700 | [diff] [blame] | 477 | int ret = -EINVAL; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 478 | int irq = platform_get_irq(pdev, 0); |
| 479 | u8 rd_reg; |
| 480 | |
Anton Vorontsov | 2fac667 | 2009-01-06 14:42:11 -0800 | [diff] [blame] | 481 | if (irq <= 0) |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 482 | return ret; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 483 | |
Peter Ujfalusi | d3869ff | 2013-07-03 15:07:55 -0700 | [diff] [blame] | 484 | /* Initialize the register map */ |
| 485 | if (twl_class_is_4030()) |
| 486 | rtc_reg_map = (u8 *)twl4030_rtc_reg_map; |
| 487 | else |
| 488 | rtc_reg_map = (u8 *)twl6030_rtc_reg_map; |
| 489 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 490 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 491 | if (ret < 0) |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 492 | return ret; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 493 | |
| 494 | if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) |
| 495 | dev_warn(&pdev->dev, "Power up reset detected.\n"); |
| 496 | |
| 497 | if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) |
| 498 | dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); |
| 499 | |
| 500 | /* Clear RTC Power up reset and pending alarm interrupts */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 501 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 502 | if (ret < 0) |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 503 | return ret; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 504 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 505 | if (twl_class_is_6030()) { |
| 506 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, |
| 507 | REG_INT_MSK_LINE_A); |
| 508 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, |
| 509 | REG_INT_MSK_STS_A); |
| 510 | } |
| 511 | |
Venu Byravarasu | f7439bc | 2012-03-23 15:02:33 -0700 | [diff] [blame] | 512 | dev_info(&pdev->dev, "Enabling TWL-RTC\n"); |
| 513 | ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 514 | if (ret < 0) |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 515 | return ret; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 516 | |
Kevin Hilman | 8dcebaa9 | 2012-09-17 14:09:17 -0700 | [diff] [blame] | 517 | /* ensure interrupts are disabled, bootloaders can be strange */ |
| 518 | ret = twl_rtc_write_u8(0, REG_RTC_INTERRUPTS_REG); |
| 519 | if (ret < 0) |
| 520 | dev_warn(&pdev->dev, "unable to disable interrupt\n"); |
| 521 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 522 | /* init cached IRQ enable bits */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 523 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 524 | if (ret < 0) |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 525 | return ret; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 526 | |
Grygorii Strashko | b99b94b | 2013-07-31 13:53:41 -0700 | [diff] [blame] | 527 | device_init_wakeup(&pdev->dev, 1); |
| 528 | |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 529 | rtc = devm_rtc_device_register(&pdev->dev, pdev->name, |
| 530 | &twl_rtc_ops, THIS_MODULE); |
Todd Poynor | 7e72c68 | 2011-08-10 20:20:36 -0700 | [diff] [blame] | 531 | if (IS_ERR(rtc)) { |
Todd Poynor | 7e72c68 | 2011-08-10 20:20:36 -0700 | [diff] [blame] | 532 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", |
| 533 | PTR_ERR(rtc)); |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 534 | return PTR_ERR(rtc); |
Todd Poynor | 7e72c68 | 2011-08-10 20:20:36 -0700 | [diff] [blame] | 535 | } |
| 536 | |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 537 | ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, |
| 538 | twl_rtc_interrupt, |
| 539 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, |
| 540 | dev_name(&rtc->dev), rtc); |
Todd Poynor | 7e72c68 | 2011-08-10 20:20:36 -0700 | [diff] [blame] | 541 | if (ret < 0) { |
| 542 | dev_err(&pdev->dev, "IRQ is not free.\n"); |
Jingoo Han | f53eeb8 | 2014-01-23 15:55:06 -0800 | [diff] [blame] | 543 | return ret; |
Todd Poynor | 7e72c68 | 2011-08-10 20:20:36 -0700 | [diff] [blame] | 544 | } |
| 545 | |
| 546 | platform_set_drvdata(pdev, rtc); |
| 547 | return 0; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 548 | } |
| 549 | |
| 550 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 551 | * Disable all TWL RTC module interrupts. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 552 | * Sets status flag to free. |
| 553 | */ |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 554 | static int twl_rtc_remove(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 555 | { |
| 556 | /* leave rtc running, but disable irqs */ |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 557 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
| 558 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 559 | if (twl_class_is_6030()) { |
| 560 | twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, |
| 561 | REG_INT_MSK_LINE_A); |
| 562 | twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, |
| 563 | REG_INT_MSK_STS_A); |
| 564 | } |
| 565 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 566 | return 0; |
| 567 | } |
| 568 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 569 | static void twl_rtc_shutdown(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 570 | { |
Matti Halme | cafa1d8 | 2009-01-15 13:50:56 -0800 | [diff] [blame] | 571 | /* mask timer interrupts, but leave alarm interrupts on to enable |
| 572 | power-on when alarm is triggered */ |
| 573 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 574 | } |
| 575 | |
Jingoo Han | b9d8c46 | 2013-04-29 16:21:04 -0700 | [diff] [blame] | 576 | #ifdef CONFIG_PM_SLEEP |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 577 | static unsigned char irqstat; |
| 578 | |
Jingoo Han | b9d8c46 | 2013-04-29 16:21:04 -0700 | [diff] [blame] | 579 | static int twl_rtc_suspend(struct device *dev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 580 | { |
| 581 | irqstat = rtc_irq_bits; |
| 582 | |
Kim Kyuwon | f993004 | 2009-05-12 13:19:38 -0700 | [diff] [blame] | 583 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 584 | return 0; |
| 585 | } |
| 586 | |
Jingoo Han | b9d8c46 | 2013-04-29 16:21:04 -0700 | [diff] [blame] | 587 | static int twl_rtc_resume(struct device *dev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 588 | { |
| 589 | set_rtc_irq_bit(irqstat); |
| 590 | return 0; |
| 591 | } |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 592 | #endif |
| 593 | |
Jingoo Han | b9d8c46 | 2013-04-29 16:21:04 -0700 | [diff] [blame] | 594 | static SIMPLE_DEV_PM_OPS(twl_rtc_pm_ops, twl_rtc_suspend, twl_rtc_resume); |
| 595 | |
Sachin Kamat | c8a6046 | 2013-02-21 16:44:28 -0800 | [diff] [blame] | 596 | #ifdef CONFIG_OF |
Benoit Cousson | 948170f | 2012-01-10 15:10:59 -0800 | [diff] [blame] | 597 | static const struct of_device_id twl_rtc_of_match[] = { |
| 598 | {.compatible = "ti,twl4030-rtc", }, |
| 599 | { }, |
| 600 | }; |
| 601 | MODULE_DEVICE_TABLE(of, twl_rtc_of_match); |
Sachin Kamat | c8a6046 | 2013-02-21 16:44:28 -0800 | [diff] [blame] | 602 | #endif |
| 603 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 604 | MODULE_ALIAS("platform:twl_rtc"); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 605 | |
| 606 | static struct platform_driver twl4030rtc_driver = { |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 607 | .probe = twl_rtc_probe, |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 608 | .remove = twl_rtc_remove, |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 609 | .shutdown = twl_rtc_shutdown, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 610 | .driver = { |
Benoit Cousson | 948170f | 2012-01-10 15:10:59 -0800 | [diff] [blame] | 611 | .owner = THIS_MODULE, |
| 612 | .name = "twl_rtc", |
Jingoo Han | b9d8c46 | 2013-04-29 16:21:04 -0700 | [diff] [blame] | 613 | .pm = &twl_rtc_pm_ops, |
Sachin Kamat | c8a6046 | 2013-02-21 16:44:28 -0800 | [diff] [blame] | 614 | .of_match_table = of_match_ptr(twl_rtc_of_match), |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 615 | }, |
| 616 | }; |
| 617 | |
Peter Ujfalusi | 5ee6748 | 2013-07-03 15:07:56 -0700 | [diff] [blame] | 618 | module_platform_driver(twl4030rtc_driver); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 619 | |
| 620 | MODULE_AUTHOR("Texas Instruments, MontaVista Software"); |
| 621 | MODULE_LICENSE("GPL"); |