James Hogan | 373cd78 | 2012-10-09 10:54:17 +0100 | [diff] [blame] | 1 | #ifndef _ASM_METAG_IO_H |
| 2 | #define _ASM_METAG_IO_H |
| 3 | |
| 4 | #include <linux/types.h> |
| 5 | |
| 6 | #define IO_SPACE_LIMIT 0 |
| 7 | |
| 8 | #define page_to_bus page_to_phys |
| 9 | #define bus_to_page phys_to_page |
| 10 | |
| 11 | /* |
| 12 | * Generic I/O |
| 13 | */ |
| 14 | |
| 15 | #define __raw_readb __raw_readb |
| 16 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
| 17 | { |
| 18 | u8 ret; |
| 19 | asm volatile("GETB %0,[%1]" |
| 20 | : "=da" (ret) |
| 21 | : "da" (addr) |
| 22 | : "memory"); |
| 23 | return ret; |
| 24 | } |
| 25 | |
| 26 | #define __raw_readw __raw_readw |
| 27 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
| 28 | { |
| 29 | u16 ret; |
| 30 | asm volatile("GETW %0,[%1]" |
| 31 | : "=da" (ret) |
| 32 | : "da" (addr) |
| 33 | : "memory"); |
| 34 | return ret; |
| 35 | } |
| 36 | |
| 37 | #define __raw_readl __raw_readl |
| 38 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
| 39 | { |
| 40 | u32 ret; |
| 41 | asm volatile("GETD %0,[%1]" |
| 42 | : "=da" (ret) |
| 43 | : "da" (addr) |
| 44 | : "memory"); |
| 45 | return ret; |
| 46 | } |
| 47 | |
| 48 | #define __raw_readq __raw_readq |
| 49 | static inline u64 __raw_readq(const volatile void __iomem *addr) |
| 50 | { |
| 51 | u64 ret; |
| 52 | asm volatile("GETL %0,%t0,[%1]" |
| 53 | : "=da" (ret) |
| 54 | : "da" (addr) |
| 55 | : "memory"); |
| 56 | return ret; |
| 57 | } |
| 58 | |
| 59 | #define __raw_writeb __raw_writeb |
| 60 | static inline void __raw_writeb(u8 b, volatile void __iomem *addr) |
| 61 | { |
| 62 | asm volatile("SETB [%0],%1" |
| 63 | : |
| 64 | : "da" (addr), |
| 65 | "da" (b) |
| 66 | : "memory"); |
| 67 | } |
| 68 | |
| 69 | #define __raw_writew __raw_writew |
| 70 | static inline void __raw_writew(u16 b, volatile void __iomem *addr) |
| 71 | { |
| 72 | asm volatile("SETW [%0],%1" |
| 73 | : |
| 74 | : "da" (addr), |
| 75 | "da" (b) |
| 76 | : "memory"); |
| 77 | } |
| 78 | |
| 79 | #define __raw_writel __raw_writel |
| 80 | static inline void __raw_writel(u32 b, volatile void __iomem *addr) |
| 81 | { |
| 82 | asm volatile("SETD [%0],%1" |
| 83 | : |
| 84 | : "da" (addr), |
| 85 | "da" (b) |
| 86 | : "memory"); |
| 87 | } |
| 88 | |
| 89 | #define __raw_writeq __raw_writeq |
| 90 | static inline void __raw_writeq(u64 b, volatile void __iomem *addr) |
| 91 | { |
| 92 | asm volatile("SETL [%0],%1,%t1" |
| 93 | : |
| 94 | : "da" (addr), |
| 95 | "da" (b) |
| 96 | : "memory"); |
| 97 | } |
| 98 | |
| 99 | /* |
| 100 | * The generic io.h can define all the other generic accessors |
| 101 | */ |
| 102 | |
| 103 | #include <asm-generic/io.h> |
| 104 | |
| 105 | /* |
| 106 | * Despite being a 32bit architecture, Meta can do 64bit memory accesses |
| 107 | * (assuming the bus supports it). |
| 108 | */ |
| 109 | |
| 110 | #define readq __raw_readq |
| 111 | #define writeq __raw_writeq |
| 112 | |
| 113 | /* |
| 114 | * Meta specific I/O for accessing non-MMU areas. |
| 115 | * |
| 116 | * These can be provided with a physical address rather than an __iomem pointer |
| 117 | * and should only be used by core architecture code for accessing fixed core |
| 118 | * registers. Generic drivers should use ioremap and the generic I/O accessors. |
| 119 | */ |
| 120 | |
| 121 | #define metag_in8(addr) __raw_readb((volatile void __iomem *)(addr)) |
| 122 | #define metag_in16(addr) __raw_readw((volatile void __iomem *)(addr)) |
| 123 | #define metag_in32(addr) __raw_readl((volatile void __iomem *)(addr)) |
| 124 | #define metag_in64(addr) __raw_readq((volatile void __iomem *)(addr)) |
| 125 | |
| 126 | #define metag_out8(b, addr) __raw_writeb(b, (volatile void __iomem *)(addr)) |
| 127 | #define metag_out16(b, addr) __raw_writew(b, (volatile void __iomem *)(addr)) |
| 128 | #define metag_out32(b, addr) __raw_writel(b, (volatile void __iomem *)(addr)) |
| 129 | #define metag_out64(b, addr) __raw_writeq(b, (volatile void __iomem *)(addr)) |
| 130 | |
| 131 | /* |
| 132 | * io remapping functions |
| 133 | */ |
| 134 | |
| 135 | extern void __iomem *__ioremap(unsigned long offset, |
| 136 | size_t size, unsigned long flags); |
| 137 | extern void __iounmap(void __iomem *addr); |
| 138 | |
| 139 | /** |
| 140 | * ioremap - map bus memory into CPU space |
| 141 | * @offset: bus address of the memory |
| 142 | * @size: size of the resource to map |
| 143 | * |
| 144 | * ioremap performs a platform specific sequence of operations to |
| 145 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ |
| 146 | * writew/writel functions and the other mmio helpers. The returned |
| 147 | * address is not guaranteed to be usable directly as a virtual |
| 148 | * address. |
| 149 | */ |
| 150 | #define ioremap(offset, size) \ |
| 151 | __ioremap((offset), (size), 0) |
| 152 | |
| 153 | #define ioremap_nocache(offset, size) \ |
| 154 | __ioremap((offset), (size), 0) |
| 155 | |
| 156 | #define ioremap_cached(offset, size) \ |
| 157 | __ioremap((offset), (size), _PAGE_CACHEABLE) |
| 158 | |
| 159 | #define ioremap_wc(offset, size) \ |
| 160 | __ioremap((offset), (size), _PAGE_WR_COMBINE) |
| 161 | |
| 162 | #define iounmap(addr) \ |
| 163 | __iounmap(addr) |
| 164 | |
| 165 | #endif /* _ASM_METAG_IO_H */ |