Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008-2009 Atheros Communications Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 17 | #include "hw.h" |
Luis R. Rodriguez | 8fe6536 | 2010-04-15 17:38:14 -0400 | [diff] [blame] | 18 | #include "ar9002_phy.h" |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 19 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 20 | #define NUM_EEP_WORDS (sizeof(struct ar9287_eeprom) / sizeof(u16)) |
| 21 | |
| 22 | static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 23 | { |
| 24 | return (ah->eeprom.map9287.baseEepHeader.version >> 12) & 0xF; |
| 25 | } |
| 26 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 27 | static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 28 | { |
| 29 | return (ah->eeprom.map9287.baseEepHeader.version) & 0xFFF; |
| 30 | } |
| 31 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 32 | static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 33 | { |
| 34 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 35 | struct ath_common *common = ath9k_hw_common(ah); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 36 | u16 *eep_data; |
| 37 | int addr, eep_start_loc = AR9287_EEP_START_LOC; |
| 38 | eep_data = (u16 *)eep; |
| 39 | |
| 40 | if (!ath9k_hw_use_flash(ah)) { |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 41 | ath_print(common, ATH_DBG_EEPROM, |
| 42 | "Reading from EEPROM, not flash\n"); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 43 | } |
| 44 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 45 | for (addr = 0; addr < NUM_EEP_WORDS; addr++) { |
| 46 | if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, |
| 47 | eep_data)) { |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 48 | ath_print(common, ATH_DBG_EEPROM, |
Frans Pop | 60ece40 | 2010-03-24 19:46:30 +0100 | [diff] [blame] | 49 | "Unable to read eeprom region\n"); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 50 | return false; |
| 51 | } |
| 52 | eep_data++; |
| 53 | } |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 54 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 55 | return true; |
| 56 | } |
| 57 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 58 | static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 59 | { |
| 60 | u32 sum = 0, el, integer; |
| 61 | u16 temp, word, magic, magic2, *eepdata; |
| 62 | int i, addr; |
| 63 | bool need_swap = false; |
| 64 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 65 | struct ath_common *common = ath9k_hw_common(ah); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 66 | |
| 67 | if (!ath9k_hw_use_flash(ah)) { |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 68 | if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET, |
| 69 | &magic)) { |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 70 | ath_print(common, ATH_DBG_FATAL, |
| 71 | "Reading Magic # failed\n"); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 72 | return false; |
| 73 | } |
| 74 | |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 75 | ath_print(common, ATH_DBG_EEPROM, |
| 76 | "Read Magic = 0x%04X\n", magic); |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 77 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 78 | if (magic != AR5416_EEPROM_MAGIC) { |
| 79 | magic2 = swab16(magic); |
| 80 | |
| 81 | if (magic2 == AR5416_EEPROM_MAGIC) { |
| 82 | need_swap = true; |
| 83 | eepdata = (u16 *)(&ah->eeprom); |
| 84 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 85 | for (addr = 0; addr < NUM_EEP_WORDS; addr++) { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 86 | temp = swab16(*eepdata); |
| 87 | *eepdata = temp; |
| 88 | eepdata++; |
| 89 | } |
| 90 | } else { |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 91 | ath_print(common, ATH_DBG_FATAL, |
| 92 | "Invalid EEPROM Magic. " |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 93 | "Endianness mismatch.\n"); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 94 | return -EINVAL; |
| 95 | } |
| 96 | } |
| 97 | } |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 98 | |
| 99 | ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", |
| 100 | need_swap ? "True" : "False"); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 101 | |
| 102 | if (need_swap) |
| 103 | el = swab16(ah->eeprom.map9287.baseEepHeader.length); |
| 104 | else |
| 105 | el = ah->eeprom.map9287.baseEepHeader.length; |
| 106 | |
| 107 | if (el > sizeof(struct ar9287_eeprom)) |
| 108 | el = sizeof(struct ar9287_eeprom) / sizeof(u16); |
| 109 | else |
| 110 | el = el / sizeof(u16); |
| 111 | |
| 112 | eepdata = (u16 *)(&ah->eeprom); |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 113 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 114 | for (i = 0; i < el; i++) |
| 115 | sum ^= *eepdata++; |
| 116 | |
| 117 | if (need_swap) { |
| 118 | word = swab16(eep->baseEepHeader.length); |
| 119 | eep->baseEepHeader.length = word; |
| 120 | |
| 121 | word = swab16(eep->baseEepHeader.checksum); |
| 122 | eep->baseEepHeader.checksum = word; |
| 123 | |
| 124 | word = swab16(eep->baseEepHeader.version); |
| 125 | eep->baseEepHeader.version = word; |
| 126 | |
| 127 | word = swab16(eep->baseEepHeader.regDmn[0]); |
| 128 | eep->baseEepHeader.regDmn[0] = word; |
| 129 | |
| 130 | word = swab16(eep->baseEepHeader.regDmn[1]); |
| 131 | eep->baseEepHeader.regDmn[1] = word; |
| 132 | |
| 133 | word = swab16(eep->baseEepHeader.rfSilent); |
| 134 | eep->baseEepHeader.rfSilent = word; |
| 135 | |
| 136 | word = swab16(eep->baseEepHeader.blueToothOptions); |
| 137 | eep->baseEepHeader.blueToothOptions = word; |
| 138 | |
| 139 | word = swab16(eep->baseEepHeader.deviceCap); |
| 140 | eep->baseEepHeader.deviceCap = word; |
| 141 | |
| 142 | integer = swab32(eep->modalHeader.antCtrlCommon); |
| 143 | eep->modalHeader.antCtrlCommon = integer; |
| 144 | |
| 145 | for (i = 0; i < AR9287_MAX_CHAINS; i++) { |
| 146 | integer = swab32(eep->modalHeader.antCtrlChain[i]); |
| 147 | eep->modalHeader.antCtrlChain[i] = integer; |
| 148 | } |
| 149 | |
| 150 | for (i = 0; i < AR9287_EEPROM_MODAL_SPURS; i++) { |
| 151 | word = swab16(eep->modalHeader.spurChans[i].spurChan); |
| 152 | eep->modalHeader.spurChans[i].spurChan = word; |
| 153 | } |
| 154 | } |
| 155 | |
| 156 | if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR9287_EEP_VER |
| 157 | || ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) { |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 158 | ath_print(common, ATH_DBG_FATAL, |
| 159 | "Bad EEPROM checksum 0x%x or revision 0x%04x\n", |
| 160 | sum, ah->eep_ops->get_eeprom_ver(ah)); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 161 | return -EINVAL; |
| 162 | } |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 167 | static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 168 | enum eeprom_param param) |
| 169 | { |
| 170 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
| 171 | struct modal_eep_ar9287_header *pModal = &eep->modalHeader; |
| 172 | struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; |
| 173 | u16 ver_minor; |
| 174 | |
| 175 | ver_minor = pBase->version & AR9287_EEP_VER_MINOR_MASK; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 176 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 177 | switch (param) { |
| 178 | case EEP_NFTHRESH_2: |
| 179 | return pModal->noiseFloorThreshCh[0]; |
Luis R. Rodriguez | 4910167 | 2010-04-15 17:39:13 -0400 | [diff] [blame] | 180 | case EEP_MAC_LSW: |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 181 | return pBase->macAddr[0] << 8 | pBase->macAddr[1]; |
Luis R. Rodriguez | 4910167 | 2010-04-15 17:39:13 -0400 | [diff] [blame] | 182 | case EEP_MAC_MID: |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 183 | return pBase->macAddr[2] << 8 | pBase->macAddr[3]; |
Luis R. Rodriguez | 4910167 | 2010-04-15 17:39:13 -0400 | [diff] [blame] | 184 | case EEP_MAC_MSW: |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 185 | return pBase->macAddr[4] << 8 | pBase->macAddr[5]; |
| 186 | case EEP_REG_0: |
| 187 | return pBase->regDmn[0]; |
| 188 | case EEP_REG_1: |
| 189 | return pBase->regDmn[1]; |
| 190 | case EEP_OP_CAP: |
| 191 | return pBase->deviceCap; |
| 192 | case EEP_OP_MODE: |
| 193 | return pBase->opCapFlags; |
| 194 | case EEP_RF_SILENT: |
| 195 | return pBase->rfSilent; |
| 196 | case EEP_MINOR_REV: |
| 197 | return ver_minor; |
| 198 | case EEP_TX_MASK: |
| 199 | return pBase->txMask; |
| 200 | case EEP_RX_MASK: |
| 201 | return pBase->rxMask; |
| 202 | case EEP_DEV_TYPE: |
| 203 | return pBase->deviceType; |
| 204 | case EEP_OL_PWRCTRL: |
| 205 | return pBase->openLoopPwrCntl; |
| 206 | case EEP_TEMPSENSE_SLOPE: |
| 207 | if (ver_minor >= AR9287_EEP_MINOR_VER_2) |
| 208 | return pBase->tempSensSlope; |
| 209 | else |
| 210 | return 0; |
| 211 | case EEP_TEMPSENSE_SLOPE_PAL_ON: |
| 212 | if (ver_minor >= AR9287_EEP_MINOR_VER_3) |
| 213 | return pBase->tempSensSlopePalOn; |
| 214 | else |
| 215 | return 0; |
| 216 | default: |
| 217 | return 0; |
| 218 | } |
| 219 | } |
| 220 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 221 | static void ath9k_hw_get_ar9287_gain_boundaries_pdadcs(struct ath_hw *ah, |
| 222 | struct ath9k_channel *chan, |
| 223 | struct cal_data_per_freq_ar9287 *pRawDataSet, |
| 224 | u8 *bChans, u16 availPiers, |
| 225 | u16 tPdGainOverlap, |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 226 | u16 *pPdGainBoundaries, |
| 227 | u8 *pPDADCValues, |
| 228 | u16 numXpdGains) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 229 | { |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 230 | #define TMP_VAL_VPD_TABLE \ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 231 | ((vpdTableI[i][sizeCurrVpdTable - 1] + (ss - maxIndex + 1) * vpdStep)); |
| 232 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 233 | int i, j, k; |
| 234 | int16_t ss; |
| 235 | u16 idxL = 0, idxR = 0, numPiers; |
| 236 | u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR; |
| 237 | u8 minPwrT4[AR9287_NUM_PD_GAINS]; |
| 238 | u8 maxPwrT4[AR9287_NUM_PD_GAINS]; |
| 239 | int16_t vpdStep; |
| 240 | int16_t tmpVal; |
| 241 | u16 sizeCurrVpdTable, maxIndex, tgtIndex; |
| 242 | bool match; |
| 243 | int16_t minDelta = 0; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 244 | struct chan_centers centers; |
| 245 | static u8 vpdTableL[AR5416_EEP4K_NUM_PD_GAINS] |
| 246 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
| 247 | static u8 vpdTableR[AR5416_EEP4K_NUM_PD_GAINS] |
| 248 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
| 249 | static u8 vpdTableI[AR5416_EEP4K_NUM_PD_GAINS] |
| 250 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
| 251 | |
Prarit Bhargava | a5fdbca | 2010-05-27 14:14:54 -0400 | [diff] [blame] | 252 | memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 253 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
| 254 | |
| 255 | for (numPiers = 0; numPiers < availPiers; numPiers++) { |
| 256 | if (bChans[numPiers] == AR9287_BCHAN_UNUSED) |
| 257 | break; |
| 258 | } |
| 259 | |
| 260 | match = ath9k_hw_get_lower_upper_index( |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 261 | (u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), |
| 262 | bChans, numPiers, &idxL, &idxR); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 263 | |
| 264 | if (match) { |
| 265 | for (i = 0; i < numXpdGains; i++) { |
| 266 | minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0]; |
| 267 | maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4]; |
| 268 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 269 | pRawDataSet[idxL].pwrPdg[i], |
| 270 | pRawDataSet[idxL].vpdPdg[i], |
| 271 | AR9287_PD_GAIN_ICEPTS, |
| 272 | vpdTableI[i]); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 273 | } |
| 274 | } else { |
| 275 | for (i = 0; i < numXpdGains; i++) { |
| 276 | pVpdL = pRawDataSet[idxL].vpdPdg[i]; |
| 277 | pPwrL = pRawDataSet[idxL].pwrPdg[i]; |
| 278 | pVpdR = pRawDataSet[idxR].vpdPdg[i]; |
| 279 | pPwrR = pRawDataSet[idxR].pwrPdg[i]; |
| 280 | |
| 281 | minPwrT4[i] = max(pPwrL[0], pPwrR[0]); |
| 282 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 283 | maxPwrT4[i] = min(pPwrL[AR9287_PD_GAIN_ICEPTS - 1], |
| 284 | pPwrR[AR9287_PD_GAIN_ICEPTS - 1]); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 285 | |
| 286 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 287 | pPwrL, pVpdL, |
| 288 | AR9287_PD_GAIN_ICEPTS, |
| 289 | vpdTableL[i]); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 290 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 291 | pPwrR, pVpdR, |
| 292 | AR9287_PD_GAIN_ICEPTS, |
| 293 | vpdTableR[i]); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 294 | |
| 295 | for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 296 | vpdTableI[i][j] = (u8)(ath9k_hw_interpolate( |
| 297 | (u16)FREQ2FBIN(centers. synth_center, |
| 298 | IS_CHAN_2GHZ(chan)), |
| 299 | bChans[idxL], bChans[idxR], |
| 300 | vpdTableL[i][j], vpdTableR[i][j])); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 301 | } |
| 302 | } |
| 303 | } |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 304 | |
| 305 | k = 0; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 306 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 307 | for (i = 0; i < numXpdGains; i++) { |
| 308 | if (i == (numXpdGains - 1)) |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 309 | pPdGainBoundaries[i] = |
| 310 | (u16)(maxPwrT4[i] / 2); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 311 | else |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 312 | pPdGainBoundaries[i] = |
| 313 | (u16)((maxPwrT4[i] + minPwrT4[i+1]) / 4); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 314 | |
| 315 | pPdGainBoundaries[i] = min((u16)AR5416_MAX_RATE_POWER, |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 316 | pPdGainBoundaries[i]); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 317 | |
| 318 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 319 | minDelta = 0; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 320 | |
| 321 | if (i == 0) { |
| 322 | if (AR_SREV_9280_10_OR_LATER(ah)) |
| 323 | ss = (int16_t)(0 - (minPwrT4[i] / 2)); |
| 324 | else |
| 325 | ss = 0; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 326 | } else { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 327 | ss = (int16_t)((pPdGainBoundaries[i-1] - |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 328 | (minPwrT4[i] / 2)) - |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 329 | tPdGainOverlap + 1 + minDelta); |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 330 | } |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 331 | |
| 332 | vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]); |
| 333 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 334 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 335 | while ((ss < 0) && (k < (AR9287_NUM_PDADC_VALUES - 1))) { |
| 336 | tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep); |
| 337 | pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal); |
| 338 | ss++; |
| 339 | } |
| 340 | |
| 341 | sizeCurrVpdTable = (u8)((maxPwrT4[i] - minPwrT4[i]) / 2 + 1); |
| 342 | tgtIndex = (u8)(pPdGainBoundaries[i] + |
| 343 | tPdGainOverlap - (minPwrT4[i] / 2)); |
| 344 | maxIndex = (tgtIndex < sizeCurrVpdTable) ? |
| 345 | tgtIndex : sizeCurrVpdTable; |
| 346 | |
| 347 | while ((ss < maxIndex) && (k < (AR9287_NUM_PDADC_VALUES - 1))) |
| 348 | pPDADCValues[k++] = vpdTableI[i][ss++]; |
| 349 | |
| 350 | vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] - |
| 351 | vpdTableI[i][sizeCurrVpdTable - 2]); |
| 352 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 353 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 354 | if (tgtIndex > maxIndex) { |
| 355 | while ((ss <= tgtIndex) && |
| 356 | (k < (AR9287_NUM_PDADC_VALUES - 1))) { |
| 357 | tmpVal = (int16_t) TMP_VAL_VPD_TABLE; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 358 | pPDADCValues[k++] = |
| 359 | (u8)((tmpVal > 255) ? 255 : tmpVal); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 360 | ss++; |
| 361 | } |
| 362 | } |
| 363 | } |
| 364 | |
| 365 | while (i < AR9287_PD_GAINS_IN_MASK) { |
| 366 | pPdGainBoundaries[i] = pPdGainBoundaries[i-1]; |
| 367 | i++; |
| 368 | } |
| 369 | |
| 370 | while (k < AR9287_NUM_PDADC_VALUES) { |
| 371 | pPDADCValues[k] = pPDADCValues[k-1]; |
| 372 | k++; |
| 373 | } |
| 374 | |
| 375 | #undef TMP_VAL_VPD_TABLE |
| 376 | } |
| 377 | |
| 378 | static void ar9287_eeprom_get_tx_gain_index(struct ath_hw *ah, |
| 379 | struct ath9k_channel *chan, |
| 380 | struct cal_data_op_loop_ar9287 *pRawDatasetOpLoop, |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 381 | u8 *pCalChans, u16 availPiers, int8_t *pPwr) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 382 | { |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 383 | u16 idxL = 0, idxR = 0, numPiers; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 384 | bool match; |
| 385 | struct chan_centers centers; |
| 386 | |
| 387 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
| 388 | |
| 389 | for (numPiers = 0; numPiers < availPiers; numPiers++) { |
| 390 | if (pCalChans[numPiers] == AR9287_BCHAN_UNUSED) |
| 391 | break; |
| 392 | } |
| 393 | |
| 394 | match = ath9k_hw_get_lower_upper_index( |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 395 | (u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), |
| 396 | pCalChans, numPiers, &idxL, &idxR); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 397 | |
| 398 | if (match) { |
Vivek Natarajan | d4fe5af | 2009-08-14 11:32:04 +0530 | [diff] [blame] | 399 | *pPwr = (int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 400 | } else { |
Vivek Natarajan | d4fe5af | 2009-08-14 11:32:04 +0530 | [diff] [blame] | 401 | *pPwr = ((int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0] + |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 402 | (int8_t) pRawDatasetOpLoop[idxR].pwrPdg[0][0])/2; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 403 | } |
| 404 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 405 | } |
| 406 | |
| 407 | static void ar9287_eeprom_olpc_set_pdadcs(struct ath_hw *ah, |
| 408 | int32_t txPower, u16 chain) |
| 409 | { |
| 410 | u32 tmpVal; |
| 411 | u32 a; |
| 412 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 413 | /* Enable OLPC for chain 0 */ |
| 414 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 415 | tmpVal = REG_READ(ah, 0xa270); |
| 416 | tmpVal = tmpVal & 0xFCFFFFFF; |
| 417 | tmpVal = tmpVal | (0x3 << 24); |
| 418 | REG_WRITE(ah, 0xa270, tmpVal); |
| 419 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 420 | /* Enable OLPC for chain 1 */ |
| 421 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 422 | tmpVal = REG_READ(ah, 0xb270); |
| 423 | tmpVal = tmpVal & 0xFCFFFFFF; |
| 424 | tmpVal = tmpVal | (0x3 << 24); |
| 425 | REG_WRITE(ah, 0xb270, tmpVal); |
| 426 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 427 | /* Write the OLPC ref power for chain 0 */ |
| 428 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 429 | if (chain == 0) { |
| 430 | tmpVal = REG_READ(ah, 0xa398); |
| 431 | tmpVal = tmpVal & 0xff00ffff; |
| 432 | a = (txPower)&0xff; |
| 433 | tmpVal = tmpVal | (a << 16); |
| 434 | REG_WRITE(ah, 0xa398, tmpVal); |
| 435 | } |
| 436 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 437 | /* Write the OLPC ref power for chain 1 */ |
| 438 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 439 | if (chain == 1) { |
| 440 | tmpVal = REG_READ(ah, 0xb398); |
| 441 | tmpVal = tmpVal & 0xff00ffff; |
| 442 | a = (txPower)&0xff; |
| 443 | tmpVal = tmpVal | (a << 16); |
| 444 | REG_WRITE(ah, 0xb398, tmpVal); |
| 445 | } |
| 446 | } |
| 447 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 448 | static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 449 | struct ath9k_channel *chan, |
| 450 | int16_t *pTxPowerIndexOffset) |
| 451 | { |
| 452 | struct cal_data_per_freq_ar9287 *pRawDataset; |
| 453 | struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 454 | u8 *pCalBChans = NULL; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 455 | u16 pdGainOverlap_t2; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 456 | u8 pdadcValues[AR9287_NUM_PDADC_VALUES]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 457 | u16 gainBoundaries[AR9287_PD_GAINS_IN_MASK]; |
| 458 | u16 numPiers = 0, i, j; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 459 | u16 numXpdGain, xpdMask; |
| 460 | u16 xpdGainValues[AR9287_NUM_PD_GAINS] = {0, 0, 0, 0}; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 461 | u32 reg32, regOffset, regChainOffset, regval; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 462 | int16_t modalIdx, diff = 0; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 463 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 464 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 465 | modalIdx = IS_CHAN_2GHZ(chan) ? 1 : 0; |
| 466 | xpdMask = pEepData->modalHeader.xpdGain; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 467 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 468 | if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >= |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 469 | AR9287_EEP_MINOR_VER_2) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 470 | pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap; |
| 471 | else |
| 472 | pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5), |
| 473 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP)); |
| 474 | |
| 475 | if (IS_CHAN_2GHZ(chan)) { |
| 476 | pCalBChans = pEepData->calFreqPier2G; |
| 477 | numPiers = AR9287_NUM_2G_CAL_PIERS; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 478 | if (ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 479 | pRawDatasetOpenLoop = |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 480 | (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[0]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 481 | ah->initPDADC = pRawDatasetOpenLoop->vpdPdg[0][0]; |
| 482 | } |
| 483 | } |
| 484 | |
| 485 | numXpdGain = 0; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 486 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 487 | /* Calculate the value of xpdgains from the xpdGain Mask */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 488 | for (i = 1; i <= AR9287_PD_GAINS_IN_MASK; i++) { |
| 489 | if ((xpdMask >> (AR9287_PD_GAINS_IN_MASK - i)) & 1) { |
| 490 | if (numXpdGain >= AR9287_NUM_PD_GAINS) |
| 491 | break; |
| 492 | xpdGainValues[numXpdGain] = |
| 493 | (u16)(AR9287_PD_GAINS_IN_MASK-i); |
| 494 | numXpdGain++; |
| 495 | } |
| 496 | } |
| 497 | |
| 498 | REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, |
| 499 | (numXpdGain - 1) & 0x3); |
| 500 | REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, |
| 501 | xpdGainValues[0]); |
| 502 | REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, |
| 503 | xpdGainValues[1]); |
| 504 | REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, |
| 505 | xpdGainValues[2]); |
| 506 | |
| 507 | for (i = 0; i < AR9287_MAX_CHAINS; i++) { |
| 508 | regChainOffset = i * 0x1000; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 509 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 510 | if (pEepData->baseEepHeader.txMask & (1 << i)) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 511 | pRawDatasetOpenLoop = |
| 512 | (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[i]; |
| 513 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 514 | if (ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 515 | int8_t txPower; |
| 516 | ar9287_eeprom_get_tx_gain_index(ah, chan, |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 517 | pRawDatasetOpenLoop, |
| 518 | pCalBChans, numPiers, |
| 519 | &txPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 520 | ar9287_eeprom_olpc_set_pdadcs(ah, txPower, i); |
| 521 | } else { |
| 522 | pRawDataset = |
| 523 | (struct cal_data_per_freq_ar9287 *) |
| 524 | pEepData->calPierData2G[i]; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 525 | |
| 526 | ath9k_hw_get_ar9287_gain_boundaries_pdadcs(ah, chan, |
| 527 | pRawDataset, |
| 528 | pCalBChans, numPiers, |
| 529 | pdGainOverlap_t2, |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 530 | gainBoundaries, |
| 531 | pdadcValues, |
| 532 | numXpdGain); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 533 | } |
| 534 | |
| 535 | if (i == 0) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 536 | if (!ath9k_hw_ar9287_get_eeprom(ah, |
| 537 | EEP_OL_PWRCTRL)) { |
| 538 | |
| 539 | regval = SM(pdGainOverlap_t2, |
| 540 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
| 541 | | SM(gainBoundaries[0], |
| 542 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
| 543 | | SM(gainBoundaries[1], |
| 544 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
| 545 | | SM(gainBoundaries[2], |
| 546 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
| 547 | | SM(gainBoundaries[3], |
| 548 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4); |
| 549 | |
| 550 | REG_WRITE(ah, |
| 551 | AR_PHY_TPCRG5 + regChainOffset, |
| 552 | regval); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 553 | } |
| 554 | } |
| 555 | |
| 556 | if ((int32_t)AR9287_PWR_TABLE_OFFSET_DB != |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 557 | pEepData->baseEepHeader.pwrTableOffset) { |
| 558 | diff = (u16)(pEepData->baseEepHeader.pwrTableOffset - |
| 559 | (int32_t)AR9287_PWR_TABLE_OFFSET_DB); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 560 | diff *= 2; |
| 561 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 562 | for (j = 0; j < ((u16)AR9287_NUM_PDADC_VALUES-diff); j++) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 563 | pdadcValues[j] = pdadcValues[j+diff]; |
| 564 | |
| 565 | for (j = (u16)(AR9287_NUM_PDADC_VALUES-diff); |
| 566 | j < AR9287_NUM_PDADC_VALUES; j++) |
| 567 | pdadcValues[j] = |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 568 | pdadcValues[AR9287_NUM_PDADC_VALUES-diff]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 569 | } |
| 570 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 571 | if (!ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 572 | regOffset = AR_PHY_BASE + |
| 573 | (672 << 2) + regChainOffset; |
| 574 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 575 | for (j = 0; j < 32; j++) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 576 | reg32 = ((pdadcValues[4*j + 0] & 0xFF) << 0) |
| 577 | | ((pdadcValues[4*j + 1] & 0xFF) << 8) |
| 578 | | ((pdadcValues[4*j + 2] & 0xFF) << 16) |
| 579 | | ((pdadcValues[4*j + 3] & 0xFF) << 24); |
| 580 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 581 | REG_WRITE(ah, regOffset, reg32); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 582 | regOffset += 4; |
| 583 | } |
| 584 | } |
| 585 | } |
| 586 | } |
| 587 | |
| 588 | *pTxPowerIndexOffset = 0; |
| 589 | } |
| 590 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 591 | static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah, |
| 592 | struct ath9k_channel *chan, |
| 593 | int16_t *ratesArray, |
| 594 | u16 cfgCtl, |
| 595 | u16 AntennaReduction, |
| 596 | u16 twiceMaxRegulatoryPower, |
| 597 | u16 powerLimit) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 598 | { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 599 | #define CMP_CTL \ |
| 600 | (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \ |
| 601 | pEepData->ctlIndex[i]) |
| 602 | |
| 603 | #define CMP_NO_CTL \ |
| 604 | (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \ |
| 605 | ((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL)) |
| 606 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 607 | #define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6 |
| 608 | #define REDUCE_SCALED_POWER_BY_THREE_CHAIN 10 |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 609 | |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 610 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 611 | u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; |
| 612 | static const u16 tpScaleReductionTable[5] = |
| 613 | { 0, 3, 6, 9, AR5416_MAX_RATE_POWER }; |
| 614 | int i; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 615 | int16_t twiceLargestAntenna; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 616 | struct cal_ctl_data_ar9287 *rep; |
| 617 | struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} }, |
| 618 | targetPowerCck = {0, {0, 0, 0, 0} }; |
| 619 | struct cal_target_power_leg targetPowerOfdmExt = {0, {0, 0, 0, 0} }, |
| 620 | targetPowerCckExt = {0, {0, 0, 0, 0} }; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 621 | struct cal_target_power_ht targetPowerHt20, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 622 | targetPowerHt40 = {0, {0, 0, 0, 0} }; |
| 623 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 624 | u16 ctlModesFor11g[] = {CTL_11B, |
| 625 | CTL_11G, |
| 626 | CTL_2GHT20, |
| 627 | CTL_11B_EXT, |
| 628 | CTL_11G_EXT, |
| 629 | CTL_2GHT40}; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 630 | u16 numCtlModes = 0, *pCtlMode = NULL, ctlMode, freq; |
| 631 | struct chan_centers centers; |
| 632 | int tx_chainmask; |
| 633 | u16 twiceMinEdgePower; |
| 634 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; |
| 635 | tx_chainmask = ah->txchainmask; |
| 636 | |
| 637 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
| 638 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 639 | /* Compute TxPower reduction due to Antenna Gain */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 640 | twiceLargestAntenna = max(pEepData->modalHeader.antennaGainCh[0], |
| 641 | pEepData->modalHeader.antennaGainCh[1]); |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 642 | twiceLargestAntenna = (int16_t)min((AntennaReduction) - |
| 643 | twiceLargestAntenna, 0); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 644 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 645 | /* |
| 646 | * scaledPower is the minimum of the user input power level |
| 647 | * and the regulatory allowed power level. |
| 648 | */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 649 | maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 650 | |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 651 | if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 652 | maxRegAllowedPower -= |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 653 | (tpScaleReductionTable[(regulatory->tp_scale)] * 2); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 654 | |
| 655 | scaledPower = min(powerLimit, maxRegAllowedPower); |
| 656 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 657 | /* |
| 658 | * Reduce scaled Power by number of chains active |
| 659 | * to get the per chain tx power level. |
| 660 | */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 661 | switch (ar5416_get_ntxchains(tx_chainmask)) { |
| 662 | case 1: |
| 663 | break; |
| 664 | case 2: |
| 665 | scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN; |
| 666 | break; |
| 667 | case 3: |
| 668 | scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN; |
| 669 | break; |
| 670 | } |
| 671 | scaledPower = max((u16)0, scaledPower); |
| 672 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 673 | /* |
| 674 | * Get TX power from EEPROM. |
| 675 | */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 676 | if (IS_CHAN_2GHZ(chan)) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 677 | /* CTL_11B, CTL_11G, CTL_2GHT20 */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 678 | numCtlModes = |
| 679 | ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 680 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 681 | pCtlMode = ctlModesFor11g; |
| 682 | |
| 683 | ath9k_hw_get_legacy_target_powers(ah, chan, |
| 684 | pEepData->calTargetPowerCck, |
| 685 | AR9287_NUM_2G_CCK_TARGET_POWERS, |
| 686 | &targetPowerCck, 4, false); |
| 687 | ath9k_hw_get_legacy_target_powers(ah, chan, |
| 688 | pEepData->calTargetPower2G, |
| 689 | AR9287_NUM_2G_20_TARGET_POWERS, |
| 690 | &targetPowerOfdm, 4, false); |
| 691 | ath9k_hw_get_target_powers(ah, chan, |
| 692 | pEepData->calTargetPower2GHT20, |
| 693 | AR9287_NUM_2G_20_TARGET_POWERS, |
| 694 | &targetPowerHt20, 8, false); |
| 695 | |
| 696 | if (IS_CHAN_HT40(chan)) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 697 | /* All 2G CTLs */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 698 | numCtlModes = ARRAY_SIZE(ctlModesFor11g); |
| 699 | ath9k_hw_get_target_powers(ah, chan, |
| 700 | pEepData->calTargetPower2GHT40, |
| 701 | AR9287_NUM_2G_40_TARGET_POWERS, |
| 702 | &targetPowerHt40, 8, true); |
| 703 | ath9k_hw_get_legacy_target_powers(ah, chan, |
| 704 | pEepData->calTargetPowerCck, |
| 705 | AR9287_NUM_2G_CCK_TARGET_POWERS, |
| 706 | &targetPowerCckExt, 4, true); |
| 707 | ath9k_hw_get_legacy_target_powers(ah, chan, |
| 708 | pEepData->calTargetPower2G, |
| 709 | AR9287_NUM_2G_20_TARGET_POWERS, |
| 710 | &targetPowerOfdmExt, 4, true); |
| 711 | } |
| 712 | } |
| 713 | |
| 714 | for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 715 | bool isHt40CtlMode = |
| 716 | (pCtlMode[ctlMode] == CTL_2GHT40) ? true : false; |
| 717 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 718 | if (isHt40CtlMode) |
| 719 | freq = centers.synth_center; |
| 720 | else if (pCtlMode[ctlMode] & EXT_ADDITIVE) |
| 721 | freq = centers.ext_center; |
| 722 | else |
| 723 | freq = centers.ctl_center; |
| 724 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 725 | /* Walk through the CTL indices stored in EEPROM */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 726 | for (i = 0; (i < AR9287_NUM_CTLS) && pEepData->ctlIndex[i]; i++) { |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 727 | struct cal_ctl_edges *pRdEdgesPower; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 728 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 729 | /* |
| 730 | * Compare test group from regulatory channel list |
| 731 | * with test mode from pCtlMode list |
| 732 | */ |
| 733 | if (CMP_CTL || CMP_NO_CTL) { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 734 | rep = &(pEepData->ctlData[i]); |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 735 | pRdEdgesPower = |
| 736 | rep->ctlEdges[ar5416_get_ntxchains(tx_chainmask) - 1]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 737 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 738 | twiceMinEdgePower = ath9k_hw_get_max_edge_power(freq, |
| 739 | pRdEdgesPower, |
| 740 | IS_CHAN_2GHZ(chan), |
| 741 | AR5416_NUM_BAND_EDGES); |
| 742 | |
| 743 | if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { |
| 744 | twiceMaxEdgePower = min(twiceMaxEdgePower, |
| 745 | twiceMinEdgePower); |
| 746 | } else { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 747 | twiceMaxEdgePower = twiceMinEdgePower; |
| 748 | break; |
| 749 | } |
| 750 | } |
| 751 | } |
| 752 | |
| 753 | minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower); |
| 754 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 755 | /* Apply ctl mode to correct target power set */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 756 | switch (pCtlMode[ctlMode]) { |
| 757 | case CTL_11B: |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 758 | for (i = 0; i < ARRAY_SIZE(targetPowerCck.tPow2x); i++) { |
| 759 | targetPowerCck.tPow2x[i] = |
| 760 | (u8)min((u16)targetPowerCck.tPow2x[i], |
| 761 | minCtlPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 762 | } |
| 763 | break; |
| 764 | case CTL_11A: |
| 765 | case CTL_11G: |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 766 | for (i = 0; i < ARRAY_SIZE(targetPowerOfdm.tPow2x); i++) { |
| 767 | targetPowerOfdm.tPow2x[i] = |
| 768 | (u8)min((u16)targetPowerOfdm.tPow2x[i], |
| 769 | minCtlPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 770 | } |
| 771 | break; |
| 772 | case CTL_5GHT20: |
| 773 | case CTL_2GHT20: |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 774 | for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x); i++) { |
| 775 | targetPowerHt20.tPow2x[i] = |
| 776 | (u8)min((u16)targetPowerHt20.tPow2x[i], |
| 777 | minCtlPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 778 | } |
| 779 | break; |
| 780 | case CTL_11B_EXT: |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 781 | targetPowerCckExt.tPow2x[0] = |
| 782 | (u8)min((u16)targetPowerCckExt.tPow2x[0], |
| 783 | minCtlPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 784 | break; |
| 785 | case CTL_11A_EXT: |
| 786 | case CTL_11G_EXT: |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 787 | targetPowerOfdmExt.tPow2x[0] = |
| 788 | (u8)min((u16)targetPowerOfdmExt.tPow2x[0], |
| 789 | minCtlPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 790 | break; |
| 791 | case CTL_5GHT40: |
| 792 | case CTL_2GHT40: |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 793 | for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) { |
| 794 | targetPowerHt40.tPow2x[i] = |
| 795 | (u8)min((u16)targetPowerHt40.tPow2x[i], |
| 796 | minCtlPower); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 797 | } |
| 798 | break; |
| 799 | default: |
| 800 | break; |
| 801 | } |
| 802 | } |
| 803 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 804 | /* Now set the rates array */ |
| 805 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 806 | ratesArray[rate6mb] = |
| 807 | ratesArray[rate9mb] = |
| 808 | ratesArray[rate12mb] = |
| 809 | ratesArray[rate18mb] = |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 810 | ratesArray[rate24mb] = targetPowerOfdm.tPow2x[0]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 811 | |
| 812 | ratesArray[rate36mb] = targetPowerOfdm.tPow2x[1]; |
| 813 | ratesArray[rate48mb] = targetPowerOfdm.tPow2x[2]; |
| 814 | ratesArray[rate54mb] = targetPowerOfdm.tPow2x[3]; |
| 815 | ratesArray[rateXr] = targetPowerOfdm.tPow2x[0]; |
| 816 | |
| 817 | for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x); i++) |
| 818 | ratesArray[rateHt20_0 + i] = targetPowerHt20.tPow2x[i]; |
| 819 | |
| 820 | if (IS_CHAN_2GHZ(chan)) { |
| 821 | ratesArray[rate1l] = targetPowerCck.tPow2x[0]; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 822 | ratesArray[rate2s] = |
| 823 | ratesArray[rate2l] = targetPowerCck.tPow2x[1]; |
| 824 | ratesArray[rate5_5s] = |
| 825 | ratesArray[rate5_5l] = targetPowerCck.tPow2x[2]; |
| 826 | ratesArray[rate11s] = |
| 827 | ratesArray[rate11l] = targetPowerCck.tPow2x[3]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 828 | } |
| 829 | if (IS_CHAN_HT40(chan)) { |
| 830 | for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) |
| 831 | ratesArray[rateHt40_0 + i] = targetPowerHt40.tPow2x[i]; |
| 832 | |
| 833 | ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0]; |
| 834 | ratesArray[rateDupCck] = targetPowerHt40.tPow2x[0]; |
| 835 | ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 836 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 837 | if (IS_CHAN_2GHZ(chan)) |
| 838 | ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; |
| 839 | } |
| 840 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 841 | #undef CMP_CTL |
| 842 | #undef CMP_NO_CTL |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 843 | #undef REDUCE_SCALED_POWER_BY_TWO_CHAIN |
| 844 | #undef REDUCE_SCALED_POWER_BY_THREE_CHAIN |
| 845 | } |
| 846 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 847 | static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 848 | struct ath9k_channel *chan, u16 cfgCtl, |
| 849 | u8 twiceAntennaReduction, |
| 850 | u8 twiceMaxRegulatoryPower, |
| 851 | u8 powerLimit) |
| 852 | { |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 853 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 854 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; |
| 855 | struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader; |
| 856 | int16_t ratesArray[Ar5416RateSize]; |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 857 | int16_t txPowerIndexOffset = 0; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 858 | u8 ht40PowerIncForPdadc = 2; |
| 859 | int i; |
| 860 | |
| 861 | memset(ratesArray, 0, sizeof(ratesArray)); |
| 862 | |
| 863 | if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >= |
| 864 | AR9287_EEP_MINOR_VER_2) |
| 865 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; |
| 866 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 867 | ath9k_hw_set_ar9287_power_per_rate_table(ah, chan, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 868 | &ratesArray[0], cfgCtl, |
| 869 | twiceAntennaReduction, |
| 870 | twiceMaxRegulatoryPower, |
| 871 | powerLimit); |
| 872 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 873 | ath9k_hw_set_ar9287_power_cal_table(ah, chan, &txPowerIndexOffset); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 874 | |
| 875 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { |
| 876 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); |
| 877 | if (ratesArray[i] > AR9287_MAX_RATE_POWER) |
| 878 | ratesArray[i] = AR9287_MAX_RATE_POWER; |
| 879 | } |
| 880 | |
| 881 | if (AR_SREV_9280_10_OR_LATER(ah)) { |
| 882 | for (i = 0; i < Ar5416RateSize; i++) |
| 883 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; |
| 884 | } |
| 885 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 886 | /* OFDM power per rate */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 887 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, |
| 888 | ATH9K_POW_SM(ratesArray[rate18mb], 24) |
| 889 | | ATH9K_POW_SM(ratesArray[rate12mb], 16) |
| 890 | | ATH9K_POW_SM(ratesArray[rate9mb], 8) |
| 891 | | ATH9K_POW_SM(ratesArray[rate6mb], 0)); |
| 892 | |
| 893 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, |
| 894 | ATH9K_POW_SM(ratesArray[rate54mb], 24) |
| 895 | | ATH9K_POW_SM(ratesArray[rate48mb], 16) |
| 896 | | ATH9K_POW_SM(ratesArray[rate36mb], 8) |
| 897 | | ATH9K_POW_SM(ratesArray[rate24mb], 0)); |
| 898 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 899 | /* CCK power per rate */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 900 | if (IS_CHAN_2GHZ(chan)) { |
| 901 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, |
| 902 | ATH9K_POW_SM(ratesArray[rate2s], 24) |
| 903 | | ATH9K_POW_SM(ratesArray[rate2l], 16) |
| 904 | | ATH9K_POW_SM(ratesArray[rateXr], 8) |
| 905 | | ATH9K_POW_SM(ratesArray[rate1l], 0)); |
| 906 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, |
| 907 | ATH9K_POW_SM(ratesArray[rate11s], 24) |
| 908 | | ATH9K_POW_SM(ratesArray[rate11l], 16) |
| 909 | | ATH9K_POW_SM(ratesArray[rate5_5s], 8) |
| 910 | | ATH9K_POW_SM(ratesArray[rate5_5l], 0)); |
| 911 | } |
| 912 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 913 | /* HT20 power per rate */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 914 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, |
| 915 | ATH9K_POW_SM(ratesArray[rateHt20_3], 24) |
| 916 | | ATH9K_POW_SM(ratesArray[rateHt20_2], 16) |
| 917 | | ATH9K_POW_SM(ratesArray[rateHt20_1], 8) |
| 918 | | ATH9K_POW_SM(ratesArray[rateHt20_0], 0)); |
| 919 | |
| 920 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, |
| 921 | ATH9K_POW_SM(ratesArray[rateHt20_7], 24) |
| 922 | | ATH9K_POW_SM(ratesArray[rateHt20_6], 16) |
| 923 | | ATH9K_POW_SM(ratesArray[rateHt20_5], 8) |
| 924 | | ATH9K_POW_SM(ratesArray[rateHt20_4], 0)); |
| 925 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 926 | /* HT40 power per rate */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 927 | if (IS_CHAN_HT40(chan)) { |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 928 | if (ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 929 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, |
| 930 | ATH9K_POW_SM(ratesArray[rateHt40_3], 24) |
| 931 | | ATH9K_POW_SM(ratesArray[rateHt40_2], 16) |
| 932 | | ATH9K_POW_SM(ratesArray[rateHt40_1], 8) |
| 933 | | ATH9K_POW_SM(ratesArray[rateHt40_0], 0)); |
| 934 | |
| 935 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, |
| 936 | ATH9K_POW_SM(ratesArray[rateHt40_7], 24) |
| 937 | | ATH9K_POW_SM(ratesArray[rateHt40_6], 16) |
| 938 | | ATH9K_POW_SM(ratesArray[rateHt40_5], 8) |
| 939 | | ATH9K_POW_SM(ratesArray[rateHt40_4], 0)); |
| 940 | } else { |
| 941 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, |
| 942 | ATH9K_POW_SM(ratesArray[rateHt40_3] + |
| 943 | ht40PowerIncForPdadc, 24) |
| 944 | | ATH9K_POW_SM(ratesArray[rateHt40_2] + |
| 945 | ht40PowerIncForPdadc, 16) |
| 946 | | ATH9K_POW_SM(ratesArray[rateHt40_1] + |
| 947 | ht40PowerIncForPdadc, 8) |
| 948 | | ATH9K_POW_SM(ratesArray[rateHt40_0] + |
| 949 | ht40PowerIncForPdadc, 0)); |
| 950 | |
| 951 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, |
| 952 | ATH9K_POW_SM(ratesArray[rateHt40_7] + |
| 953 | ht40PowerIncForPdadc, 24) |
| 954 | | ATH9K_POW_SM(ratesArray[rateHt40_6] + |
| 955 | ht40PowerIncForPdadc, 16) |
| 956 | | ATH9K_POW_SM(ratesArray[rateHt40_5] + |
| 957 | ht40PowerIncForPdadc, 8) |
| 958 | | ATH9K_POW_SM(ratesArray[rateHt40_4] + |
| 959 | ht40PowerIncForPdadc, 0)); |
| 960 | } |
| 961 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 962 | /* Dup/Ext power per rate */ |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 963 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, |
| 964 | ATH9K_POW_SM(ratesArray[rateExtOfdm], 24) |
| 965 | | ATH9K_POW_SM(ratesArray[rateExtCck], 16) |
| 966 | | ATH9K_POW_SM(ratesArray[rateDupOfdm], 8) |
| 967 | | ATH9K_POW_SM(ratesArray[rateDupCck], 0)); |
| 968 | } |
| 969 | |
| 970 | if (IS_CHAN_2GHZ(chan)) |
| 971 | i = rate1l; |
| 972 | else |
| 973 | i = rate6mb; |
| 974 | |
| 975 | if (AR_SREV_9280_10_OR_LATER(ah)) |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 976 | regulatory->max_power_level = |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 977 | ratesArray[i] + AR9287_PWR_TABLE_OFFSET_DB * 2; |
| 978 | else |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 979 | regulatory->max_power_level = ratesArray[i]; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 980 | } |
| 981 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 982 | static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 983 | struct ath9k_channel *chan) |
| 984 | { |
| 985 | } |
| 986 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 987 | static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 988 | struct ath9k_channel *chan) |
| 989 | { |
| 990 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
| 991 | struct modal_eep_ar9287_header *pModal = &eep->modalHeader; |
| 992 | u16 antWrites[AR9287_ANT_16S]; |
Sujith | 79d7f4b | 2010-06-01 15:14:06 +0530 | [diff] [blame] | 993 | u32 regChainOffset, regval; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 994 | u8 txRxAttenLocal; |
| 995 | int i, j, offset_num; |
| 996 | |
| 997 | pModal = &eep->modalHeader; |
| 998 | |
| 999 | antWrites[0] = (u16)((pModal->antCtrlCommon >> 28) & 0xF); |
| 1000 | antWrites[1] = (u16)((pModal->antCtrlCommon >> 24) & 0xF); |
| 1001 | antWrites[2] = (u16)((pModal->antCtrlCommon >> 20) & 0xF); |
| 1002 | antWrites[3] = (u16)((pModal->antCtrlCommon >> 16) & 0xF); |
| 1003 | antWrites[4] = (u16)((pModal->antCtrlCommon >> 12) & 0xF); |
| 1004 | antWrites[5] = (u16)((pModal->antCtrlCommon >> 8) & 0xF); |
| 1005 | antWrites[6] = (u16)((pModal->antCtrlCommon >> 4) & 0xF); |
| 1006 | antWrites[7] = (u16)(pModal->antCtrlCommon & 0xF); |
| 1007 | |
| 1008 | offset_num = 8; |
| 1009 | |
| 1010 | for (i = 0, j = offset_num; i < AR9287_MAX_CHAINS; i++) { |
| 1011 | antWrites[j++] = (u16)((pModal->antCtrlChain[i] >> 28) & 0xf); |
| 1012 | antWrites[j++] = (u16)((pModal->antCtrlChain[i] >> 10) & 0x3); |
| 1013 | antWrites[j++] = (u16)((pModal->antCtrlChain[i] >> 8) & 0x3); |
| 1014 | antWrites[j++] = 0; |
| 1015 | antWrites[j++] = (u16)((pModal->antCtrlChain[i] >> 6) & 0x3); |
| 1016 | antWrites[j++] = (u16)((pModal->antCtrlChain[i] >> 4) & 0x3); |
| 1017 | antWrites[j++] = (u16)((pModal->antCtrlChain[i] >> 2) & 0x3); |
| 1018 | antWrites[j++] = (u16)(pModal->antCtrlChain[i] & 0x3); |
| 1019 | } |
| 1020 | |
| 1021 | REG_WRITE(ah, AR_PHY_SWITCH_COM, |
| 1022 | ah->eep_ops->get_eeprom_antenna_cfg(ah, chan)); |
| 1023 | |
| 1024 | for (i = 0; i < AR9287_MAX_CHAINS; i++) { |
| 1025 | regChainOffset = i * 0x1000; |
| 1026 | |
| 1027 | REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, |
| 1028 | pModal->antCtrlChain[i]); |
| 1029 | |
| 1030 | REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, |
| 1031 | (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) |
| 1032 | & ~(AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | |
| 1033 | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF)) | |
| 1034 | SM(pModal->iqCalICh[i], |
| 1035 | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) | |
| 1036 | SM(pModal->iqCalQCh[i], |
| 1037 | AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF)); |
| 1038 | |
| 1039 | txRxAttenLocal = pModal->txRxAttenCh[i]; |
| 1040 | |
| 1041 | REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, |
| 1042 | AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, |
| 1043 | pModal->bswMargin[i]); |
| 1044 | REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, |
| 1045 | AR_PHY_GAIN_2GHZ_XATTEN1_DB, |
| 1046 | pModal->bswAtten[i]); |
| 1047 | REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, |
| 1048 | AR9280_PHY_RXGAIN_TXRX_ATTEN, |
| 1049 | txRxAttenLocal); |
| 1050 | REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, |
| 1051 | AR9280_PHY_RXGAIN_TXRX_MARGIN, |
| 1052 | pModal->rxTxMarginCh[i]); |
| 1053 | } |
| 1054 | |
| 1055 | |
| 1056 | if (IS_CHAN_HT40(chan)) |
| 1057 | REG_RMW_FIELD(ah, AR_PHY_SETTLING, |
| 1058 | AR_PHY_SETTLING_SWITCH, pModal->swSettleHt40); |
| 1059 | else |
| 1060 | REG_RMW_FIELD(ah, AR_PHY_SETTLING, |
| 1061 | AR_PHY_SETTLING_SWITCH, pModal->switchSettling); |
| 1062 | |
| 1063 | REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, |
| 1064 | AR_PHY_DESIRED_SZ_ADC, pModal->adcDesiredSize); |
| 1065 | |
| 1066 | REG_WRITE(ah, AR_PHY_RF_CTL4, |
| 1067 | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF) |
| 1068 | | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF) |
| 1069 | | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON) |
| 1070 | | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAB_ON)); |
| 1071 | |
| 1072 | REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, |
| 1073 | AR_PHY_TX_END_TO_A2_RX_ON, pModal->txEndToRxOn); |
| 1074 | |
| 1075 | REG_RMW_FIELD(ah, AR_PHY_CCA, |
| 1076 | AR9280_PHY_CCA_THRESH62, pModal->thresh62); |
| 1077 | REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, |
| 1078 | AR_PHY_EXT_CCA0_THRESH62, pModal->thresh62); |
| 1079 | |
Sujith | 79d7f4b | 2010-06-01 15:14:06 +0530 | [diff] [blame] | 1080 | regval = REG_READ(ah, AR9287_AN_RF2G3_CH0); |
| 1081 | regval &= ~(AR9287_AN_RF2G3_DB1 | |
| 1082 | AR9287_AN_RF2G3_DB2 | |
| 1083 | AR9287_AN_RF2G3_OB_CCK | |
| 1084 | AR9287_AN_RF2G3_OB_PSK | |
| 1085 | AR9287_AN_RF2G3_OB_QAM | |
| 1086 | AR9287_AN_RF2G3_OB_PAL_OFF); |
| 1087 | regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | |
| 1088 | SM(pModal->db2, AR9287_AN_RF2G3_DB2) | |
| 1089 | SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) | |
| 1090 | SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) | |
| 1091 | SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) | |
| 1092 | SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF)); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1093 | |
Sujith | 79d7f4b | 2010-06-01 15:14:06 +0530 | [diff] [blame] | 1094 | ath9k_hw_analog_shift_regwrite(ah, AR9287_AN_RF2G3_CH0, regval); |
| 1095 | |
| 1096 | regval = REG_READ(ah, AR9287_AN_RF2G3_CH1); |
| 1097 | regval &= ~(AR9287_AN_RF2G3_DB1 | |
| 1098 | AR9287_AN_RF2G3_DB2 | |
| 1099 | AR9287_AN_RF2G3_OB_CCK | |
| 1100 | AR9287_AN_RF2G3_OB_PSK | |
| 1101 | AR9287_AN_RF2G3_OB_QAM | |
| 1102 | AR9287_AN_RF2G3_OB_PAL_OFF); |
| 1103 | regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | |
| 1104 | SM(pModal->db2, AR9287_AN_RF2G3_DB2) | |
| 1105 | SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) | |
| 1106 | SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) | |
| 1107 | SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) | |
| 1108 | SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF)); |
| 1109 | |
| 1110 | ath9k_hw_analog_shift_regwrite(ah, AR9287_AN_RF2G3_CH1, regval); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1111 | |
| 1112 | REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, |
| 1113 | AR_PHY_TX_END_DATA_START, pModal->txFrameToDataStart); |
| 1114 | REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, |
| 1115 | AR_PHY_TX_END_PA_ON, pModal->txFrameToPaOn); |
| 1116 | |
| 1117 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_TOP2, |
| 1118 | AR9287_AN_TOP2_XPABIAS_LVL, |
| 1119 | AR9287_AN_TOP2_XPABIAS_LVL_S, |
| 1120 | pModal->xpaBiasLvl); |
| 1121 | } |
| 1122 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 1123 | static u8 ath9k_hw_ar9287_get_num_ant_config(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1124 | enum ieee80211_band freq_band) |
| 1125 | { |
| 1126 | return 1; |
| 1127 | } |
| 1128 | |
Felix Fietkau | 601e0cb | 2010-07-11 12:48:39 +0200 | [diff] [blame] | 1129 | static u32 ath9k_hw_ar9287_get_eeprom_antenna_cfg(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1130 | struct ath9k_channel *chan) |
| 1131 | { |
| 1132 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
| 1133 | struct modal_eep_ar9287_header *pModal = &eep->modalHeader; |
| 1134 | |
Felix Fietkau | 601e0cb | 2010-07-11 12:48:39 +0200 | [diff] [blame] | 1135 | return pModal->antCtrlCommon; |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1136 | } |
| 1137 | |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 1138 | static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah, |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1139 | u16 i, bool is2GHz) |
| 1140 | { |
| 1141 | #define EEP_MAP9287_SPURCHAN \ |
| 1142 | (ah->eeprom.map9287.modalHeader.spurChans[i].spurChan) |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 1143 | |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 1144 | struct ath_common *common = ath9k_hw_common(ah); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1145 | u16 spur_val = AR_NO_SPUR; |
| 1146 | |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 1147 | ath_print(common, ATH_DBG_ANI, |
| 1148 | "Getting spur idx %d is2Ghz. %d val %x\n", |
| 1149 | i, is2GHz, ah->config.spurchans[i][is2GHz]); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1150 | |
| 1151 | switch (ah->config.spurmode) { |
| 1152 | case SPUR_DISABLE: |
| 1153 | break; |
| 1154 | case SPUR_ENABLE_IOCTL: |
| 1155 | spur_val = ah->config.spurchans[i][is2GHz]; |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 1156 | ath_print(common, ATH_DBG_ANI, |
| 1157 | "Getting spur val from new loc. %d\n", spur_val); |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1158 | break; |
| 1159 | case SPUR_ENABLE_EEPROM: |
| 1160 | spur_val = EEP_MAP9287_SPURCHAN; |
| 1161 | break; |
| 1162 | } |
| 1163 | |
| 1164 | return spur_val; |
| 1165 | |
| 1166 | #undef EEP_MAP9287_SPURCHAN |
| 1167 | } |
| 1168 | |
Luis R. Rodriguez | 0b8f6f2b1 | 2010-04-15 17:39:12 -0400 | [diff] [blame] | 1169 | const struct eeprom_ops eep_ar9287_ops = { |
Sujith | 16c94ac | 2010-06-01 15:14:04 +0530 | [diff] [blame] | 1170 | .check_eeprom = ath9k_hw_ar9287_check_eeprom, |
| 1171 | .get_eeprom = ath9k_hw_ar9287_get_eeprom, |
| 1172 | .fill_eeprom = ath9k_hw_ar9287_fill_eeprom, |
| 1173 | .get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver, |
| 1174 | .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev, |
| 1175 | .get_num_ant_config = ath9k_hw_ar9287_get_num_ant_config, |
| 1176 | .get_eeprom_antenna_cfg = ath9k_hw_ar9287_get_eeprom_antenna_cfg, |
| 1177 | .set_board_values = ath9k_hw_ar9287_set_board_values, |
| 1178 | .set_addac = ath9k_hw_ar9287_set_addac, |
| 1179 | .set_txpower = ath9k_hw_ar9287_set_txpower, |
| 1180 | .get_spur_channel = ath9k_hw_ar9287_get_spur_channel |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 1181 | }; |