blob: 599aff8290e8d42dcd4a1660bef1e064ddad661b [file] [log] [blame]
Takashi Iwai2c484df2005-06-30 18:54:04 +02001/*
2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
3 *
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010016#include <linux/platform_device.h>
Takashi Iwai2c484df2005-06-30 18:54:04 +020017#include <linux/interrupt.h>
18#include <linux/wait.h>
19#include <linux/delay.h>
20
21#include <sound/driver.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/ac97_codec.h>
25#include <sound/initval.h>
26
27#include <asm/irq.h>
Ingo Molnar12aa7572006-01-16 16:36:05 +010028#include <linux/mutex.h>
Takashi Iwai2c484df2005-06-30 18:54:04 +020029#include <asm/hardware.h>
30#include <asm/arch/pxa-regs.h>
31#include <asm/arch/audio.h>
32
33#include "pxa2xx-pcm.h"
34
35
Ingo Molnar12aa7572006-01-16 16:36:05 +010036static DEFINE_MUTEX(car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020037static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
38static volatile long gsr_bits;
39
Nicolas Pitreea265c02005-12-12 15:41:47 +010040/*
41 * Beware PXA27x bugs:
42 *
43 * o Slot 12 read from modem space will hang controller.
44 * o CDONE, SDONE interrupt fails after any slot 12 IO.
45 *
46 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
47 * 1 jiffy timeout if interrupt never comes).
48 */
49
Takashi Iwaid18f8372005-11-17 15:10:38 +010050static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
Takashi Iwai2c484df2005-06-30 18:54:04 +020051{
52 unsigned short val = -1;
53 volatile u32 *reg_addr;
54
Ingo Molnar12aa7572006-01-16 16:36:05 +010055 mutex_lock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020056
57 /* set up primary or secondary codec space */
58 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
59 reg_addr += (reg >> 1);
60
61 /* start read access across the ac97 link */
Nicolas Pitreea265c02005-12-12 15:41:47 +010062 GSR = GSR_CDONE | GSR_SDONE;
Takashi Iwai2c484df2005-06-30 18:54:04 +020063 gsr_bits = 0;
64 val = *reg_addr;
65 if (reg == AC97_GPIO_STATUS)
66 goto out;
Nicolas Pitreea265c02005-12-12 15:41:47 +010067 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
68 !((GSR | gsr_bits) & GSR_SDONE)) {
Takashi Iwai2c484df2005-06-30 18:54:04 +020069 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
Nicolas Pitreea265c02005-12-12 15:41:47 +010070 __FUNCTION__, reg, GSR | gsr_bits);
Takashi Iwai2c484df2005-06-30 18:54:04 +020071 val = -1;
72 goto out;
73 }
74
75 /* valid data now */
Nicolas Pitreea265c02005-12-12 15:41:47 +010076 GSR = GSR_CDONE | GSR_SDONE;
Takashi Iwai2c484df2005-06-30 18:54:04 +020077 gsr_bits = 0;
78 val = *reg_addr;
79 /* but we've just started another cycle... */
Nicolas Pitreea265c02005-12-12 15:41:47 +010080 wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
Takashi Iwai2c484df2005-06-30 18:54:04 +020081
Ingo Molnar12aa7572006-01-16 16:36:05 +010082out: mutex_unlock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020083 return val;
84}
85
Takashi Iwaid18f8372005-11-17 15:10:38 +010086static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
Takashi Iwai2c484df2005-06-30 18:54:04 +020087{
88 volatile u32 *reg_addr;
89
Ingo Molnar12aa7572006-01-16 16:36:05 +010090 mutex_lock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020091
Takashi Iwai2c484df2005-06-30 18:54:04 +020092 /* set up primary or secondary codec space */
93 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
94 reg_addr += (reg >> 1);
Nicolas Pitreea265c02005-12-12 15:41:47 +010095
96 GSR = GSR_CDONE | GSR_SDONE;
Takashi Iwai2c484df2005-06-30 18:54:04 +020097 gsr_bits = 0;
98 *reg_addr = val;
Nicolas Pitreea265c02005-12-12 15:41:47 +010099 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
100 !((GSR | gsr_bits) & GSR_CDONE))
Takashi Iwai2c484df2005-06-30 18:54:04 +0200101 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
Nicolas Pitreea265c02005-12-12 15:41:47 +0100102 __FUNCTION__, reg, GSR | gsr_bits);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200103
Ingo Molnar12aa7572006-01-16 16:36:05 +0100104 mutex_unlock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200105}
106
Takashi Iwaid18f8372005-11-17 15:10:38 +0100107static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200108{
109 /* First, try cold reset */
110 GCR &= GCR_COLD_RST; /* clear everything but nCRST */
111 GCR &= ~GCR_COLD_RST; /* then assert nCRST */
112
113 gsr_bits = 0;
114#ifdef CONFIG_PXA27x
115 /* PXA27x Developers Manual section 13.5.2.2.1 */
116 pxa_set_cken(1 << 31, 1);
117 udelay(5);
118 pxa_set_cken(1 << 31, 0);
119 GCR = GCR_COLD_RST;
120 udelay(50);
121#else
122 GCR = GCR_COLD_RST;
123 GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
124 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
125#endif
126
127 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
128 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
129 __FUNCTION__, gsr_bits);
130
131 /* let's try warm reset */
132 gsr_bits = 0;
133#ifdef CONFIG_PXA27x
134 /* warm reset broken on Bulverde,
135 so manually keep AC97 reset high */
136 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
137 udelay(10);
138 GCR |= GCR_WARM_RST;
139 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
Liam Girdwood4a677ac52005-08-05 10:24:36 +0200140 udelay(500);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200141#else
Liam Girdwood4a677ac52005-08-05 10:24:36 +0200142 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200143 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
144#endif
145
146 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
147 printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
148 __FUNCTION__, gsr_bits);
149 }
150
151 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
152 GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
153}
154
155static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs)
156{
157 long status;
158
159 status = GSR;
160 if (status) {
161 GSR = status;
162 gsr_bits |= status;
163 wake_up(&gsr_wq);
164
165#ifdef CONFIG_PXA27x
166 /* Although we don't use those we still need to clear them
167 since they tend to spuriously trigger when MMC is used
168 (hardware bug? go figure)... */
169 MISR = MISR_EOC;
170 PISR = PISR_EOC;
171 MCSR = MCSR_EOC;
172#endif
173
174 return IRQ_HANDLED;
175 }
176
177 return IRQ_NONE;
178}
179
Takashi Iwaid18f8372005-11-17 15:10:38 +0100180static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200181 .read = pxa2xx_ac97_read,
182 .write = pxa2xx_ac97_write,
183 .reset = pxa2xx_ac97_reset,
184};
185
Takashi Iwaid18f8372005-11-17 15:10:38 +0100186static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200187 .name = "AC97 PCM out",
188 .dev_addr = __PREG(PCDR),
189 .drcmr = &DRCMRTXPCDR,
190 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
191 DCMD_BURST32 | DCMD_WIDTH4,
192};
193
Takashi Iwaid18f8372005-11-17 15:10:38 +0100194static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200195 .name = "AC97 PCM in",
196 .dev_addr = __PREG(PCDR),
197 .drcmr = &DRCMRRXPCDR,
198 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
199 DCMD_BURST32 | DCMD_WIDTH4,
200};
201
Takashi Iwaid18f8372005-11-17 15:10:38 +0100202static struct snd_pcm *pxa2xx_ac97_pcm;
203static struct snd_ac97 *pxa2xx_ac97_ac97;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200204
Takashi Iwaid18f8372005-11-17 15:10:38 +0100205static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200206{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100207 struct snd_pcm_runtime *runtime = substream->runtime;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200208 pxa2xx_audio_ops_t *platform_ops;
209 int r;
210
211 runtime->hw.channels_min = 2;
212 runtime->hw.channels_max = 2;
213
214 r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
215 AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
216 runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
217 snd_pcm_limit_hw_rates(runtime);
218
219 platform_ops = substream->pcm->card->dev->platform_data;
220 if (platform_ops && platform_ops->startup)
221 return platform_ops->startup(substream, platform_ops->priv);
222 else
223 return 0;
224}
225
Takashi Iwaid18f8372005-11-17 15:10:38 +0100226static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200227{
228 pxa2xx_audio_ops_t *platform_ops;
229
230 platform_ops = substream->pcm->card->dev->platform_data;
231 if (platform_ops && platform_ops->shutdown)
232 platform_ops->shutdown(substream, platform_ops->priv);
233}
234
Takashi Iwaid18f8372005-11-17 15:10:38 +0100235static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200236{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100237 struct snd_pcm_runtime *runtime = substream->runtime;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200238 int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
239 AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
240 return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
241}
242
Takashi Iwaid18f8372005-11-17 15:10:38 +0100243static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200244 .playback_params = &pxa2xx_ac97_pcm_out,
245 .capture_params = &pxa2xx_ac97_pcm_in,
246 .startup = pxa2xx_ac97_pcm_startup,
247 .shutdown = pxa2xx_ac97_pcm_shutdown,
248 .prepare = pxa2xx_ac97_pcm_prepare,
249};
250
251#ifdef CONFIG_PM
252
Takashi Iwaid18f8372005-11-17 15:10:38 +0100253static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200254{
Takashi Iwai792a6c52005-11-17 17:19:25 +0100255 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
256
257 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
258 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
259 snd_ac97_suspend(pxa2xx_ac97_ac97);
260 if (platform_ops && platform_ops->suspend)
261 platform_ops->suspend(platform_ops->priv);
262 GCR |= GCR_ACLINK_OFF;
263 pxa_set_cken(CKEN2_AC97, 0);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200264
265 return 0;
266}
267
Takashi Iwaid18f8372005-11-17 15:10:38 +0100268static int pxa2xx_ac97_do_resume(struct snd_card *card)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200269{
Takashi Iwai792a6c52005-11-17 17:19:25 +0100270 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
271
272 pxa_set_cken(CKEN2_AC97, 1);
273 if (platform_ops && platform_ops->resume)
274 platform_ops->resume(platform_ops->priv);
275 snd_ac97_resume(pxa2xx_ac97_ac97);
276 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200277
278 return 0;
279}
280
Russell King3ae5eae2005-11-09 22:32:44 +0000281static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200282{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100283 struct snd_card *card = platform_get_drvdata(dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200284 int ret = 0;
285
Russell King9480e302005-10-28 09:52:56 -0700286 if (card)
Dirk Opfera55bfdc2005-08-08 16:29:43 +0200287 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200288
289 return ret;
290}
291
Russell King3ae5eae2005-11-09 22:32:44 +0000292static int pxa2xx_ac97_resume(struct platform_device *dev)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200293{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100294 struct snd_card *card = platform_get_drvdata(dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200295 int ret = 0;
296
Russell King9480e302005-10-28 09:52:56 -0700297 if (card)
Dirk Opfera55bfdc2005-08-08 16:29:43 +0200298 ret = pxa2xx_ac97_do_resume(card);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200299
300 return ret;
301}
302
303#else
304#define pxa2xx_ac97_suspend NULL
305#define pxa2xx_ac97_resume NULL
306#endif
307
Russell King3ae5eae2005-11-09 22:32:44 +0000308static int pxa2xx_ac97_probe(struct platform_device *dev)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200309{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100310 struct snd_card *card;
311 struct snd_ac97_bus *ac97_bus;
312 struct snd_ac97_template ac97_template;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200313 int ret;
314
315 ret = -ENOMEM;
316 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
317 THIS_MODULE, 0);
318 if (!card)
319 goto err;
320
Russell King3ae5eae2005-11-09 22:32:44 +0000321 card->dev = &dev->dev;
322 strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
Takashi Iwai2c484df2005-06-30 18:54:04 +0200323
324 ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
325 if (ret)
326 goto err;
327
328 ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
329 if (ret < 0)
330 goto err;
331
332 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
333 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
334 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
335 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
336#ifdef CONFIG_PXA27x
337 /* Use GPIO 113 as AC97 Reset on Bulverde */
338 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
339#endif
340 pxa_set_cken(CKEN2_AC97, 1);
341
342 ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
343 if (ret)
344 goto err;
345 memset(&ac97_template, 0, sizeof(ac97_template));
346 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
347 if (ret)
348 goto err;
349
350 snprintf(card->shortname, sizeof(card->shortname),
351 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
352 snprintf(card->longname, sizeof(card->longname),
Russell King3ae5eae2005-11-09 22:32:44 +0000353 "%s (%s)", dev->dev.driver->name, card->mixername);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200354
Takashi Iwai2c484df2005-06-30 18:54:04 +0200355 ret = snd_card_register(card);
356 if (ret == 0) {
Russell King3ae5eae2005-11-09 22:32:44 +0000357 platform_set_drvdata(dev, card);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200358 return 0;
359 }
360
361 err:
362 if (card)
363 snd_card_free(card);
364 if (CKEN & CKEN2_AC97) {
365 GCR |= GCR_ACLINK_OFF;
366 free_irq(IRQ_AC97, NULL);
367 pxa_set_cken(CKEN2_AC97, 0);
368 }
369 return ret;
370}
371
Russell King3ae5eae2005-11-09 22:32:44 +0000372static int pxa2xx_ac97_remove(struct platform_device *dev)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200373{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100374 struct snd_card *card = platform_get_drvdata(dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200375
376 if (card) {
377 snd_card_free(card);
Russell King3ae5eae2005-11-09 22:32:44 +0000378 platform_set_drvdata(dev, NULL);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200379 GCR |= GCR_ACLINK_OFF;
380 free_irq(IRQ_AC97, NULL);
381 pxa_set_cken(CKEN2_AC97, 0);
382 }
383
384 return 0;
385}
386
Russell King3ae5eae2005-11-09 22:32:44 +0000387static struct platform_driver pxa2xx_ac97_driver = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200388 .probe = pxa2xx_ac97_probe,
389 .remove = pxa2xx_ac97_remove,
390 .suspend = pxa2xx_ac97_suspend,
391 .resume = pxa2xx_ac97_resume,
Russell King3ae5eae2005-11-09 22:32:44 +0000392 .driver = {
393 .name = "pxa2xx-ac97",
394 },
Takashi Iwai2c484df2005-06-30 18:54:04 +0200395};
396
397static int __init pxa2xx_ac97_init(void)
398{
Russell King3ae5eae2005-11-09 22:32:44 +0000399 return platform_driver_register(&pxa2xx_ac97_driver);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200400}
401
402static void __exit pxa2xx_ac97_exit(void)
403{
Russell King3ae5eae2005-11-09 22:32:44 +0000404 platform_driver_unregister(&pxa2xx_ac97_driver);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200405}
406
407module_init(pxa2xx_ac97_init);
408module_exit(pxa2xx_ac97_exit);
409
410MODULE_AUTHOR("Nicolas Pitre");
411MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
412MODULE_LICENSE("GPL");