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gerrit-public.fairphone.software / kernel / msm-4.9 / 2d2f03b022186e6d7520a758abdea9c04a2969fe / . / drivers / staging / keucr / smil.h
blob: 4226813ba588f46fb5086d7baadbb2852e1080f4 [file] [log] [blame]
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]1/*----- < smil.h> ----------------------------------------------------*/
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]2#ifndef SMIL_INCD
3#define SMIL_INCD
4
5/***************************************************************************
6Define Definition
7***************************************************************************/
8#define K_BYTE 1024 /* Kilo Byte */
9#define SECTSIZE 512 /* Sector buffer size */
10#define REDTSIZE 16 /* Redundant buffer size */
11
12/***************************************************************************/
13#define DUMMY_DATA 0xFF /* No Assign Sector Read Data */
14
15/***************************************************************************
16Max Zone/Block/Sectors Data Definition
17***************************************************************************/
18#define MAX_ZONENUM 128 /* Max Zone Numbers in a SmartMedia */
19#define MAX_BLOCKNUM 0x0400 /* Max Block Numbers in a Zone */
20#define MAX_SECTNUM 0x20 /* Max Sector Numbers in a Block */
21#define MAX_LOGBLOCK 1000 /* Max Logical Block Numbers in a Zone */
22
23/***************************************************************************/
24#define CIS_SEARCH_SECT 0x08 /* Max CIS Search Sector Number */
25
26/***************************************************************************
27Logical to Physical Block Table Data Definition
28***************************************************************************/
29#define NO_ASSIGN 0xFFFF /* No Assign Logical Block Address */
30
31/***************************************************************************
32'SectCopyMode' Data
33***************************************************************************/
34#define COMPLETED 0 /* Sector Copy Completed */
35#define REQ_ERASE 1 /* Request Read Block Erase */
36#define REQ_FAIL 2 /* Request Read Block Failed */
37
38/***************************************************************************
39Retry Counter Definition
40***************************************************************************/
41#define RDERR_REASSIGN 1 /* Reassign with Read Error */
42#define L2P_ERR_ERASE 1 /* BlockErase for Contradicted L2P Table */
43
44/***************************************************************************
45Hardware ECC Definition
46***************************************************************************/
47#define HW_ECC_SUPPORTED 1 /* Hardware ECC Supported */ /* No difinition for Software ECC */
48
49/***************************************************************************
50SmartMedia Command & Status Definition
51***************************************************************************/
52/* SmartMedia Command */
53#define WRDATA 0x80
54//#define READ 0x00
55#define READ_REDT 0x50
56//#define WRITE 0x10
57#define RDSTATUS 0x70
58
59#define READ1 0x00 //NO
60#define READ2 0x01 //NO
61#define READ3 0x50 //NO
62#define RST_CHIP 0xFF
63#define ERASE1 0x60
64#define ERASE2 0xD0
65#define READ_ID_1 0x90
66#define READ_ID_2 0x91
67#define READ_ID_3 0x9A
68
69/* 712 SmartMedia Command */
70#define SM_CMD_RESET 0x00 // 0xFF
71#define SM_CMD_READ_ID_1 0x10 // 0x90
72#define SM_CMD_READ_ID_2 0x20 // 0x91
73#define SM_CMD_READ_STAT 0x30 // 0x70
74#define SM_CMD_RDMULTPL_STAT 0x40 // 0x71
75#define SM_CMD_READ_1 0x50 // 0x00
76#define SM_CMD_READ_2 0x60 // 0x01
77#define SM_CMD_READ_3 0x70 // 0x50
78#define SM_CMD_PAGPRGM_TRUE 0x80 // {0x80, 0x10}
79#define SM_CMD_PAGPRGM_DUMY 0x90 // {0x80, 0x11}
80#define SM_CMD_PAGPRGM_MBLK 0xA0 // {0x80, 0x15}
81#define SM_CMD_BLKERASE 0xB0 // {0x60, 0xD0}
82#define SM_CMD_BLKERASE_MULTPL 0xC0 // {0x60-0x60, 0xD0}
83
84#define SM_CRADDTCT_DEBNCETIMER_EN 0x02
85#define SM_CMD_START_BIT 0x01
86
87#define SM_WaitCmdDone { while (!SM_CmdDone); }
88#define SM_WaitDmaDone { while (!SM_DmaDone); }
89
90// SmartMedia Status
91#define WR_FAIL 0x01 // 0:Pass, 1:Fail
92#define SUSPENDED 0x20 // 0:Not Suspended, 1:Suspended
93#define READY 0x40 // 0:Busy, 1:Ready
94#define WR_PRTCT 0x80 // 0:Protect, 1:Not Protect
95
96// SmartMedia Busy Time (1bit:0.1ms)
97#define BUSY_PROG 200 // tPROG : 20ms ----- Program Time old : 200
98#define BUSY_ERASE 4000 // tBERASE : 400ms ----- Block Erase Time old : 4000
99//for 712 Test
100//#define BUSY_READ 1 // tR : 100us ----- Data transfer Time old : 1
101//#define BUSY_READ 10 // tR : 100us ----- Data transfer Time old : 1
102#define BUSY_READ 200 // tR : 20ms ----- Data transfer Time old : 1
103//#define BUSY_RESET 60 // tRST : 6ms ----- Device Resetting Time old : 60
104#define BUSY_RESET 600 // tRST : 60ms ----- Device Resetting Time old : 60
105
106// Hardware Timer (1bit:0.1ms)
107#define TIME_PON 3000 // 300ms ------ Power On Wait Time
108#define TIME_CDCHK 200 // 20ms ------ Card Check Interval Timer
109#define TIME_WPCHK 50 // 5ms ------ WP Check Interval Timer
110#define TIME_5VCHK 10 // 1ms ------ 5V Check Interval Timer
111
112/***************************************************************************
113Redundant Data
114***************************************************************************/
115#define REDT_DATA 0x04
116#define REDT_BLOCK 0x05
117#define REDT_ADDR1H 0x06
118#define REDT_ADDR1L 0x07
119#define REDT_ADDR2H 0x0B
120#define REDT_ADDR2L 0x0C
121#define REDT_ECC10 0x0D
122#define REDT_ECC11 0x0E
123#define REDT_ECC12 0x0F
124#define REDT_ECC20 0x08
125#define REDT_ECC21 0x09
126#define REDT_ECC22 0x0A
127
128/***************************************************************************
129SmartMedia Model & Attribute
130***************************************************************************/
131/* SmartMedia Attribute */
132#define NOWP 0x00 // 0... .... No Write Protect
133#define WP 0x80 // 1... .... Write Protected
134#define MASK 0x00 // .00. .... NAND MASK ROM Model
135#define FLASH 0x20 // .01. .... NAND Flash ROM Model
136#define AD3CYC 0x00 // ...0 .... Address 3-cycle
137#define AD4CYC 0x10 // ...1 .... Address 4-cycle
138#define BS16 0x00 // .... 00.. 16page/block
139#define BS32 0x04 // .... 01.. 32page/block
140#define PS256 0x00 // .... ..00 256byte/page
141#define PS512 0x01 // .... ..01 512byte/page
142#define MWP 0x80 // WriteProtect mask
143#define MFLASH 0x60 // Flash Rom mask
144#define MADC 0x10 // Address Cycle
145#define MBS 0x0C // BlockSize mask
146#define MPS 0x03 // PageSize mask
147
148/* SmartMedia Model */
149#define NOSSFDC 0x00 // NO SmartMedia
150#define SSFDC1MB 0x01 // 1MB SmartMedia
151#define SSFDC2MB 0x02 // 2MB SmartMedia
152#define SSFDC4MB 0x03 // 4MB SmartMedia
153#define SSFDC8MB 0x04 // 8MB SmartMedia
154#define SSFDC16MB 0x05 // 16MB SmartMedia
155#define SSFDC32MB 0x06 // 32MB SmartMedia
156#define SSFDC64MB 0x07 // 64MB SmartMedia
157#define SSFDC128MB 0x08 //128MB SmartMedia
158#define SSFDC256MB 0x09
159#define SSFDC512MB 0x0A
160#define SSFDC1GB 0x0B
161#define SSFDC2GB 0x0C
162
163/***************************************************************************
164Struct Definition
165***************************************************************************/
166struct SSFDCTYPE
167{
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]168 BYTE Model;
169 BYTE Attribute;
170 BYTE MaxZones;
171 BYTE MaxSectors;
172 WORD MaxBlocks;
173 WORD MaxLogBlocks;
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]174};
175
176typedef struct SSFDCTYPE_T
177{
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]178 BYTE Model;
179 BYTE Attribute;
180 BYTE MaxZones;
181 BYTE MaxSectors;
182 WORD MaxBlocks;
183 WORD MaxLogBlocks;
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]184} *SSFDCTYPE_T;
185
186struct ADDRESS
187{
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]188 BYTE Zone; /* Zone Number */
189 BYTE Sector; /* Sector(512byte) Number on Block */
190 WORD PhyBlock; /* Physical Block Number on Zone */
191 WORD LogBlock; /* Logical Block Number of Zone */
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]192};
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]193
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]194typedef struct ADDRESS_T
195{
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]196 BYTE Zone; /* Zone Number */
197 BYTE Sector; /* Sector(512byte) Number on Block */
198 WORD PhyBlock; /* Physical Block Number on Zone */
199 WORD LogBlock; /* Logical Block Number of Zone */
200} *ADDRESS_T;
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]201
202struct CIS_AREA
203{
Greg Kroah-Hartman2d2f03b2010-09-08 02:47:47 -0700[diff] [blame^]204 BYTE Sector; /* Sector(512byte) Number on Block */
205 WORD PhyBlock; /* Physical Block Number on Zone 0 */
Al Cho126bb032010-09-08 00:42:32 -0700[diff] [blame]206};
207
208
209//----- SMILMain.c ---------------------------------------------------
210/******************************************/
211int Init_D_SmartMedia (void);
212int Pwoff_D_SmartMedia (void);
213int Check_D_SmartMedia (void);
214int Check_D_Parameter (struct us_data *,WORD *,BYTE *,BYTE *);
215int Media_D_ReadSector (struct us_data *,DWORD,WORD,BYTE *);
216int Media_D_WriteSector (struct us_data *,DWORD,WORD,BYTE *);
217int Media_D_CopySector (struct us_data *,DWORD,WORD,BYTE *);
218int Media_D_EraseBlock (struct us_data *,DWORD,WORD);
219int Media_D_EraseAll (struct us_data *);
220/******************************************/
221int Media_D_OneSectWriteStart (struct us_data *,DWORD,BYTE *);
222int Media_D_OneSectWriteNext (struct us_data *,BYTE *);
223int Media_D_OneSectWriteFlush (struct us_data *);
224
225/******************************************/
226void SM_EnableLED (struct us_data *,BOOLEAN);
227void Led_D_TernOn (void);
228void Led_D_TernOff (void);
229
230int Media_D_EraseAllRedtData (DWORD Index, BOOLEAN CheckBlock);
231//DWORD Media_D_GetMediaInfo (struct us_data * fdoExt, PIOCTL_MEDIA_INFO_IN pParamIn, PIOCTL_MEDIA_INFO_OUT pParamOut);
232
233//----- SMILSub.c ----------------------------------------------------
234/******************************************/
235int Check_D_DataBlank (BYTE *);
236int Check_D_FailBlock (BYTE *);
237int Check_D_DataStatus (BYTE *);
238int Load_D_LogBlockAddr (BYTE *);
239void Clr_D_RedundantData (BYTE *);
240void Set_D_LogBlockAddr (BYTE *);
241void Set_D_FailBlock (BYTE *);
242void Set_D_DataStaus (BYTE *);
243
244/******************************************/
245void Ssfdc_D_Reset (struct us_data *);
246int Ssfdc_D_ReadCisSect (struct us_data *, BYTE *,BYTE *);
247void Ssfdc_D_WriteRedtMode (void);
248void Ssfdc_D_ReadID (BYTE *, BYTE);
249int Ssfdc_D_ReadSect (struct us_data *, BYTE *,BYTE *);
250int Ssfdc_D_ReadBlock (struct us_data *, WORD, BYTE *,BYTE *);
251int Ssfdc_D_WriteSect (struct us_data *, BYTE *,BYTE *);
252int Ssfdc_D_WriteBlock (struct us_data *, WORD, BYTE *,BYTE *);
253int Ssfdc_D_CopyBlock (struct us_data *, WORD, BYTE *,BYTE *);
254int Ssfdc_D_WriteSectForCopy (struct us_data *, BYTE *,BYTE *);
255int Ssfdc_D_EraseBlock (struct us_data *);
256int Ssfdc_D_ReadRedtData (struct us_data *, BYTE *);
257int Ssfdc_D_WriteRedtData (struct us_data *, BYTE *);
258int Ssfdc_D_CheckStatus (void);
259int Set_D_SsfdcModel (BYTE);
260void Cnt_D_Reset (void);
261int Cnt_D_PowerOn (void);
262void Cnt_D_PowerOff (void);
263void Cnt_D_LedOn (void);
264void Cnt_D_LedOff (void);
265int Check_D_CntPower (void);
266int Check_D_CardExist (void);
267int Check_D_CardStsChg (void);
268int Check_D_SsfdcWP (void);
269int SM_ReadBlock (struct us_data *, BYTE *,BYTE *);
270
271int Ssfdc_D_ReadSect_DMA (struct us_data *, BYTE *,BYTE *);
272int Ssfdc_D_ReadSect_PIO (struct us_data *, BYTE *,BYTE *);
273int Ssfdc_D_WriteSect_DMA (struct us_data *, BYTE *,BYTE *);
274int Ssfdc_D_WriteSect_PIO (struct us_data *, BYTE *,BYTE *);
275
276/******************************************/
277int Check_D_ReadError (BYTE *);
278int Check_D_Correct (BYTE *,BYTE *);
279int Check_D_CISdata (BYTE *,BYTE *);
280void Set_D_RightECC (BYTE *);
281
282//----- SMILECC.c ----------------------------------------------------
283void calculate_ecc (BYTE *, BYTE *, BYTE *, BYTE *, BYTE *);
284BYTE correct_data (BYTE *, BYTE *, BYTE, BYTE, BYTE);
285int _Correct_D_SwECC (BYTE *,BYTE *,BYTE *);
286void _Calculate_D_SwECC (BYTE *,BYTE *);
287
288void SM_Init (void);
289
290#endif // already included