Harvey Harrison | 8903709 | 2009-01-07 12:19:31 -0800 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-xtensa/swab.h |
| 3 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public |
| 5 | * License. See the file "COPYING" in the main directory of this archive |
| 6 | * for more details. |
| 7 | * |
| 8 | * Copyright (C) 2001 - 2005 Tensilica Inc. |
| 9 | */ |
| 10 | |
| 11 | #ifndef _XTENSA_SWAB_H |
| 12 | #define _XTENSA_SWAB_H |
| 13 | |
Jaswinder Singh Rajput | 1ff8f73 | 2009-01-31 12:02:14 +0530 | [diff] [blame] | 14 | #include <linux/types.h> |
Harvey Harrison | 8903709 | 2009-01-07 12:19:31 -0800 | [diff] [blame] | 15 | #include <linux/compiler.h> |
| 16 | |
| 17 | #define __SWAB_64_THRU_32__ |
| 18 | |
| 19 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) |
| 20 | { |
| 21 | __u32 res; |
| 22 | /* instruction sequence from Xtensa ISA release 2/2000 */ |
| 23 | __asm__("ssai 8 \n\t" |
| 24 | "srli %0, %1, 16 \n\t" |
| 25 | "src %0, %0, %1 \n\t" |
| 26 | "src %0, %0, %0 \n\t" |
| 27 | "src %0, %1, %0 \n" |
| 28 | : "=&a" (res) |
| 29 | : "a" (x) |
| 30 | ); |
| 31 | return res; |
| 32 | } |
| 33 | #define __arch_swab32 __arch_swab32 |
| 34 | |
| 35 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) |
| 36 | { |
| 37 | /* Given that 'short' values are signed (i.e., can be negative), |
| 38 | * we cannot assume that the upper 16-bits of the register are |
| 39 | * zero. We are careful to mask values after shifting. |
| 40 | */ |
| 41 | |
| 42 | /* There exists an anomaly between xt-gcc and xt-xcc. xt-gcc |
| 43 | * inserts an extui instruction after putting this function inline |
| 44 | * to ensure that it uses only the least-significant 16 bits of |
| 45 | * the result. xt-xcc doesn't use an extui, but assumes the |
| 46 | * __asm__ macro follows convention that the upper 16 bits of an |
| 47 | * 'unsigned short' result are still zero. This macro doesn't |
| 48 | * follow convention; indeed, it leaves garbage in the upport 16 |
| 49 | * bits of the register. |
| 50 | |
| 51 | * Declaring the temporary variables 'res' and 'tmp' to be 32-bit |
| 52 | * types while the return type of the function is a 16-bit type |
| 53 | * forces both compilers to insert exactly one extui instruction |
| 54 | * (or equivalent) to mask off the upper 16 bits. */ |
| 55 | |
| 56 | __u32 res; |
| 57 | __u32 tmp; |
| 58 | |
| 59 | __asm__("extui %1, %2, 8, 8\n\t" |
| 60 | "slli %0, %2, 8 \n\t" |
| 61 | "or %0, %0, %1 \n" |
| 62 | : "=&a" (res), "=&a" (tmp) |
| 63 | : "a" (x) |
| 64 | ); |
| 65 | |
| 66 | return res; |
| 67 | } |
| 68 | #define __arch_swab16 __arch_swab16 |
| 69 | |
| 70 | #endif /* _XTENSA_SWAB_H */ |