Chris Metcalf | eb7c792 | 2011-11-02 23:02:17 -0400 | [diff] [blame] | 1 | /* TILE-Gx opcode information. |
| 2 | * |
| 3 | * Copyright 2011 Tilera Corporation. All Rights Reserved. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License |
| 7 | * as published by the Free Software Foundation, version 2. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but |
| 10 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
| 12 | * NON INFRINGEMENT. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | * |
| 16 | * |
| 17 | * |
| 18 | * |
| 19 | */ |
| 20 | |
| 21 | #ifndef opcode_tile_h |
| 22 | #define opcode_tile_h |
| 23 | |
| 24 | #include <arch/opcode.h> |
| 25 | |
| 26 | |
| 27 | enum |
| 28 | { |
| 29 | TILEGX_MAX_OPERANDS = 4 /* bfexts */ |
| 30 | }; |
| 31 | |
| 32 | typedef enum |
| 33 | { |
| 34 | TILEGX_OPC_BPT, |
| 35 | TILEGX_OPC_INFO, |
| 36 | TILEGX_OPC_INFOL, |
| 37 | TILEGX_OPC_MOVE, |
| 38 | TILEGX_OPC_MOVEI, |
| 39 | TILEGX_OPC_MOVELI, |
| 40 | TILEGX_OPC_PREFETCH, |
| 41 | TILEGX_OPC_PREFETCH_ADD_L1, |
| 42 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, |
| 43 | TILEGX_OPC_PREFETCH_ADD_L2, |
| 44 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, |
| 45 | TILEGX_OPC_PREFETCH_ADD_L3, |
| 46 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, |
| 47 | TILEGX_OPC_PREFETCH_L1, |
| 48 | TILEGX_OPC_PREFETCH_L1_FAULT, |
| 49 | TILEGX_OPC_PREFETCH_L2, |
| 50 | TILEGX_OPC_PREFETCH_L2_FAULT, |
| 51 | TILEGX_OPC_PREFETCH_L3, |
| 52 | TILEGX_OPC_PREFETCH_L3_FAULT, |
| 53 | TILEGX_OPC_RAISE, |
| 54 | TILEGX_OPC_ADD, |
| 55 | TILEGX_OPC_ADDI, |
| 56 | TILEGX_OPC_ADDLI, |
| 57 | TILEGX_OPC_ADDX, |
| 58 | TILEGX_OPC_ADDXI, |
| 59 | TILEGX_OPC_ADDXLI, |
| 60 | TILEGX_OPC_ADDXSC, |
| 61 | TILEGX_OPC_AND, |
| 62 | TILEGX_OPC_ANDI, |
| 63 | TILEGX_OPC_BEQZ, |
| 64 | TILEGX_OPC_BEQZT, |
| 65 | TILEGX_OPC_BFEXTS, |
| 66 | TILEGX_OPC_BFEXTU, |
| 67 | TILEGX_OPC_BFINS, |
| 68 | TILEGX_OPC_BGEZ, |
| 69 | TILEGX_OPC_BGEZT, |
| 70 | TILEGX_OPC_BGTZ, |
| 71 | TILEGX_OPC_BGTZT, |
| 72 | TILEGX_OPC_BLBC, |
| 73 | TILEGX_OPC_BLBCT, |
| 74 | TILEGX_OPC_BLBS, |
| 75 | TILEGX_OPC_BLBST, |
| 76 | TILEGX_OPC_BLEZ, |
| 77 | TILEGX_OPC_BLEZT, |
| 78 | TILEGX_OPC_BLTZ, |
| 79 | TILEGX_OPC_BLTZT, |
| 80 | TILEGX_OPC_BNEZ, |
| 81 | TILEGX_OPC_BNEZT, |
| 82 | TILEGX_OPC_CLZ, |
| 83 | TILEGX_OPC_CMOVEQZ, |
| 84 | TILEGX_OPC_CMOVNEZ, |
| 85 | TILEGX_OPC_CMPEQ, |
| 86 | TILEGX_OPC_CMPEQI, |
| 87 | TILEGX_OPC_CMPEXCH, |
| 88 | TILEGX_OPC_CMPEXCH4, |
| 89 | TILEGX_OPC_CMPLES, |
| 90 | TILEGX_OPC_CMPLEU, |
| 91 | TILEGX_OPC_CMPLTS, |
| 92 | TILEGX_OPC_CMPLTSI, |
| 93 | TILEGX_OPC_CMPLTU, |
| 94 | TILEGX_OPC_CMPLTUI, |
| 95 | TILEGX_OPC_CMPNE, |
| 96 | TILEGX_OPC_CMUL, |
| 97 | TILEGX_OPC_CMULA, |
| 98 | TILEGX_OPC_CMULAF, |
| 99 | TILEGX_OPC_CMULF, |
| 100 | TILEGX_OPC_CMULFR, |
| 101 | TILEGX_OPC_CMULH, |
| 102 | TILEGX_OPC_CMULHR, |
| 103 | TILEGX_OPC_CRC32_32, |
| 104 | TILEGX_OPC_CRC32_8, |
| 105 | TILEGX_OPC_CTZ, |
| 106 | TILEGX_OPC_DBLALIGN, |
| 107 | TILEGX_OPC_DBLALIGN2, |
| 108 | TILEGX_OPC_DBLALIGN4, |
| 109 | TILEGX_OPC_DBLALIGN6, |
| 110 | TILEGX_OPC_DRAIN, |
| 111 | TILEGX_OPC_DTLBPR, |
| 112 | TILEGX_OPC_EXCH, |
| 113 | TILEGX_OPC_EXCH4, |
| 114 | TILEGX_OPC_FDOUBLE_ADD_FLAGS, |
| 115 | TILEGX_OPC_FDOUBLE_ADDSUB, |
| 116 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, |
| 117 | TILEGX_OPC_FDOUBLE_PACK1, |
| 118 | TILEGX_OPC_FDOUBLE_PACK2, |
| 119 | TILEGX_OPC_FDOUBLE_SUB_FLAGS, |
| 120 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, |
| 121 | TILEGX_OPC_FDOUBLE_UNPACK_MIN, |
| 122 | TILEGX_OPC_FETCHADD, |
| 123 | TILEGX_OPC_FETCHADD4, |
| 124 | TILEGX_OPC_FETCHADDGEZ, |
| 125 | TILEGX_OPC_FETCHADDGEZ4, |
| 126 | TILEGX_OPC_FETCHAND, |
| 127 | TILEGX_OPC_FETCHAND4, |
| 128 | TILEGX_OPC_FETCHOR, |
| 129 | TILEGX_OPC_FETCHOR4, |
| 130 | TILEGX_OPC_FINV, |
| 131 | TILEGX_OPC_FLUSH, |
| 132 | TILEGX_OPC_FLUSHWB, |
| 133 | TILEGX_OPC_FNOP, |
| 134 | TILEGX_OPC_FSINGLE_ADD1, |
| 135 | TILEGX_OPC_FSINGLE_ADDSUB2, |
| 136 | TILEGX_OPC_FSINGLE_MUL1, |
| 137 | TILEGX_OPC_FSINGLE_MUL2, |
| 138 | TILEGX_OPC_FSINGLE_PACK1, |
| 139 | TILEGX_OPC_FSINGLE_PACK2, |
| 140 | TILEGX_OPC_FSINGLE_SUB1, |
| 141 | TILEGX_OPC_ICOH, |
| 142 | TILEGX_OPC_ILL, |
| 143 | TILEGX_OPC_INV, |
| 144 | TILEGX_OPC_IRET, |
| 145 | TILEGX_OPC_J, |
| 146 | TILEGX_OPC_JAL, |
| 147 | TILEGX_OPC_JALR, |
| 148 | TILEGX_OPC_JALRP, |
| 149 | TILEGX_OPC_JR, |
| 150 | TILEGX_OPC_JRP, |
| 151 | TILEGX_OPC_LD, |
| 152 | TILEGX_OPC_LD1S, |
| 153 | TILEGX_OPC_LD1S_ADD, |
| 154 | TILEGX_OPC_LD1U, |
| 155 | TILEGX_OPC_LD1U_ADD, |
| 156 | TILEGX_OPC_LD2S, |
| 157 | TILEGX_OPC_LD2S_ADD, |
| 158 | TILEGX_OPC_LD2U, |
| 159 | TILEGX_OPC_LD2U_ADD, |
| 160 | TILEGX_OPC_LD4S, |
| 161 | TILEGX_OPC_LD4S_ADD, |
| 162 | TILEGX_OPC_LD4U, |
| 163 | TILEGX_OPC_LD4U_ADD, |
| 164 | TILEGX_OPC_LD_ADD, |
| 165 | TILEGX_OPC_LDNA, |
| 166 | TILEGX_OPC_LDNA_ADD, |
| 167 | TILEGX_OPC_LDNT, |
| 168 | TILEGX_OPC_LDNT1S, |
| 169 | TILEGX_OPC_LDNT1S_ADD, |
| 170 | TILEGX_OPC_LDNT1U, |
| 171 | TILEGX_OPC_LDNT1U_ADD, |
| 172 | TILEGX_OPC_LDNT2S, |
| 173 | TILEGX_OPC_LDNT2S_ADD, |
| 174 | TILEGX_OPC_LDNT2U, |
| 175 | TILEGX_OPC_LDNT2U_ADD, |
| 176 | TILEGX_OPC_LDNT4S, |
| 177 | TILEGX_OPC_LDNT4S_ADD, |
| 178 | TILEGX_OPC_LDNT4U, |
| 179 | TILEGX_OPC_LDNT4U_ADD, |
| 180 | TILEGX_OPC_LDNT_ADD, |
| 181 | TILEGX_OPC_LNK, |
| 182 | TILEGX_OPC_MF, |
| 183 | TILEGX_OPC_MFSPR, |
| 184 | TILEGX_OPC_MM, |
| 185 | TILEGX_OPC_MNZ, |
| 186 | TILEGX_OPC_MTSPR, |
| 187 | TILEGX_OPC_MUL_HS_HS, |
| 188 | TILEGX_OPC_MUL_HS_HU, |
| 189 | TILEGX_OPC_MUL_HS_LS, |
| 190 | TILEGX_OPC_MUL_HS_LU, |
| 191 | TILEGX_OPC_MUL_HU_HU, |
| 192 | TILEGX_OPC_MUL_HU_LS, |
| 193 | TILEGX_OPC_MUL_HU_LU, |
| 194 | TILEGX_OPC_MUL_LS_LS, |
| 195 | TILEGX_OPC_MUL_LS_LU, |
| 196 | TILEGX_OPC_MUL_LU_LU, |
| 197 | TILEGX_OPC_MULA_HS_HS, |
| 198 | TILEGX_OPC_MULA_HS_HU, |
| 199 | TILEGX_OPC_MULA_HS_LS, |
| 200 | TILEGX_OPC_MULA_HS_LU, |
| 201 | TILEGX_OPC_MULA_HU_HU, |
| 202 | TILEGX_OPC_MULA_HU_LS, |
| 203 | TILEGX_OPC_MULA_HU_LU, |
| 204 | TILEGX_OPC_MULA_LS_LS, |
| 205 | TILEGX_OPC_MULA_LS_LU, |
| 206 | TILEGX_OPC_MULA_LU_LU, |
| 207 | TILEGX_OPC_MULAX, |
| 208 | TILEGX_OPC_MULX, |
| 209 | TILEGX_OPC_MZ, |
| 210 | TILEGX_OPC_NAP, |
| 211 | TILEGX_OPC_NOP, |
| 212 | TILEGX_OPC_NOR, |
| 213 | TILEGX_OPC_OR, |
| 214 | TILEGX_OPC_ORI, |
| 215 | TILEGX_OPC_PCNT, |
| 216 | TILEGX_OPC_REVBITS, |
| 217 | TILEGX_OPC_REVBYTES, |
| 218 | TILEGX_OPC_ROTL, |
| 219 | TILEGX_OPC_ROTLI, |
| 220 | TILEGX_OPC_SHL, |
| 221 | TILEGX_OPC_SHL16INSLI, |
| 222 | TILEGX_OPC_SHL1ADD, |
| 223 | TILEGX_OPC_SHL1ADDX, |
| 224 | TILEGX_OPC_SHL2ADD, |
| 225 | TILEGX_OPC_SHL2ADDX, |
| 226 | TILEGX_OPC_SHL3ADD, |
| 227 | TILEGX_OPC_SHL3ADDX, |
| 228 | TILEGX_OPC_SHLI, |
| 229 | TILEGX_OPC_SHLX, |
| 230 | TILEGX_OPC_SHLXI, |
| 231 | TILEGX_OPC_SHRS, |
| 232 | TILEGX_OPC_SHRSI, |
| 233 | TILEGX_OPC_SHRU, |
| 234 | TILEGX_OPC_SHRUI, |
| 235 | TILEGX_OPC_SHRUX, |
| 236 | TILEGX_OPC_SHRUXI, |
| 237 | TILEGX_OPC_SHUFFLEBYTES, |
| 238 | TILEGX_OPC_ST, |
| 239 | TILEGX_OPC_ST1, |
| 240 | TILEGX_OPC_ST1_ADD, |
| 241 | TILEGX_OPC_ST2, |
| 242 | TILEGX_OPC_ST2_ADD, |
| 243 | TILEGX_OPC_ST4, |
| 244 | TILEGX_OPC_ST4_ADD, |
| 245 | TILEGX_OPC_ST_ADD, |
| 246 | TILEGX_OPC_STNT, |
| 247 | TILEGX_OPC_STNT1, |
| 248 | TILEGX_OPC_STNT1_ADD, |
| 249 | TILEGX_OPC_STNT2, |
| 250 | TILEGX_OPC_STNT2_ADD, |
| 251 | TILEGX_OPC_STNT4, |
| 252 | TILEGX_OPC_STNT4_ADD, |
| 253 | TILEGX_OPC_STNT_ADD, |
| 254 | TILEGX_OPC_SUB, |
| 255 | TILEGX_OPC_SUBX, |
| 256 | TILEGX_OPC_SUBXSC, |
| 257 | TILEGX_OPC_SWINT0, |
| 258 | TILEGX_OPC_SWINT1, |
| 259 | TILEGX_OPC_SWINT2, |
| 260 | TILEGX_OPC_SWINT3, |
| 261 | TILEGX_OPC_TBLIDXB0, |
| 262 | TILEGX_OPC_TBLIDXB1, |
| 263 | TILEGX_OPC_TBLIDXB2, |
| 264 | TILEGX_OPC_TBLIDXB3, |
| 265 | TILEGX_OPC_V1ADD, |
| 266 | TILEGX_OPC_V1ADDI, |
| 267 | TILEGX_OPC_V1ADDUC, |
| 268 | TILEGX_OPC_V1ADIFFU, |
| 269 | TILEGX_OPC_V1AVGU, |
| 270 | TILEGX_OPC_V1CMPEQ, |
| 271 | TILEGX_OPC_V1CMPEQI, |
| 272 | TILEGX_OPC_V1CMPLES, |
| 273 | TILEGX_OPC_V1CMPLEU, |
| 274 | TILEGX_OPC_V1CMPLTS, |
| 275 | TILEGX_OPC_V1CMPLTSI, |
| 276 | TILEGX_OPC_V1CMPLTU, |
| 277 | TILEGX_OPC_V1CMPLTUI, |
| 278 | TILEGX_OPC_V1CMPNE, |
| 279 | TILEGX_OPC_V1DDOTPU, |
| 280 | TILEGX_OPC_V1DDOTPUA, |
| 281 | TILEGX_OPC_V1DDOTPUS, |
| 282 | TILEGX_OPC_V1DDOTPUSA, |
| 283 | TILEGX_OPC_V1DOTP, |
| 284 | TILEGX_OPC_V1DOTPA, |
| 285 | TILEGX_OPC_V1DOTPU, |
| 286 | TILEGX_OPC_V1DOTPUA, |
| 287 | TILEGX_OPC_V1DOTPUS, |
| 288 | TILEGX_OPC_V1DOTPUSA, |
| 289 | TILEGX_OPC_V1INT_H, |
| 290 | TILEGX_OPC_V1INT_L, |
| 291 | TILEGX_OPC_V1MAXU, |
| 292 | TILEGX_OPC_V1MAXUI, |
| 293 | TILEGX_OPC_V1MINU, |
| 294 | TILEGX_OPC_V1MINUI, |
| 295 | TILEGX_OPC_V1MNZ, |
| 296 | TILEGX_OPC_V1MULTU, |
| 297 | TILEGX_OPC_V1MULU, |
| 298 | TILEGX_OPC_V1MULUS, |
| 299 | TILEGX_OPC_V1MZ, |
| 300 | TILEGX_OPC_V1SADAU, |
| 301 | TILEGX_OPC_V1SADU, |
| 302 | TILEGX_OPC_V1SHL, |
| 303 | TILEGX_OPC_V1SHLI, |
| 304 | TILEGX_OPC_V1SHRS, |
| 305 | TILEGX_OPC_V1SHRSI, |
| 306 | TILEGX_OPC_V1SHRU, |
| 307 | TILEGX_OPC_V1SHRUI, |
| 308 | TILEGX_OPC_V1SUB, |
| 309 | TILEGX_OPC_V1SUBUC, |
| 310 | TILEGX_OPC_V2ADD, |
| 311 | TILEGX_OPC_V2ADDI, |
| 312 | TILEGX_OPC_V2ADDSC, |
| 313 | TILEGX_OPC_V2ADIFFS, |
| 314 | TILEGX_OPC_V2AVGS, |
| 315 | TILEGX_OPC_V2CMPEQ, |
| 316 | TILEGX_OPC_V2CMPEQI, |
| 317 | TILEGX_OPC_V2CMPLES, |
| 318 | TILEGX_OPC_V2CMPLEU, |
| 319 | TILEGX_OPC_V2CMPLTS, |
| 320 | TILEGX_OPC_V2CMPLTSI, |
| 321 | TILEGX_OPC_V2CMPLTU, |
| 322 | TILEGX_OPC_V2CMPLTUI, |
| 323 | TILEGX_OPC_V2CMPNE, |
| 324 | TILEGX_OPC_V2DOTP, |
| 325 | TILEGX_OPC_V2DOTPA, |
| 326 | TILEGX_OPC_V2INT_H, |
| 327 | TILEGX_OPC_V2INT_L, |
| 328 | TILEGX_OPC_V2MAXS, |
| 329 | TILEGX_OPC_V2MAXSI, |
| 330 | TILEGX_OPC_V2MINS, |
| 331 | TILEGX_OPC_V2MINSI, |
| 332 | TILEGX_OPC_V2MNZ, |
| 333 | TILEGX_OPC_V2MULFSC, |
| 334 | TILEGX_OPC_V2MULS, |
| 335 | TILEGX_OPC_V2MULTS, |
| 336 | TILEGX_OPC_V2MZ, |
| 337 | TILEGX_OPC_V2PACKH, |
| 338 | TILEGX_OPC_V2PACKL, |
| 339 | TILEGX_OPC_V2PACKUC, |
| 340 | TILEGX_OPC_V2SADAS, |
| 341 | TILEGX_OPC_V2SADAU, |
| 342 | TILEGX_OPC_V2SADS, |
| 343 | TILEGX_OPC_V2SADU, |
| 344 | TILEGX_OPC_V2SHL, |
| 345 | TILEGX_OPC_V2SHLI, |
| 346 | TILEGX_OPC_V2SHLSC, |
| 347 | TILEGX_OPC_V2SHRS, |
| 348 | TILEGX_OPC_V2SHRSI, |
| 349 | TILEGX_OPC_V2SHRU, |
| 350 | TILEGX_OPC_V2SHRUI, |
| 351 | TILEGX_OPC_V2SUB, |
| 352 | TILEGX_OPC_V2SUBSC, |
| 353 | TILEGX_OPC_V4ADD, |
| 354 | TILEGX_OPC_V4ADDSC, |
| 355 | TILEGX_OPC_V4INT_H, |
| 356 | TILEGX_OPC_V4INT_L, |
| 357 | TILEGX_OPC_V4PACKSC, |
| 358 | TILEGX_OPC_V4SHL, |
| 359 | TILEGX_OPC_V4SHLSC, |
| 360 | TILEGX_OPC_V4SHRS, |
| 361 | TILEGX_OPC_V4SHRU, |
| 362 | TILEGX_OPC_V4SUB, |
| 363 | TILEGX_OPC_V4SUBSC, |
| 364 | TILEGX_OPC_WH64, |
| 365 | TILEGX_OPC_XOR, |
| 366 | TILEGX_OPC_XORI, |
| 367 | TILEGX_OPC_NONE |
| 368 | } tilegx_mnemonic; |
| 369 | |
| 370 | |
| 371 | |
| 372 | typedef enum |
| 373 | { |
| 374 | TILEGX_PIPELINE_X0, |
| 375 | TILEGX_PIPELINE_X1, |
| 376 | TILEGX_PIPELINE_Y0, |
| 377 | TILEGX_PIPELINE_Y1, |
| 378 | TILEGX_PIPELINE_Y2, |
| 379 | } tilegx_pipeline; |
| 380 | |
| 381 | #define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) |
| 382 | |
| 383 | typedef enum |
| 384 | { |
| 385 | TILEGX_OP_TYPE_REGISTER, |
| 386 | TILEGX_OP_TYPE_IMMEDIATE, |
| 387 | TILEGX_OP_TYPE_ADDRESS, |
| 388 | TILEGX_OP_TYPE_SPR |
| 389 | } tilegx_operand_type; |
| 390 | |
| 391 | struct tilegx_operand |
| 392 | { |
| 393 | /* Is this operand a register, immediate or address? */ |
| 394 | tilegx_operand_type type; |
| 395 | |
| 396 | /* The default relocation type for this operand. */ |
| 397 | signed int default_reloc : 16; |
| 398 | |
| 399 | /* How many bits is this value? (used for range checking) */ |
| 400 | unsigned int num_bits : 5; |
| 401 | |
| 402 | /* Is the value signed? (used for range checking) */ |
| 403 | unsigned int is_signed : 1; |
| 404 | |
| 405 | /* Is this operand a source register? */ |
| 406 | unsigned int is_src_reg : 1; |
| 407 | |
| 408 | /* Is this operand written? (i.e. is it a destination register) */ |
| 409 | unsigned int is_dest_reg : 1; |
| 410 | |
| 411 | /* Is this operand PC-relative? */ |
| 412 | unsigned int is_pc_relative : 1; |
| 413 | |
| 414 | /* By how many bits do we right shift the value before inserting? */ |
| 415 | unsigned int rightshift : 2; |
| 416 | |
| 417 | /* Return the bits for this operand to be ORed into an existing bundle. */ |
| 418 | tilegx_bundle_bits (*insert) (int op); |
| 419 | |
| 420 | /* Extract this operand and return it. */ |
| 421 | unsigned int (*extract) (tilegx_bundle_bits bundle); |
| 422 | }; |
| 423 | |
| 424 | |
| 425 | extern const struct tilegx_operand tilegx_operands[]; |
| 426 | |
| 427 | /* One finite-state machine per pipe for rapid instruction decoding. */ |
| 428 | extern const unsigned short * const |
| 429 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; |
| 430 | |
| 431 | |
| 432 | struct tilegx_opcode |
| 433 | { |
| 434 | /* The opcode mnemonic, e.g. "add" */ |
| 435 | const char *name; |
| 436 | |
| 437 | /* The enum value for this mnemonic. */ |
| 438 | tilegx_mnemonic mnemonic; |
| 439 | |
| 440 | /* A bit mask of which of the five pipes this instruction |
| 441 | is compatible with: |
| 442 | X0 0x01 |
| 443 | X1 0x02 |
| 444 | Y0 0x04 |
| 445 | Y1 0x08 |
| 446 | Y2 0x10 */ |
| 447 | unsigned char pipes; |
| 448 | |
| 449 | /* How many operands are there? */ |
| 450 | unsigned char num_operands; |
| 451 | |
| 452 | /* Which register does this write implicitly, or TREG_ZERO if none? */ |
| 453 | unsigned char implicitly_written_register; |
| 454 | |
| 455 | /* Can this be bundled with other instructions (almost always true). */ |
| 456 | unsigned char can_bundle; |
| 457 | |
| 458 | /* The description of the operands. Each of these is an |
| 459 | * index into the tilegx_operands[] table. */ |
| 460 | unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; |
| 461 | |
| 462 | }; |
| 463 | |
| 464 | extern const struct tilegx_opcode tilegx_opcodes[]; |
| 465 | |
| 466 | /* Used for non-textual disassembly into structs. */ |
| 467 | struct tilegx_decoded_instruction |
| 468 | { |
| 469 | const struct tilegx_opcode *opcode; |
| 470 | const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; |
| 471 | long long operand_values[TILEGX_MAX_OPERANDS]; |
| 472 | }; |
| 473 | |
| 474 | |
| 475 | /* Disassemble a bundle into a struct for machine processing. */ |
| 476 | extern int parse_insn_tilegx(tilegx_bundle_bits bits, |
| 477 | unsigned long long pc, |
| 478 | struct tilegx_decoded_instruction |
| 479 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); |
| 480 | |
| 481 | |
| 482 | |
| 483 | #endif /* opcode_tilegx_h */ |