blob: e09cab62b2c68bf763f78e2c2c03694b183074ad [file] [log] [blame]
Jemma Denson5afc9a22015-04-14 09:04:50 -03001/*
2 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
3
4 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
5 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
6 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
7 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
8 April 2015
9 Refactored & simplified driver
10 Updated to work with delivery system supplied by DVBv5
11 Add frequency, fec & pilot to get_frontend
12
13 Cards supported: Technisat Skystar S2
14
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
19
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
24*/
25
26#include <linux/slab.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/moduleparam.h>
30#include <linux/init.h>
31#include <linux/firmware.h>
32#include "dvb_frontend.h"
33#include "cx24120.h"
34
35#define CX24120_SEARCH_RANGE_KHZ 5000
36#define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
37
38/* cx24120 i2c registers */
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030039#define CX24120_REG_CMD_START 0x00 /* write cmd_id */
40#define CX24120_REG_CMD_ARGS 0x01 /* write command arguments */
41#define CX24120_REG_CMD_END 0x1f /* write 0x01 for end */
Jemma Denson5afc9a22015-04-14 09:04:50 -030042
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030043#define CX24120_REG_MAILBOX 0x33
44#define CX24120_REG_FREQ3 0x34 /* frequency */
45#define CX24120_REG_FREQ2 0x35
46#define CX24120_REG_FREQ1 0x36
Jemma Denson5afc9a22015-04-14 09:04:50 -030047
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030048#define CX24120_REG_FECMODE 0x39 /* FEC status */
49#define CX24120_REG_STATUS 0x3a /* Tuner status */
50#define CX24120_REG_SIGSTR_H 0x3a /* Signal strength high */
51#define CX24120_REG_SIGSTR_L 0x3b /* Signal strength low byte */
52#define CX24120_REG_QUALITY_H 0x40 /* SNR high byte */
53#define CX24120_REG_QUALITY_L 0x41 /* SNR low byte */
Jemma Denson5afc9a22015-04-14 09:04:50 -030054
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030055#define CX24120_REG_BER_HH 0x47 /* BER high byte of high word */
56#define CX24120_REG_BER_HL 0x48 /* BER low byte of high word */
57#define CX24120_REG_BER_LH 0x49 /* BER high byte of low word */
58#define CX24120_REG_BER_LL 0x4a /* BER low byte of low word */
Jemma Denson5afc9a22015-04-14 09:04:50 -030059
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030060#define CX24120_REG_UCB_H 0x50 /* UCB high byte */
61#define CX24120_REG_UCB_L 0x51 /* UCB low byte */
Jemma Denson5afc9a22015-04-14 09:04:50 -030062
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030063#define CX24120_REG_CLKDIV 0xe6
64#define CX24120_REG_RATEDIV 0xf0
Jemma Denson5afc9a22015-04-14 09:04:50 -030065
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030066#define CX24120_REG_REVISION 0xff /* Chip revision (ro) */
Jemma Denson5afc9a22015-04-14 09:04:50 -030067
68
69/* Command messages */
70enum command_message_id {
71 CMD_VCO_SET = 0x10, /* cmd.len = 12; */
72 CMD_TUNEREQUEST = 0x11, /* cmd.len = 15; */
73
74 CMD_MPEG_ONOFF = 0x13, /* cmd.len = 4; */
75 CMD_MPEG_INIT = 0x14, /* cmd.len = 7; */
76 CMD_BANDWIDTH = 0x15, /* cmd.len = 12; */
77 CMD_CLOCK_READ = 0x16, /* read clock */
78 CMD_CLOCK_SET = 0x17, /* cmd.len = 10; */
79
80 CMD_DISEQC_MSG1 = 0x20, /* cmd.len = 11; */
81 CMD_DISEQC_MSG2 = 0x21, /* cmd.len = d->msg_len + 6; */
82 CMD_SETVOLTAGE = 0x22, /* cmd.len = 2; */
83 CMD_SETTONE = 0x23, /* cmd.len = 4; */
84 CMD_DISEQC_BURST = 0x24, /* cmd.len not used !!! */
85
86 CMD_READ_SNR = 0x1a, /* Read signal strength */
87 CMD_START_TUNER = 0x1b, /* ??? */
88
89 CMD_FWVERSION = 0x35,
90
91 CMD_TUNER_INIT = 0x3c, /* cmd.len = 0x03; */
92};
93
94#define CX24120_MAX_CMD_LEN 30
95
96/* pilot mask */
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -030097#define CX24120_PILOT_OFF 0x00
98#define CX24120_PILOT_ON 0x40
99#define CX24120_PILOT_AUTO 0x80
Jemma Denson5afc9a22015-04-14 09:04:50 -0300100
101/* signal status */
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300102#define CX24120_HAS_SIGNAL 0x01
103#define CX24120_HAS_CARRIER 0x02
104#define CX24120_HAS_VITERBI 0x04
105#define CX24120_HAS_LOCK 0x08
106#define CX24120_HAS_UNK1 0x10
107#define CX24120_HAS_UNK2 0x20
108#define CX24120_STATUS_MASK 0x0f
109#define CX24120_SIGNAL_MASK 0xc0
Jemma Denson5afc9a22015-04-14 09:04:50 -0300110
Patrick Boettcherc5fb0f52015-04-17 06:04:53 -0300111#define info(args...) pr_info("cx24120: " args)
112#define err(args...) pr_err("cx24120: ### ERROR: " args)
Jemma Denson5afc9a22015-04-14 09:04:50 -0300113
114/* The Demod/Tuner can't easily provide these, we cache them */
115struct cx24120_tuning {
116 u32 frequency;
117 u32 symbol_rate;
118 fe_spectral_inversion_t inversion;
119 fe_code_rate_t fec;
120
121 fe_delivery_system_t delsys;
122 fe_modulation_t modulation;
123 fe_pilot_t pilot;
124
125 /* Demod values */
126 u8 fec_val;
127 u8 fec_mask;
128 u8 clkdiv;
129 u8 ratediv;
130 u8 inversion_val;
131 u8 pilot_val;
132};
133
134
135/* Private state */
136struct cx24120_state {
137 struct i2c_adapter *i2c;
138 const struct cx24120_config *config;
139 struct dvb_frontend frontend;
140
141 u8 cold_init;
142 u8 mpeg_enabled;
143
144 /* current and next tuning parameters */
145 struct cx24120_tuning dcur;
146 struct cx24120_tuning dnxt;
147};
148
149
150/* Command message to firmware */
151struct cx24120_cmd {
152 u8 id;
153 u8 len;
154 u8 arg[CX24120_MAX_CMD_LEN];
155};
156
157
158/* Read single register */
159static int cx24120_readreg(struct cx24120_state *state, u8 reg)
160{
161 int ret;
162 u8 buf = 0;
163 struct i2c_msg msg[] = {
164 { .addr = state->config->i2c_addr,
165 .flags = 0,
166 .len = 1,
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300167 .buf = &reg
168 }, {
169 .addr = state->config->i2c_addr,
Jemma Denson5afc9a22015-04-14 09:04:50 -0300170 .flags = I2C_M_RD,
171 .len = 1,
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300172 .buf = &buf
173 }
Jemma Denson5afc9a22015-04-14 09:04:50 -0300174 };
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300175
Jemma Denson5afc9a22015-04-14 09:04:50 -0300176 ret = i2c_transfer(state->i2c, msg, 2);
177 if (ret != 2) {
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300178 err("Read error: reg=0x%02x, ret=%i)\n", reg, ret);
Jemma Denson5afc9a22015-04-14 09:04:50 -0300179 return ret;
180 }
181
182 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
183 __func__, reg, buf);
184
185 return buf;
186}
187
188
189/* Write single register */
190static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
191{
192 u8 buf[] = { reg, data };
193 struct i2c_msg msg = {
194 .addr = state->config->i2c_addr,
195 .flags = 0,
196 .buf = buf,
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300197 .len = 2
198 };
Jemma Denson5afc9a22015-04-14 09:04:50 -0300199 int ret;
200
201 ret = i2c_transfer(state->i2c, &msg, 1);
202 if (ret != 1) {
203 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
204 ret, reg, data);
205 return ret;
206 }
207
208 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
209 __func__, reg, data);
210
211 return 0;
212}
213
214
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300215/* Write multiple registers in chunks of i2c_wr_max-sized buffers */
Jemma Denson5afc9a22015-04-14 09:04:50 -0300216static int cx24120_writeregN(struct cx24120_state *state,
217 u8 reg, const u8 *values, u16 len, u8 incr)
218{
219 int ret;
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300220 u16 max = state->config->i2c_wr_max > 0 ?
221 state->config->i2c_wr_max :
222 len;
Jemma Denson5afc9a22015-04-14 09:04:50 -0300223
224 struct i2c_msg msg = {
225 .addr = state->config->i2c_addr,
226 .flags = 0,
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300227 };
228
229 msg.buf = kmalloc(max + 1, GFP_KERNEL);
230 if (msg.buf == NULL)
231 return -ENOMEM;
Jemma Denson5afc9a22015-04-14 09:04:50 -0300232
233 while (len) {
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300234 msg.buf[0] = reg;
235 msg.len = len > max ? max : len;
236 memcpy(&msg.buf[1], values, msg.len);
Jemma Denson5afc9a22015-04-14 09:04:50 -0300237
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300238 len -= msg.len; /* data length revers counter */
239 values += msg.len; /* incr data pointer */
Jemma Denson5afc9a22015-04-14 09:04:50 -0300240
241 if (incr)
242 reg += msg.len;
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300243 msg.len++; /* don't forget the addr byte */
Jemma Denson5afc9a22015-04-14 09:04:50 -0300244
245 ret = i2c_transfer(state->i2c, &msg, 1);
246 if (ret != 1) {
247 err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300248 goto out;
Jemma Denson5afc9a22015-04-14 09:04:50 -0300249 }
250
251 dev_dbg(&state->i2c->dev,
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300252 "%s: reg=0x%02x; data=%*ph\n",
253 __func__, reg, msg.len, msg.buf+1);
Jemma Denson5afc9a22015-04-14 09:04:50 -0300254 }
255
Patrick Boettcherf7a77eb2015-04-28 02:47:42 -0300256 ret = 0;
257
258out:
259 kfree(msg.buf);
260 return ret;
Jemma Denson5afc9a22015-04-14 09:04:50 -0300261}
262
263
264static struct dvb_frontend_ops cx24120_ops;
265
266struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
267 struct i2c_adapter *i2c)
268{
269 struct cx24120_state *state = NULL;
270 int demod_rev;
271
272 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300273 state = kzalloc(sizeof(struct cx24120_state), GFP_KERNEL);
Jemma Denson5afc9a22015-04-14 09:04:50 -0300274 if (state == NULL) {
275 err("Unable to allocate memory for cx24120_state\n");
276 goto error;
277 }
278
279 /* setup the state */
280 state->config = config;
281 state->i2c = i2c;
282
283 /* check if the demod is present and has proper type */
284 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
285 switch (demod_rev) {
286 case 0x07:
287 info("Demod cx24120 rev. 0x07 detected.\n");
288 break;
289 case 0x05:
290 info("Demod cx24120 rev. 0x05 detected.\n");
291 break;
292 default:
293 err("Unsupported demod revision: 0x%x detected.\n",
294 demod_rev);
295 goto error;
296 }
297
298 /* create dvb_frontend */
299 state->cold_init = 0;
300 memcpy(&state->frontend.ops, &cx24120_ops,
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300301 sizeof(struct dvb_frontend_ops));
Jemma Denson5afc9a22015-04-14 09:04:50 -0300302 state->frontend.demodulator_priv = state;
303
304 info("Conexant cx24120/cx24118 attached.\n");
305 return &state->frontend;
306
307error:
308 kfree(state);
309 return NULL;
310}
311EXPORT_SYMBOL(cx24120_attach);
312
313static int cx24120_test_rom(struct cx24120_state *state)
314{
315 int err, ret;
316
317 err = cx24120_readreg(state, 0xfd);
318 if (err & 4) {
319 ret = cx24120_readreg(state, 0xdf) & 0xfe;
320 err = cx24120_writereg(state, 0xdf, ret);
321 }
322 return err;
323}
324
325
326static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
327{
328 struct cx24120_state *state = fe->demodulator_priv;
329
330 *snr = (cx24120_readreg(state, CX24120_REG_QUALITY_H)<<8) |
331 (cx24120_readreg(state, CX24120_REG_QUALITY_L));
332 dev_dbg(&state->i2c->dev, "%s: read SNR index = %d\n",
333 __func__, *snr);
334
335 return 0;
336}
337
338
339static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
340{
341 struct cx24120_state *state = fe->demodulator_priv;
342
343 *ber = (cx24120_readreg(state, CX24120_REG_BER_HH) << 24) |
344 (cx24120_readreg(state, CX24120_REG_BER_HL) << 16) |
345 (cx24120_readreg(state, CX24120_REG_BER_LH) << 8) |
346 cx24120_readreg(state, CX24120_REG_BER_LL);
347 dev_dbg(&state->i2c->dev, "%s: read BER index = %d\n",
348 __func__, *ber);
349
350 return 0;
351}
352
353static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
354 u8 flag);
355
356/* Check if we're running a command that needs to disable mpeg out */
357static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
358{
359 switch (id) {
360 case CMD_TUNEREQUEST:
361 case CMD_CLOCK_READ:
362 case CMD_DISEQC_MSG1:
363 case CMD_DISEQC_MSG2:
364 case CMD_SETVOLTAGE:
365 case CMD_SETTONE:
366 cx24120_msg_mpeg_output_global_config(state, 0);
367 /* Old driver would do a msleep(100) here */
368 default:
369 return;
370 }
371}
372
373
374/* Send a message to the firmware */
375static int cx24120_message_send(struct cx24120_state *state,
376 struct cx24120_cmd *cmd)
377{
378 int ret, ficus;
379
380 if (state->mpeg_enabled) {
381 /* Disable mpeg out on certain commands */
382 cx24120_check_cmd(state, cmd->id);
383 }
384
385 ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
386 ret = cx24120_writeregN(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
387 cmd->len, 1);
388 ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
389
390 ficus = 1000;
391 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
392 msleep(20);
393 ficus -= 20;
394 if (ficus == 0) {
395 err("Error sending message to firmware\n");
396 return -EREMOTEIO;
397 }
398 }
399 dev_dbg(&state->i2c->dev, "%s: Successfully send message 0x%02x\n",
400 __func__, cmd->id);
401
402 return 0;
403}
404
405/* Send a message and fill arg[] with the results */
406static int cx24120_message_sendrcv(struct cx24120_state *state,
407 struct cx24120_cmd *cmd, u8 numreg)
408{
409 int ret, i;
410
411 if (numreg > CX24120_MAX_CMD_LEN) {
412 err("Too many registers to read. cmd->reg = %d", numreg);
413 return -EREMOTEIO;
414 }
415
416 ret = cx24120_message_send(state, cmd);
417 if (ret != 0)
418 return ret;
419
420 if (!numreg)
421 return 0;
422
423 /* Read numreg registers starting from register cmd->len */
424 for (i = 0; i < numreg; i++)
425 cmd->arg[i] = cx24120_readreg(state, (cmd->len+i+1));
426
427 return 0;
428}
429
430
431
432static int cx24120_read_signal_strength(struct dvb_frontend *fe,
433 u16 *signal_strength)
434{
435 struct cx24120_state *state = fe->demodulator_priv;
436 struct cx24120_cmd cmd;
437 int ret, sigstr_h, sigstr_l;
438
439 cmd.id = CMD_READ_SNR;
440 cmd.len = 1;
441 cmd.arg[0] = 0x00;
442
443 ret = cx24120_message_send(state, &cmd);
444 if (ret != 0) {
445 err("error reading signal strength\n");
446 return -EREMOTEIO;
447 }
448
449 /* raw */
450 sigstr_h = (cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6) << 8;
451 sigstr_l = cx24120_readreg(state, CX24120_REG_SIGSTR_L);
452 dev_dbg(&state->i2c->dev, "%s: Signal strength from firmware= 0x%x\n",
453 __func__, (sigstr_h | sigstr_l));
454
455 /* cooked */
456 *signal_strength = ((sigstr_h | sigstr_l) << 5) & 0x0000ffff;
457 dev_dbg(&state->i2c->dev, "%s: Signal strength= 0x%x\n",
458 __func__, *signal_strength);
459
460 return 0;
461}
462
463
464static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
465 u8 enable)
466{
467 struct cx24120_cmd cmd;
468 int ret;
469
470 cmd.id = CMD_MPEG_ONOFF;
471 cmd.len = 4;
472 cmd.arg[0] = 0x01;
473 cmd.arg[1] = 0x00;
474 cmd.arg[2] = enable ? 0 : (u8)(-1);
475 cmd.arg[3] = 0x01;
476
477 ret = cx24120_message_send(state, &cmd);
478 if (ret != 0) {
479 dev_dbg(&state->i2c->dev,
480 "%s: Failed to set MPEG output to %s\n",
481 __func__,
482 (enable)?"enabled":"disabled");
483 return ret;
484 }
485
486 state->mpeg_enabled = enable;
487 dev_dbg(&state->i2c->dev, "%s: MPEG output %s\n",
488 __func__,
489 (enable)?"enabled":"disabled");
490
491 return 0;
492}
493
494
495static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
496{
497 struct cx24120_cmd cmd;
498 struct cx24120_initial_mpeg_config i =
499 state->config->initial_mpeg_config;
500
501 cmd.id = CMD_MPEG_INIT;
502 cmd.len = 7;
503 cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
504 cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
505 cmd.arg[2] = 0x05;
506 cmd.arg[3] = 0x02;
507 cmd.arg[4] = ((i.x2 >> 1) & 0x01);
508 cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
509 cmd.arg[6] = 0x10;
510
511 return cx24120_message_send(state, &cmd);
512}
513
514
515static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
516 fe_sec_mini_cmd_t burst)
517{
518 struct cx24120_state *state = fe->demodulator_priv;
519 struct cx24120_cmd cmd;
520
521 /* Yes, cmd.len is set to zero. The old driver
522 * didn't specify any len, but also had a
523 * memset 0 before every use of the cmd struct
524 * which would have set it to zero.
525 * This quite probably needs looking into.
526 */
527 cmd.id = CMD_DISEQC_BURST;
528 cmd.len = 0;
529 cmd.arg[0] = 0x00;
530 if (burst)
531 cmd.arg[1] = 0x01;
532 dev_dbg(&state->i2c->dev, "%s: burst sent.\n", __func__);
533
534 return cx24120_message_send(state, &cmd);
535}
536
537
538static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
539{
540 struct cx24120_state *state = fe->demodulator_priv;
541 struct cx24120_cmd cmd;
542
543 dev_dbg(&state->i2c->dev, "%s(%d)\n",
544 __func__, tone);
545
546 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
547 err("Invalid tone=%d\n", tone);
548 return -EINVAL;
549 }
550
551 cmd.id = CMD_SETTONE;
552 cmd.len = 4;
553 cmd.arg[0] = 0x00;
554 cmd.arg[1] = 0x00;
555 cmd.arg[2] = 0x00;
556 cmd.arg[3] = (tone == SEC_TONE_ON)?0x01:0x00;
557
558 return cx24120_message_send(state, &cmd);
559}
560
561
562static int cx24120_set_voltage(struct dvb_frontend *fe,
563 fe_sec_voltage_t voltage)
564{
565 struct cx24120_state *state = fe->demodulator_priv;
566 struct cx24120_cmd cmd;
567
568 dev_dbg(&state->i2c->dev, "%s(%d)\n",
569 __func__, voltage);
570
571 cmd.id = CMD_SETVOLTAGE;
572 cmd.len = 2;
573 cmd.arg[0] = 0x00;
574 cmd.arg[1] = (voltage == SEC_VOLTAGE_18)?0x01:0x00;
575
576 return cx24120_message_send(state, &cmd);
577}
578
579
580static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
581 struct dvb_diseqc_master_cmd *d)
582{
583 struct cx24120_state *state = fe->demodulator_priv;
584 struct cx24120_cmd cmd;
585 int back_count;
586
587 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
588
589 cmd.id = CMD_DISEQC_MSG1;
590 cmd.len = 11;
591 cmd.arg[0] = 0x00;
592 cmd.arg[1] = 0x00;
593 cmd.arg[2] = 0x03;
594 cmd.arg[3] = 0x16;
595 cmd.arg[4] = 0x28;
596 cmd.arg[5] = 0x01;
597 cmd.arg[6] = 0x01;
598 cmd.arg[7] = 0x14;
599 cmd.arg[8] = 0x19;
600 cmd.arg[9] = 0x14;
601 cmd.arg[10] = 0x1e;
602
603 if (cx24120_message_send(state, &cmd)) {
604 err("send 1st message(0x%x) failed\n", cmd.id);
605 return -EREMOTEIO;
606 }
607
608 cmd.id = CMD_DISEQC_MSG2;
609 cmd.len = d->msg_len + 6;
610 cmd.arg[0] = 0x00;
611 cmd.arg[1] = 0x01;
612 cmd.arg[2] = 0x02;
613 cmd.arg[3] = 0x00;
614 cmd.arg[4] = 0x00;
615 cmd.arg[5] = d->msg_len;
616
617 memcpy(&cmd.arg[6], &d->msg, d->msg_len);
618
619 if (cx24120_message_send(state, &cmd)) {
620 err("send 2nd message(0x%x) failed\n", cmd.id);
621 return -EREMOTEIO;
622 }
623
624 back_count = 500;
625 do {
626 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
627 dev_dbg(&state->i2c->dev,
628 "%s: diseqc sequence sent success\n",
629 __func__);
630 return 0;
631 }
632 msleep(20);
633 back_count -= 20;
634 } while (back_count);
635
636 err("Too long waiting for diseqc.\n");
637 return -ETIMEDOUT;
638}
639
640
641/* Read current tuning status */
642static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
643{
644 struct cx24120_state *state = fe->demodulator_priv;
645 int lock;
646
647 lock = cx24120_readreg(state, CX24120_REG_STATUS);
648
649 dev_dbg(&state->i2c->dev, "%s() status = 0x%02x\n",
650 __func__, lock);
651
652 *status = 0;
653
654 if (lock & CX24120_HAS_SIGNAL)
655 *status = FE_HAS_SIGNAL;
656 if (lock & CX24120_HAS_CARRIER)
657 *status |= FE_HAS_CARRIER;
658 if (lock & CX24120_HAS_VITERBI)
659 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
660 if (lock & CX24120_HAS_LOCK)
661 *status |= FE_HAS_LOCK;
662
663 /* TODO: is FE_HAS_SYNC in the right place?
664 * Other cx241xx drivers have this slightly
665 * different */
666
667 return 0;
668}
669
670
671/* FEC & modulation lookup table
672 * Used for decoding the REG_FECMODE register
673 * once tuned in.
674 */
675static struct cx24120_modfec {
676 fe_delivery_system_t delsys;
677 fe_modulation_t mod;
678 fe_code_rate_t fec;
679 u8 val;
680} modfec_lookup_table[] = {
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300681 /*delsys mod fec val */
682 { SYS_DVBS, QPSK, FEC_1_2, 0x01 },
683 { SYS_DVBS, QPSK, FEC_2_3, 0x02 },
684 { SYS_DVBS, QPSK, FEC_3_4, 0x03 },
685 { SYS_DVBS, QPSK, FEC_4_5, 0x04 },
686 { SYS_DVBS, QPSK, FEC_5_6, 0x05 },
687 { SYS_DVBS, QPSK, FEC_6_7, 0x06 },
688 { SYS_DVBS, QPSK, FEC_7_8, 0x07 },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300689
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300690 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
691 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
692 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
693 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
694 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
695 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
696 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
697 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300698
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300699 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
700 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
701 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
702 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
703 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
704 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300705};
706
707
708/* Retrieve current fec, modulation & pilot values */
709static int cx24120_get_fec(struct dvb_frontend *fe)
710{
711 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
712 struct cx24120_state *state = fe->demodulator_priv;
713 int idx;
714 int ret;
715 int GettedFEC;
716
717 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
718
719 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300720 GettedFEC = ret & 0x3f; /* Lower 6 bits */
Jemma Denson5afc9a22015-04-14 09:04:50 -0300721
722 dev_dbg(&state->i2c->dev, "%s: Get FEC: %d\n", __func__, GettedFEC);
723
724 for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
725 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
726 continue;
727 if (modfec_lookup_table[idx].val != GettedFEC)
728 continue;
729
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300730 break; /* found */
Jemma Denson5afc9a22015-04-14 09:04:50 -0300731 }
732
733 if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
734 dev_dbg(&state->i2c->dev, "%s: Couldn't find fec!\n",
735 __func__);
736 return -EINVAL;
737 }
738
739 /* save values back to cache */
740 c->modulation = modfec_lookup_table[idx].mod;
741 c->fec_inner = modfec_lookup_table[idx].fec;
742 c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
743
744 dev_dbg(&state->i2c->dev,
745 "%s: mod(%d), fec(%d), pilot(%d)\n",
746 __func__,
747 c->modulation, c->fec_inner, c->pilot);
748
749 return 0;
750}
751
752
753/* Clock ratios lookup table
754 *
755 * Values obtained from much larger table in old driver
756 * which had numerous entries which would never match.
757 *
758 * There's probably some way of calculating these but I
759 * can't determine the pattern
760*/
761static struct cx24120_clock_ratios_table {
762 fe_delivery_system_t delsys;
763 fe_pilot_t pilot;
764 fe_modulation_t mod;
765 fe_code_rate_t fec;
766 u32 m_rat;
767 u32 n_rat;
768 u32 rate;
769} clock_ratios_table[] = {
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300770 /*delsys pilot mod fec m_rat n_rat rate */
771 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
772 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
773 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_2_3, 24344, 16967, 367 },
774 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_4, 410788, 254505, 413 },
775 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_4_5, 438328, 254505, 440 },
776 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_5_6, 30464, 16967, 459 },
777 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_8_9, 487832, 254505, 490 },
778 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_9_10, 493952, 254505, 496 },
779 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5, 328168, 169905, 494 },
780 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3, 24344, 11327, 550 },
781 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4, 410788, 169905, 618 },
782 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6, 30464, 11327, 688 },
783 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9, 487832, 169905, 735 },
784 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952, 169905, 744 },
785 { SYS_DVBS2, PILOT_ON, QPSK, FEC_1_2, 273088, 260709, 268 },
786 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_5, 328168, 260709, 322 },
787 { SYS_DVBS2, PILOT_ON, QPSK, FEC_2_3, 121720, 86903, 358 },
788 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_4, 410788, 260709, 403 },
789 { SYS_DVBS2, PILOT_ON, QPSK, FEC_4_5, 438328, 260709, 430 },
790 { SYS_DVBS2, PILOT_ON, QPSK, FEC_5_6, 152320, 86903, 448 },
791 { SYS_DVBS2, PILOT_ON, QPSK, FEC_8_9, 487832, 260709, 479 },
792 { SYS_DVBS2, PILOT_ON, QPSK, FEC_9_10, 493952, 260709, 485 },
793 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_5, 328168, 173853, 483 },
794 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_2_3, 121720, 57951, 537 },
795 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_4, 410788, 173853, 604 },
796 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_5_6, 152320, 57951, 672 },
797 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_8_9, 487832, 173853, 718 },
798 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_9_10, 493952, 173853, 727 },
799 { SYS_DVBS, PILOT_OFF, QPSK, FEC_1_2, 152592, 152592, 256 },
800 { SYS_DVBS, PILOT_OFF, QPSK, FEC_2_3, 305184, 228888, 341 },
801 { SYS_DVBS, PILOT_OFF, QPSK, FEC_3_4, 457776, 305184, 384 },
802 { SYS_DVBS, PILOT_OFF, QPSK, FEC_5_6, 762960, 457776, 427 },
803 { SYS_DVBS, PILOT_OFF, QPSK, FEC_7_8, 1068144, 610368, 448 },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300804};
805
806
807/* Set clock ratio from lookup table */
808static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
809{
810 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
811 struct cx24120_state *state = fe->demodulator_priv;
812 struct cx24120_cmd cmd;
813 int ret, idx;
814
815 /* Find fec, modulation, pilot */
816 ret = cx24120_get_fec(fe);
817 if (ret != 0)
818 return;
819
820 /* Find the clock ratios in the lookup table */
821 for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
822 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
823 continue;
824 if (clock_ratios_table[idx].mod != c->modulation)
825 continue;
826 if (clock_ratios_table[idx].fec != c->fec_inner)
827 continue;
828 if (clock_ratios_table[idx].pilot != c->pilot)
829 continue;
830
831 break; /* found */
832 }
833
834 if (idx >= ARRAY_SIZE(clock_ratios_table)) {
835 info("Clock ratio not found - data reception in danger\n");
836 return;
837 }
838
Jemma Denson5afc9a22015-04-14 09:04:50 -0300839 /* Read current values? */
840 cmd.id = CMD_CLOCK_READ;
841 cmd.len = 1;
842 cmd.arg[0] = 0x00;
843 ret = cx24120_message_sendrcv(state, &cmd, 6);
844 if (ret != 0)
845 return;
846 /* in cmd[0]-[5] - result */
847
848 dev_dbg(&state->i2c->dev,
849 "%s: m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
850 __func__,
851 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
852 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
853 idx,
854 clock_ratios_table[idx].m_rat,
855 clock_ratios_table[idx].n_rat,
856 clock_ratios_table[idx].rate);
857
Jemma Denson5afc9a22015-04-14 09:04:50 -0300858 /* Set the clock */
859 cmd.id = CMD_CLOCK_SET;
860 cmd.len = 10;
861 cmd.arg[0] = 0;
862 cmd.arg[1] = 0x10;
863 cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
864 cmd.arg[3] = (clock_ratios_table[idx].m_rat >> 8) & 0xff;
865 cmd.arg[4] = (clock_ratios_table[idx].m_rat >> 0) & 0xff;
866 cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
867 cmd.arg[6] = (clock_ratios_table[idx].n_rat >> 8) & 0xff;
868 cmd.arg[7] = (clock_ratios_table[idx].n_rat >> 0) & 0xff;
869 cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
870 cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
871
872 cx24120_message_send(state, &cmd);
Jemma Denson5afc9a22015-04-14 09:04:50 -0300873}
874
875
876/* Set inversion value */
877static int cx24120_set_inversion(struct cx24120_state *state,
878 fe_spectral_inversion_t inversion)
879{
880 dev_dbg(&state->i2c->dev, "%s(%d)\n",
881 __func__, inversion);
882
883 switch (inversion) {
884 case INVERSION_OFF:
885 state->dnxt.inversion_val = 0x00;
886 break;
887 case INVERSION_ON:
888 state->dnxt.inversion_val = 0x04;
889 break;
890 case INVERSION_AUTO:
891 state->dnxt.inversion_val = 0x0c;
892 break;
893 default:
894 return -EINVAL;
895 }
896
897 state->dnxt.inversion = inversion;
898
899 return 0;
900}
901
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300902/*
903 * FEC lookup table for tuning Some DVB-S2 val's have been found by
904 * trial and error. Sofar it seems to match up with the contents of
905 * the REG_FECMODE after tuning The rest will probably be the same but
906 * would need testing. Anything not in the table will run with
907 * FEC_AUTO and take a while longer to tune in ( c.500ms instead of
908 * 30ms )
Jemma Denson5afc9a22015-04-14 09:04:50 -0300909 */
910static struct cx24120_modfec_table {
911 fe_delivery_system_t delsys;
912 fe_modulation_t mod;
913 fe_code_rate_t fec;
914 u8 val;
915} modfec_table[] = {
916/*delsys mod fec val */
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300917 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
918 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
919 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
920 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
921 { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
922 { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300923
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300924 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300925
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300926 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
927 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
Jemma Denson5afc9a22015-04-14 09:04:50 -0300928};
929
930/* Set fec_val & fec_mask values from delsys, modulation & fec */
931static int cx24120_set_fec(struct cx24120_state *state,
932 fe_modulation_t mod, fe_code_rate_t fec)
933{
934 int idx;
935
936 dev_dbg(&state->i2c->dev,
937 "%s(0x%02x,0x%02x)\n", __func__, mod, fec);
938
939 state->dnxt.fec = fec;
940
941 /* Lookup fec_val from modfec table */
942 for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
943 if (modfec_table[idx].delsys != state->dnxt.delsys)
944 continue;
945 if (modfec_table[idx].mod != mod)
946 continue;
947 if (modfec_table[idx].fec != fec)
948 continue;
949
950 /* found */
951 state->dnxt.fec_mask = 0x00;
952 state->dnxt.fec_val = modfec_table[idx].val;
953 return 0;
954 }
955
Jemma Denson5afc9a22015-04-14 09:04:50 -0300956 if (state->dnxt.delsys == SYS_DVBS2) {
957 /* DVBS2 auto is 0x00/0x00 */
958 state->dnxt.fec_mask = 0x00;
959 state->dnxt.fec_val = 0x00;
960 } else {
961 /* Set DVB-S to auto */
962 state->dnxt.fec_val = 0x2e;
963 state->dnxt.fec_mask = 0xac;
964 }
965
966 return 0;
967}
968
969
970/* Set pilot */
971static int cx24120_set_pilot(struct cx24120_state *state,
972 fe_pilot_t pilot) {
973
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -0300974 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, pilot);
Jemma Denson5afc9a22015-04-14 09:04:50 -0300975
976 /* Pilot only valid in DVBS2 */
977 if (state->dnxt.delsys != SYS_DVBS2) {
978 state->dnxt.pilot_val = CX24120_PILOT_OFF;
979 return 0;
980 }
981
Jemma Denson5afc9a22015-04-14 09:04:50 -0300982 switch (pilot) {
983 case PILOT_OFF:
984 state->dnxt.pilot_val = CX24120_PILOT_OFF;
985 break;
986 case PILOT_ON:
987 state->dnxt.pilot_val = CX24120_PILOT_ON;
988 break;
989 case PILOT_AUTO:
990 default:
991 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
992 }
993
994 return 0;
995}
996
997/* Set symbol rate */
998static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
999{
1000 dev_dbg(&state->i2c->dev, "%s(%d)\n",
1001 __func__, rate);
1002
1003 state->dnxt.symbol_rate = rate;
1004
1005 /* Check symbol rate */
1006 if (rate > 31000000) {
1007 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2;
1008 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1009 } else {
1010 state->dnxt.clkdiv = 3;
1011 state->dnxt.ratediv = 6;
1012 }
1013
1014 return 0;
1015}
1016
1017
1018/* Overwrite the current tuning params, we are about to tune */
1019static void cx24120_clone_params(struct dvb_frontend *fe)
1020{
1021 struct cx24120_state *state = fe->demodulator_priv;
1022
1023 state->dcur = state->dnxt;
1024}
1025
1026
1027/* Table of time to tune for different symrates */
1028static struct cx24120_symrate_delay {
1029 fe_delivery_system_t delsys;
1030 u32 symrate; /* Check for >= this symrate */
1031 u32 delay; /* Timeout in ms */
1032} symrates_delay_table[] = {
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -03001033 { SYS_DVBS, 10000000, 400 },
1034 { SYS_DVBS, 8000000, 2000 },
1035 { SYS_DVBS, 6000000, 5000 },
1036 { SYS_DVBS, 3000000, 10000 },
1037 { SYS_DVBS, 0, 15000 },
1038 { SYS_DVBS2, 10000000, 600 }, /* DVBS2 needs a little longer */
1039 { SYS_DVBS2, 8000000, 2000 }, /* (so these might need bumping too) */
1040 { SYS_DVBS2, 6000000, 5000 },
1041 { SYS_DVBS2, 3000000, 10000 },
1042 { SYS_DVBS2, 0, 15000 },
Jemma Denson5afc9a22015-04-14 09:04:50 -03001043};
1044
1045
1046static int cx24120_set_frontend(struct dvb_frontend *fe)
1047{
1048 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1049 struct cx24120_state *state = fe->demodulator_priv;
1050 struct cx24120_cmd cmd;
1051 int ret;
1052 int delay_cnt, sd_idx = 0;
1053 fe_status_t status;
1054
1055 switch (c->delivery_system) {
1056 case SYS_DVBS2:
1057 dev_dbg(&state->i2c->dev, "%s() DVB-S2\n",
1058 __func__);
1059 break;
1060 case SYS_DVBS:
1061 dev_dbg(&state->i2c->dev, "%s() DVB-S\n",
1062 __func__);
1063 break;
1064 default:
1065 dev_dbg(&state->i2c->dev,
1066 "%s() Delivery system(%d) not supported\n",
1067 __func__, c->delivery_system);
1068 ret = -EINVAL;
1069 break;
1070 }
1071
Jemma Denson5afc9a22015-04-14 09:04:50 -03001072 state->dnxt.delsys = c->delivery_system;
1073 state->dnxt.modulation = c->modulation;
1074 state->dnxt.frequency = c->frequency;
1075 state->dnxt.pilot = c->pilot;
1076
1077 ret = cx24120_set_inversion(state, c->inversion);
1078 if (ret != 0)
1079 return ret;
1080
1081 ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1082 if (ret != 0)
1083 return ret;
1084
1085 ret = cx24120_set_pilot(state, c->pilot);
1086 if (ret != 0)
1087 return ret;
1088
1089 ret = cx24120_set_symbolrate(state, c->symbol_rate);
1090 if (ret != 0)
1091 return ret;
1092
Jemma Denson5afc9a22015-04-14 09:04:50 -03001093 /* discard the 'current' tuning parameters and prepare to tune */
1094 cx24120_clone_params(fe);
1095
1096 dev_dbg(&state->i2c->dev,
1097 "%s: delsys = %d\n", __func__, state->dcur.delsys);
1098 dev_dbg(&state->i2c->dev,
1099 "%s: modulation = %d\n", __func__, state->dcur.modulation);
1100 dev_dbg(&state->i2c->dev,
1101 "%s: frequency = %d\n", __func__, state->dcur.frequency);
1102 dev_dbg(&state->i2c->dev,
1103 "%s: pilot = %d (val = 0x%02x)\n", __func__,
1104 state->dcur.pilot, state->dcur.pilot_val);
1105 dev_dbg(&state->i2c->dev,
1106 "%s: symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1107 __func__, state->dcur.symbol_rate,
1108 state->dcur.clkdiv, state->dcur.ratediv);
1109 dev_dbg(&state->i2c->dev,
1110 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1111 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1112 dev_dbg(&state->i2c->dev,
1113 "%s: Inversion = %d (val = 0x%02x)\n", __func__,
1114 state->dcur.inversion, state->dcur.inversion_val);
1115
Jemma Denson5afc9a22015-04-14 09:04:50 -03001116 /* Tune in */
1117 cmd.id = CMD_TUNEREQUEST;
1118 cmd.len = 15;
1119 cmd.arg[0] = 0;
1120 cmd.arg[1] = (state->dcur.frequency & 0xff0000) >> 16;
1121 cmd.arg[2] = (state->dcur.frequency & 0x00ff00) >> 8;
1122 cmd.arg[3] = (state->dcur.frequency & 0x0000ff);
1123 cmd.arg[4] = ((state->dcur.symbol_rate/1000) & 0xff00) >> 8;
1124 cmd.arg[5] = ((state->dcur.symbol_rate/1000) & 0x00ff);
1125 cmd.arg[6] = state->dcur.inversion;
1126 cmd.arg[7] = state->dcur.fec_val | state->dcur.pilot_val;
1127 cmd.arg[8] = CX24120_SEARCH_RANGE_KHZ >> 8;
1128 cmd.arg[9] = CX24120_SEARCH_RANGE_KHZ & 0xff;
1129 cmd.arg[10] = 0; /* maybe rolloff? */
1130 cmd.arg[11] = state->dcur.fec_mask;
1131 cmd.arg[12] = state->dcur.ratediv;
1132 cmd.arg[13] = state->dcur.clkdiv;
1133 cmd.arg[14] = 0;
1134
Jemma Denson5afc9a22015-04-14 09:04:50 -03001135 /* Send tune command */
1136 ret = cx24120_message_send(state, &cmd);
1137 if (ret != 0)
1138 return ret;
1139
1140 /* Write symbol rate values */
1141 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1142 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1143 ret &= 0xfffffff0;
1144 ret |= state->dcur.ratediv;
1145 ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1146
1147 /* Default time to tune */
1148 delay_cnt = 500;
1149
1150 /* Establish time to tune from symrates_delay_table */
1151 for (sd_idx = 0; sd_idx < ARRAY_SIZE(symrates_delay_table); sd_idx++) {
1152 if (state->dcur.delsys != symrates_delay_table[sd_idx].delsys)
1153 continue;
1154 if (c->symbol_rate < symrates_delay_table[sd_idx].symrate)
1155 continue;
1156
1157 /* found */
1158 delay_cnt = symrates_delay_table[sd_idx].delay;
1159 dev_dbg(&state->i2c->dev, "%s: Found symrate delay = %d\n",
1160 __func__, delay_cnt);
1161 break;
1162 }
1163
1164 /* Wait for tuning */
1165 while (delay_cnt >= 0) {
1166 cx24120_read_status(fe, &status);
1167 if (status & FE_HAS_LOCK)
1168 goto tuned;
1169 msleep(20);
1170 delay_cnt -= 20;
1171 }
1172
Jemma Denson5afc9a22015-04-14 09:04:50 -03001173 /* Fail to tune */
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -03001174 dev_dbg(&state->i2c->dev, "%s: Tuning failed\n", __func__);
Jemma Denson5afc9a22015-04-14 09:04:50 -03001175
1176 return -EINVAL;
1177
Jemma Denson5afc9a22015-04-14 09:04:50 -03001178tuned:
Patrick Boettcher2e89a5e2015-04-28 13:18:05 -03001179 dev_dbg(&state->i2c->dev, "%s: Tuning successful\n", __func__);
Jemma Denson5afc9a22015-04-14 09:04:50 -03001180
1181 /* Set clock ratios */
1182 cx24120_set_clock_ratios(fe);
1183
1184 /* Old driver would do a msleep(200) here */
1185
1186 /* Renable mpeg output */
1187 if (!state->mpeg_enabled)
1188 cx24120_msg_mpeg_output_global_config(state, 1);
1189
1190 return 0;
1191}
1192
1193
1194/* Calculate vco from config */
1195static u64 cx24120_calculate_vco(struct cx24120_state *state)
1196{
1197 u32 vco;
1198 u64 inv_vco, res, xxyyzz;
1199 u32 xtal_khz = state->config->xtal_khz;
1200
1201 xxyyzz = 0x400000000ULL;
1202 vco = xtal_khz * 10 * 4;
1203 inv_vco = xxyyzz / vco;
1204 res = xxyyzz % vco;
1205
1206 if (inv_vco > xtal_khz * 10 * 2)
1207 ++inv_vco;
1208
1209 dev_dbg(&state->i2c->dev,
1210 "%s: xtal=%d, vco=%d, inv_vco=%lld, res=%lld\n",
1211 __func__, xtal_khz, vco, inv_vco, res);
1212
1213 return inv_vco;
1214}
1215
1216
1217int cx24120_init(struct dvb_frontend *fe)
1218{
1219 const struct firmware *fw;
1220 struct cx24120_state *state = fe->demodulator_priv;
1221 struct cx24120_cmd cmd;
1222 u8 ret, ret_EA, reg1;
1223 u64 inv_vco;
1224 int reset_result;
1225
1226 int i;
1227 unsigned char vers[4];
1228
1229 if (state->cold_init)
1230 return 0;
1231
1232 /* ???? */
1233 ret = cx24120_writereg(state, 0xea, 0x00);
1234 ret = cx24120_test_rom(state);
1235 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1236 ret = cx24120_writereg(state, 0xfb, ret);
1237 ret = cx24120_readreg(state, 0xfc) & 0xfe;
1238 ret = cx24120_writereg(state, 0xfc, ret);
1239 ret = cx24120_writereg(state, 0xc3, 0x04);
1240 ret = cx24120_writereg(state, 0xc4, 0x04);
1241 ret = cx24120_writereg(state, 0xce, 0x00);
1242 ret = cx24120_writereg(state, 0xcf, 0x00);
1243 ret_EA = cx24120_readreg(state, 0xea) & 0xfe;
1244 ret = cx24120_writereg(state, 0xea, ret_EA);
1245 ret = cx24120_writereg(state, 0xeb, 0x0c);
1246 ret = cx24120_writereg(state, 0xec, 0x06);
1247 ret = cx24120_writereg(state, 0xed, 0x05);
1248 ret = cx24120_writereg(state, 0xee, 0x03);
1249 ret = cx24120_writereg(state, 0xef, 0x05);
1250 ret = cx24120_writereg(state, 0xf3, 0x03);
1251 ret = cx24120_writereg(state, 0xf4, 0x44);
1252
1253 for (reg1 = 0xf0; reg1 < 0xf3; reg1++) {
1254 cx24120_writereg(state, reg1, 0x04);
1255 cx24120_writereg(state, reg1 - 10, 0x02);
1256 }
1257
1258 ret = cx24120_writereg(state, 0xea, (ret_EA | 0x01));
1259 for (reg1 = 0xc5; reg1 < 0xcb; reg1 += 2) {
1260 ret = cx24120_writereg(state, reg1, 0x00);
1261 ret = cx24120_writereg(state, reg1 + 1, 0x00);
1262 }
1263
1264 ret = cx24120_writereg(state, 0xe4, 0x03);
1265 ret = cx24120_writereg(state, 0xeb, 0x0a);
1266
1267 dev_dbg(&state->i2c->dev,
1268 "%s: Requesting firmware (%s) to download...\n",
1269 __func__, CX24120_FIRMWARE);
1270
1271 ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1272 if (ret) {
1273 err("Could not load firmware (%s): %d\n",
1274 CX24120_FIRMWARE, ret);
1275 return ret;
1276 }
1277
1278 dev_dbg(&state->i2c->dev,
1279 "%s: Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1280 __func__,
1281 (int)fw->size, /* firmware_size in bytes */
1282 fw->data[0], /* fw 1st byte */
1283 fw->data[1], /* fw 2d byte */
1284 fw->data[fw->size - 2], /* fw before last byte */
1285 fw->data[fw->size - 1]); /* fw last byte */
1286
1287 ret = cx24120_test_rom(state);
1288 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1289 ret = cx24120_writereg(state, 0xfb, ret);
1290 ret = cx24120_writereg(state, 0xe0, 0x76);
1291 ret = cx24120_writereg(state, 0xf7, 0x81);
1292 ret = cx24120_writereg(state, 0xf8, 0x00);
1293 ret = cx24120_writereg(state, 0xf9, 0x00);
1294 ret = cx24120_writeregN(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1295 ret = cx24120_writereg(state, 0xf7, 0xc0);
1296 ret = cx24120_writereg(state, 0xe0, 0x00);
1297 ret = (fw->size - 2) & 0x00ff;
1298 ret = cx24120_writereg(state, 0xf8, ret);
1299 ret = ((fw->size - 2) >> 8) & 0x00ff;
1300 ret = cx24120_writereg(state, 0xf9, ret);
1301 ret = cx24120_writereg(state, 0xf7, 0x00);
1302 ret = cx24120_writereg(state, 0xdc, 0x00);
1303 ret = cx24120_writereg(state, 0xdc, 0x07);
1304 msleep(500);
1305
1306 /* Check final byte matches final byte of firmware */
1307 ret = cx24120_readreg(state, 0xe1);
1308 if (ret == fw->data[fw->size - 1]) {
1309 dev_dbg(&state->i2c->dev,
1310 "%s: Firmware uploaded successfully\n",
1311 __func__);
1312 reset_result = 0;
1313 } else {
1314 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1315 reset_result = -EREMOTEIO;
1316 }
1317 ret = cx24120_writereg(state, 0xdc, 0x00);
1318 release_firmware(fw);
1319 if (reset_result != 0)
1320 return reset_result;
1321
1322
1323 /* Start tuner */
1324 cmd.id = CMD_START_TUNER;
1325 cmd.len = 3;
1326 cmd.arg[0] = 0x00;
1327 cmd.arg[1] = 0x00;
1328 cmd.arg[2] = 0x00;
1329
1330 if (cx24120_message_send(state, &cmd) != 0) {
1331 err("Error tuner start! :(\n");
1332 return -EREMOTEIO;
1333 }
1334
1335 /* Set VCO */
1336 inv_vco = cx24120_calculate_vco(state);
1337
1338 cmd.id = CMD_VCO_SET;
1339 cmd.len = 12;
1340 cmd.arg[0] = 0x06;
1341 cmd.arg[1] = 0x2b;
1342 cmd.arg[2] = 0xd8;
1343 cmd.arg[3] = (inv_vco >> 8) & 0xff;
1344 cmd.arg[4] = (inv_vco) & 0xff;
1345 cmd.arg[5] = 0x03;
1346 cmd.arg[6] = 0x9d;
1347 cmd.arg[7] = 0xfc;
1348 cmd.arg[8] = 0x06;
1349 cmd.arg[9] = 0x03;
1350 cmd.arg[10] = 0x27;
1351 cmd.arg[11] = 0x7f;
1352
1353 if (cx24120_message_send(state, &cmd)) {
1354 err("Error set VCO! :(\n");
1355 return -EREMOTEIO;
1356 }
1357
1358
1359 /* set bandwidth */
1360 cmd.id = CMD_BANDWIDTH;
1361 cmd.len = 12;
1362 cmd.arg[0] = 0x00;
1363 cmd.arg[1] = 0x00;
1364 cmd.arg[2] = 0x00;
1365 cmd.arg[3] = 0x00;
1366 cmd.arg[4] = 0x05;
1367 cmd.arg[5] = 0x02;
1368 cmd.arg[6] = 0x02;
1369 cmd.arg[7] = 0x00;
1370 cmd.arg[8] = 0x05;
1371 cmd.arg[9] = 0x02;
1372 cmd.arg[10] = 0x02;
1373 cmd.arg[11] = 0x00;
1374
1375 if (cx24120_message_send(state, &cmd)) {
1376 err("Error set bandwidth!\n");
1377 return -EREMOTEIO;
1378 }
1379
1380 ret = cx24120_readreg(state, 0xba);
1381 if (ret > 3) {
1382 dev_dbg(&state->i2c->dev, "%s: Reset-readreg 0xba: %x\n",
1383 __func__, ret);
1384 err("Error initialising tuner!\n");
1385 return -EREMOTEIO;
1386 }
1387
1388 dev_dbg(&state->i2c->dev, "%s: Tuner initialised correctly.\n",
1389 __func__);
1390
1391
1392 /* Initialise mpeg outputs */
1393 ret = cx24120_writereg(state, 0xeb, 0x0a);
1394 if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1395 cx24120_msg_mpeg_output_config(state, 0) ||
1396 cx24120_msg_mpeg_output_config(state, 1) ||
1397 cx24120_msg_mpeg_output_config(state, 2)) {
1398 err("Error initialising mpeg output. :(\n");
1399 return -EREMOTEIO;
1400 }
1401
1402
1403 /* ???? */
1404 cmd.id = CMD_TUNER_INIT;
1405 cmd.len = 3;
1406 cmd.arg[0] = 0x00;
1407 cmd.arg[1] = 0x10;
1408 cmd.arg[2] = 0x10;
1409 if (cx24120_message_send(state, &cmd)) {
1410 err("Error sending final init message. :(\n");
1411 return -EREMOTEIO;
1412 }
1413
1414
1415 /* Firmware CMD 35: Get firmware version */
1416 cmd.id = CMD_FWVERSION;
1417 cmd.len = 1;
1418 for (i = 0; i < 4; i++) {
1419 cmd.arg[0] = i;
1420 ret = cx24120_message_send(state, &cmd);
1421 if (ret != 0)
1422 return ret;
1423 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1424 }
1425 info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1426
Jemma Denson5afc9a22015-04-14 09:04:50 -03001427 state->cold_init = 1;
1428 return 0;
1429}
1430
1431
1432static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1433 unsigned int mode_flags, unsigned int *delay, fe_status_t *status)
1434{
1435 struct cx24120_state *state = fe->demodulator_priv;
1436 int ret;
1437
1438 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, re_tune);
1439
1440 /* TODO: Do we need to set delay? */
1441
1442 if (re_tune) {
1443 ret = cx24120_set_frontend(fe);
1444 if (ret)
1445 return ret;
1446 }
1447
1448 return cx24120_read_status(fe, status);
1449}
1450
1451
1452
1453static int cx24120_get_algo(struct dvb_frontend *fe)
1454{
1455 return DVBFE_ALGO_HW;
1456}
1457
1458
1459static int cx24120_sleep(struct dvb_frontend *fe)
1460{
1461 return 0;
1462}
1463
1464
1465/*static int cx24120_wakeup(struct dvb_frontend *fe)
1466 * {
1467 * return 0;
1468 * }
1469*/
1470
1471
1472static int cx24120_get_frontend(struct dvb_frontend *fe)
1473{
1474 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1475 struct cx24120_state *state = fe->demodulator_priv;
1476 u8 freq1, freq2, freq3;
1477
1478 dev_dbg(&state->i2c->dev, "%s()", __func__);
1479
1480 /* don't return empty data if we're not tuned in */
1481 if (state->mpeg_enabled)
1482 return 0;
1483
1484 /* Get frequency */
1485 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1486 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1487 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1488 c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1489 dev_dbg(&state->i2c->dev, "%s frequency = %d\n", __func__,
1490 c->frequency);
1491
1492 /* Get modulation, fec, pilot */
1493 cx24120_get_fec(fe);
1494
1495 return 0;
1496}
1497
1498
1499static void cx24120_release(struct dvb_frontend *fe)
1500{
1501 struct cx24120_state *state = fe->demodulator_priv;
1502
1503 dev_dbg(&state->i2c->dev, "%s: Clear state structure\n", __func__);
1504 kfree(state);
1505}
1506
1507
1508static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1509{
1510 struct cx24120_state *state = fe->demodulator_priv;
1511
1512 *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
1513 cx24120_readreg(state, CX24120_REG_UCB_L);
1514
1515 dev_dbg(&state->i2c->dev, "%s: Blocks = %d\n",
1516 __func__, *ucblocks);
1517 return 0;
1518}
1519
1520
1521static struct dvb_frontend_ops cx24120_ops = {
1522 .delsys = { SYS_DVBS, SYS_DVBS2 },
1523 .info = {
1524 .name = "Conexant CX24120/CX24118",
1525 .frequency_min = 950000,
1526 .frequency_max = 2150000,
1527 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1528 .frequency_tolerance = 5000,
1529 .symbol_rate_min = 1000000,
1530 .symbol_rate_max = 45000000,
1531 .caps = FE_CAN_INVERSION_AUTO |
1532 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1533 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1534 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1535 FE_CAN_2G_MODULATION |
1536 FE_CAN_QPSK | FE_CAN_RECOVER
1537 },
1538 .release = cx24120_release,
1539
1540 .init = cx24120_init,
1541 .sleep = cx24120_sleep,
1542
1543 .tune = cx24120_tune,
1544 .get_frontend_algo = cx24120_get_algo,
1545 .set_frontend = cx24120_set_frontend,
1546
1547 .get_frontend = cx24120_get_frontend,
1548 .read_status = cx24120_read_status,
1549 .read_ber = cx24120_read_ber,
1550 .read_signal_strength = cx24120_read_signal_strength,
1551 .read_snr = cx24120_read_snr,
1552 .read_ucblocks = cx24120_read_ucblocks,
1553
1554 .diseqc_send_master_cmd = cx24120_send_diseqc_msg,
1555
1556 .diseqc_send_burst = cx24120_diseqc_send_burst,
1557 .set_tone = cx24120_set_tone,
1558 .set_voltage = cx24120_set_voltage,
1559};
1560
1561MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1562MODULE_AUTHOR("Jemma Denson");
1563MODULE_LICENSE("GPL");