Brian Swetland | 2eb44eb | 2008-09-29 16:00:48 -0700 | [diff] [blame^] | 1 | /* arch/arm/mach-msm/smd_private.h |
| 2 | * |
| 3 | * Copyright (C) 2007 Google, Inc. |
| 4 | * Copyright (c) 2007 QUALCOMM Incorporated |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | #ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_ |
| 17 | #define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_ |
| 18 | |
| 19 | struct smem_heap_info |
| 20 | { |
| 21 | unsigned initialized; |
| 22 | unsigned free_offset; |
| 23 | unsigned heap_remaining; |
| 24 | unsigned reserved; |
| 25 | }; |
| 26 | |
| 27 | struct smem_heap_entry |
| 28 | { |
| 29 | unsigned allocated; |
| 30 | unsigned offset; |
| 31 | unsigned size; |
| 32 | unsigned reserved; |
| 33 | }; |
| 34 | |
| 35 | struct smem_proc_comm |
| 36 | { |
| 37 | unsigned command; |
| 38 | unsigned status; |
| 39 | unsigned data1; |
| 40 | unsigned data2; |
| 41 | }; |
| 42 | |
| 43 | #define PC_APPS 0 |
| 44 | #define PC_MODEM 1 |
| 45 | |
| 46 | #define VERSION_QDSP6 4 |
| 47 | #define VERSION_APPS_SBL 6 |
| 48 | #define VERSION_MODEM_SBL 7 |
| 49 | #define VERSION_APPS 8 |
| 50 | #define VERSION_MODEM 9 |
| 51 | |
| 52 | struct smem_shared |
| 53 | { |
| 54 | struct smem_proc_comm proc_comm[4]; |
| 55 | unsigned version[32]; |
| 56 | struct smem_heap_info heap_info; |
| 57 | struct smem_heap_entry heap_toc[128]; |
| 58 | }; |
| 59 | |
| 60 | struct smsm_shared |
| 61 | { |
| 62 | unsigned host; |
| 63 | unsigned state; |
| 64 | }; |
| 65 | |
| 66 | struct smsm_interrupt_info |
| 67 | { |
| 68 | uint32_t aArm_en_mask; |
| 69 | uint32_t aArm_interrupts_pending; |
| 70 | uint32_t aArm_wakeup_reason; |
| 71 | }; |
| 72 | |
| 73 | #define SZ_DIAG_ERR_MSG 0xC8 |
| 74 | #define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE |
| 75 | #define ID_SMD_CHANNELS SMEM_SMD_BASE_ID |
| 76 | #define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE |
| 77 | #define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL |
| 78 | |
| 79 | #define SMSM_INIT 0x000001 |
| 80 | #define SMSM_SMDINIT 0x000008 |
| 81 | #define SMSM_RPCINIT 0x000020 |
| 82 | #define SMSM_RESET 0x000040 |
| 83 | #define SMSM_RSA 0x0080 |
| 84 | #define SMSM_RUN 0x000100 |
| 85 | #define SMSM_PWRC 0x0200 |
| 86 | #define SMSM_TIMEWAIT 0x0400 |
| 87 | #define SMSM_TIMEINIT 0x0800 |
| 88 | #define SMSM_PWRC_EARLY_EXIT 0x1000 |
| 89 | #define SMSM_WFPI 0x2000 |
| 90 | #define SMSM_SLEEP 0x4000 |
| 91 | #define SMSM_SLEEPEXIT 0x8000 |
| 92 | #define SMSM_OEMSBL_RELEASE 0x10000 |
| 93 | #define SMSM_PWRC_SUSPEND 0x200000 |
| 94 | |
| 95 | #define SMSM_WKUP_REASON_RPC 0x00000001 |
| 96 | #define SMSM_WKUP_REASON_INT 0x00000002 |
| 97 | #define SMSM_WKUP_REASON_GPIO 0x00000004 |
| 98 | #define SMSM_WKUP_REASON_TIMER 0x00000008 |
| 99 | #define SMSM_WKUP_REASON_ALARM 0x00000010 |
| 100 | #define SMSM_WKUP_REASON_RESET 0x00000020 |
| 101 | |
| 102 | void *smem_alloc(unsigned id, unsigned size); |
| 103 | int smsm_change_state(uint32_t clear_mask, uint32_t set_mask); |
| 104 | uint32_t smsm_get_state(void); |
| 105 | int smsm_set_sleep_duration(uint32_t delay); |
| 106 | int smsm_set_interrupt_info(struct smsm_interrupt_info *info); |
| 107 | void smsm_print_sleep_info(void); |
| 108 | |
| 109 | #define SMEM_NUM_SMD_CHANNELS 64 |
| 110 | |
| 111 | typedef enum |
| 112 | { |
| 113 | /* fixed items */ |
| 114 | SMEM_PROC_COMM = 0, |
| 115 | SMEM_HEAP_INFO, |
| 116 | SMEM_ALLOCATION_TABLE, |
| 117 | SMEM_VERSION_INFO, |
| 118 | SMEM_HW_RESET_DETECT, |
| 119 | SMEM_AARM_WARM_BOOT, |
| 120 | SMEM_DIAG_ERR_MESSAGE, |
| 121 | SMEM_SPINLOCK_ARRAY, |
| 122 | SMEM_MEMORY_BARRIER_LOCATION, |
| 123 | |
| 124 | /* dynamic items */ |
| 125 | SMEM_AARM_PARTITION_TABLE, |
| 126 | SMEM_AARM_BAD_BLOCK_TABLE, |
| 127 | SMEM_RESERVE_BAD_BLOCKS, |
| 128 | SMEM_WM_UUID, |
| 129 | SMEM_CHANNEL_ALLOC_TBL, |
| 130 | SMEM_SMD_BASE_ID, |
| 131 | SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS, |
| 132 | SMEM_SMEM_LOG_EVENTS, |
| 133 | SMEM_SMEM_STATIC_LOG_IDX, |
| 134 | SMEM_SMEM_STATIC_LOG_EVENTS, |
| 135 | SMEM_SMEM_SLOW_CLOCK_SYNC, |
| 136 | SMEM_SMEM_SLOW_CLOCK_VALUE, |
| 137 | SMEM_BIO_LED_BUF, |
| 138 | SMEM_SMSM_SHARED_STATE, |
| 139 | SMEM_SMSM_INT_INFO, |
| 140 | SMEM_SMSM_SLEEP_DELAY, |
| 141 | SMEM_SMSM_LIMIT_SLEEP, |
| 142 | SMEM_SLEEP_POWER_COLLAPSE_DISABLED, |
| 143 | SMEM_KEYPAD_KEYS_PRESSED, |
| 144 | SMEM_KEYPAD_STATE_UPDATED, |
| 145 | SMEM_KEYPAD_STATE_IDX, |
| 146 | SMEM_GPIO_INT, |
| 147 | SMEM_MDDI_LCD_IDX, |
| 148 | SMEM_MDDI_HOST_DRIVER_STATE, |
| 149 | SMEM_MDDI_LCD_DISP_STATE, |
| 150 | SMEM_LCD_CUR_PANEL, |
| 151 | SMEM_MARM_BOOT_SEGMENT_INFO, |
| 152 | SMEM_AARM_BOOT_SEGMENT_INFO, |
| 153 | SMEM_SLEEP_STATIC, |
| 154 | SMEM_SCORPION_FREQUENCY, |
| 155 | SMEM_SMD_PROFILES, |
| 156 | SMEM_TSSC_BUSY, |
| 157 | SMEM_HS_SUSPEND_FILTER_INFO, |
| 158 | SMEM_BATT_INFO, |
| 159 | SMEM_APPS_BOOT_MODE, |
| 160 | SMEM_VERSION_FIRST, |
| 161 | SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24, |
| 162 | SMEM_OSS_RRCASN1_BUF1, |
| 163 | SMEM_OSS_RRCASN1_BUF2, |
| 164 | SMEM_ID_VENDOR0, |
| 165 | SMEM_ID_VENDOR1, |
| 166 | SMEM_ID_VENDOR2, |
| 167 | SMEM_HW_SW_BUILD_ID, |
| 168 | SMEM_NUM_ITEMS, |
| 169 | } smem_mem_type; |
| 170 | |
| 171 | #endif |