| Chirag Khurana | a13f285 | 2019-09-04 17:42:40 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. |
| Jimmy Su | a9f32db | 2018-09-19 13:55:16 +0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &mdss_mdp { |
| 14 | dsi_osd_disp_fwvga_video: qcom,mdss_dsi_osd_disp_fwvga_video { |
| 15 | qcom,mdss-dsi-panel-name = |
| 16 | "OSD Displays fwvga video mode dsi panel"; |
| 17 | qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; |
| 18 | qcom,mdss-dsi-panel-type = "dsi_video_mode"; |
| 19 | qcom,mdss-dsi-panel-destination = "display_1"; |
| 20 | qcom,mdss-dsi-panel-framerate = <60>; |
| 21 | qcom,mdss-dsi-virtual-channel-id = <0>; |
| 22 | qcom,mdss-dsi-stream = <0>; |
| 23 | qcom,mdss-dsi-panel-width = <480>; |
| 24 | qcom,mdss-dsi-panel-height = <854>; |
| 25 | qcom,mdss-dsi-h-front-porch = <70>; |
| 26 | qcom,mdss-dsi-h-back-porch = <70>; |
| 27 | qcom,mdss-dsi-h-pulse-width = <70>; |
| 28 | qcom,mdss-dsi-h-sync-skew = <0>; |
| 29 | qcom,mdss-dsi-v-back-porch = <10>; |
| 30 | qcom,mdss-dsi-v-front-porch = <10>; |
| Chirag Khurana | a13f285 | 2019-09-04 17:42:40 +0530 | [diff] [blame] | 31 | qcom,mdss-dsi-v-pulse-width = <5>; |
| Jimmy Su | a9f32db | 2018-09-19 13:55:16 +0800 | [diff] [blame] | 32 | qcom,mdss-dsi-h-left-border = <0>; |
| 33 | qcom,mdss-dsi-h-right-border = <0>; |
| 34 | qcom,mdss-dsi-v-top-border = <0>; |
| 35 | qcom,mdss-dsi-v-bottom-border = <0>; |
| 36 | qcom,mdss-dsi-bpp = <24>; |
| 37 | qcom,mdss-dsi-color-order = <0>; |
| 38 | qcom,mdss-dsi-underflow-color = <0xff>; |
| 39 | qcom,mdss-dsi-border-color = <0>; |
| 40 | qcom,ulps-enabled; |
| 41 | qcom,mdss-dsi-on-command = [ |
| 42 | 39 01 00 00 01 00 04 BF 91 61 F2 |
| 43 | 39 01 00 00 01 00 03 B3 00 9B |
| 44 | 39 01 00 00 01 00 03 B4 00 9B |
| 45 | 39 01 00 00 01 00 02 C3 04 |
| 46 | 39 01 00 00 01 00 07 B8 00 6F 01 00 6F 01 |
| 47 | 39 01 00 00 01 00 04 BA 34 23 00 |
| 48 | 39 01 00 00 01 00 03 C4 30 6A |
| 49 | 39 01 00 00 01 00 0A C7 00 01 32 05 65 2A 12 A5 A5 |
| 50 | 39 01 00 00 01 00 27 C8 7F 6A 5A 4E 49 39 3B 23 37 |
| 51 | 32 2F 49 35 3B 31 2B 1E 0F 00 7F 6A 5A 4E |
| 52 | 49 39 3B 23 37 32 2F 49 35 3B 31 2B 1E 0F 00 |
| 53 | 39 01 00 00 01 00 11 D4 1E 1F 1F 1F 06 04 0A 08 00 |
| 54 | 02 1F 1F 1F 1F 1F 1F |
| 55 | 39 01 00 00 01 00 11 D5 1E 1F 1F 1F 07 05 0B 09 01 |
| 56 | 03 1F 1F 1F 1F 1F 1F |
| 57 | 39 01 00 00 01 00 11 D6 1F 1E 1F 1F 07 09 0B 05 03 |
| 58 | 01 1F 1F 1F 1F 1F 1F |
| 59 | 39 01 00 00 01 00 11 D7 1F 1E 1F 1F 06 08 0A 04 02 |
| 60 | 00 1F 1F 1F 1F 1F 1F |
| 61 | 39 01 00 00 01 00 15 D8 20 00 00 30 08 20 01 02 00 |
| 62 | 01 02 06 7B 00 00 72 0A 0E 49 08 |
| 63 | 39 01 00 00 01 00 14 D9 00 0A 0A 89 00 00 06 7B 00 |
| 64 | 00 00 3B 33 1F 00 00 00 03 7B |
| 65 | 05 01 00 00 01 00 02 35 00 |
| 66 | 39 01 00 00 01 00 02 BE 01 |
| 67 | 39 01 00 00 01 00 02 C1 10 |
| 68 | 39 01 00 00 01 00 0B CC 34 20 38 60 11 91 00 40 00 00 |
| 69 | 39 01 00 00 01 00 02 BE 00 |
| 70 | 05 01 00 00 01 00 02 11 00 |
| 71 | 05 01 00 00 01 00 02 29 00]; |
| 72 | qcom,mdss-dsi-off-command = [ |
| 73 | 05 01 00 00 01 00 02 28 00 |
| 74 | 05 01 00 00 01 00 02 10 00]; |
| 75 | qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; |
| 76 | qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; |
| 77 | qcom,mdss-dsi-h-sync-pulse = <1>; |
| 78 | qcom,mdss-dsi-traffic-mode = "burst_mode"; |
| 79 | qcom,mdss-dsi-bllp-eof-power-mode; |
| 80 | qcom,mdss-dsi-bllp-power-mode; |
| 81 | qcom,mdss-dsi-lane-0-state; |
| 82 | qcom,mdss-dsi-lane-1-state; |
| 83 | qcom,mdss-dsi-panel-timings = |
| 84 | [7F 1C 12 00 40 44 16 1E 17 03 04 00]; |
| 85 | qcom,mdss-dsi-t-clk-post = <0x20>; |
| 86 | qcom,mdss-dsi-t-clk-pre = <0x2C>; |
| 87 | qcom,mdss-dsi-bl-min-level = <1>; |
| 88 | qcom,mdss-dsi-bl-max-level = <4095>; |
| 89 | qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| 90 | qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| 91 | qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| 92 | qcom,mdss-dsi-pwm-gpio = <&pm8916_mpps 4 0>; |
| 93 | qcom,mdss-dsi-dma-trigger = "trigger_sw"; |
| 94 | qcom,mdss-dsi-mdp-trigger = "none"; |
| 95 | qcom,mdss-dsi-reset-sequence = <1 20>, <0 20>, <1 20>; |
| 96 | }; |
| 97 | }; |