AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * AM335x Starter Kit |
| 11 | * http://www.ti.com/tool/tmdssk3358 |
| 12 | */ |
| 13 | |
| 14 | /dts-v1/; |
| 15 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame] | 16 | #include "am33xx.dtsi" |
Laurent Pinchart | eb9bdef | 2013-07-18 00:54:24 +0200 | [diff] [blame] | 17 | #include <dt-bindings/pwm/pwm.h> |
Eliad Peller | 99f84ca | 2015-03-18 18:38:29 +0200 | [diff] [blame] | 18 | #include <dt-bindings/interrupt-controller/irq.h> |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 19 | |
| 20 | / { |
| 21 | model = "TI AM335x EVM-SK"; |
| 22 | compatible = "ti,am335x-evmsk", "ti,am33xx"; |
| 23 | |
| 24 | cpus { |
| 25 | cpu@0 { |
| 26 | cpu0-supply = <&vdd1_reg>; |
| 27 | }; |
| 28 | }; |
| 29 | |
| 30 | memory { |
| 31 | device_type = "memory"; |
| 32 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
| 33 | }; |
| 34 | |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 35 | vbat: fixedregulator@0 { |
| 36 | compatible = "regulator-fixed"; |
| 37 | regulator-name = "vbat"; |
| 38 | regulator-min-microvolt = <5000000>; |
| 39 | regulator-max-microvolt = <5000000>; |
| 40 | regulator-boot-on; |
| 41 | }; |
| 42 | |
| 43 | lis3_reg: fixedregulator@1 { |
| 44 | compatible = "regulator-fixed"; |
| 45 | regulator-name = "lis3_reg"; |
| 46 | regulator-boot-on; |
| 47 | }; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 48 | |
Imre Kaloz | 90f4f01 | 2014-03-03 10:02:56 +0100 | [diff] [blame] | 49 | wl12xx_vmmc: fixedregulator@2 { |
| 50 | pinctrl-names = "default"; |
| 51 | pinctrl-0 = <&wl12xx_gpio>; |
| 52 | compatible = "regulator-fixed"; |
| 53 | regulator-name = "vwl1271"; |
| 54 | regulator-min-microvolt = <1800000>; |
| 55 | regulator-max-microvolt = <1800000>; |
| 56 | gpio = <&gpio1 29 0>; |
| 57 | startup-delay-us = <70000>; |
| 58 | enable-active-high; |
| 59 | }; |
| 60 | |
Dave Gerlach | 12f0323 | 2014-05-05 14:58:29 -0500 | [diff] [blame] | 61 | vtt_fixed: fixedregulator@3 { |
| 62 | compatible = "regulator-fixed"; |
| 63 | regulator-name = "vtt"; |
| 64 | regulator-min-microvolt = <1500000>; |
| 65 | regulator-max-microvolt = <1500000>; |
| 66 | gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>; |
| 67 | regulator-always-on; |
| 68 | regulator-boot-on; |
| 69 | enable-active-high; |
| 70 | }; |
| 71 | |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 72 | leds { |
Vaibhav Hiremath | b8f70c3 | 2013-03-26 15:42:15 +0530 | [diff] [blame] | 73 | pinctrl-names = "default"; |
| 74 | pinctrl-0 = <&user_leds_s0>; |
| 75 | |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 76 | compatible = "gpio-leds"; |
| 77 | |
| 78 | led@1 { |
| 79 | label = "evmsk:green:usr0"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 80 | gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 81 | default-state = "off"; |
| 82 | }; |
| 83 | |
| 84 | led@2 { |
| 85 | label = "evmsk:green:usr1"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 86 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 87 | default-state = "off"; |
| 88 | }; |
| 89 | |
| 90 | led@3 { |
| 91 | label = "evmsk:green:mmc0"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 92 | gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 93 | linux,default-trigger = "mmc0"; |
| 94 | default-state = "off"; |
| 95 | }; |
| 96 | |
| 97 | led@4 { |
| 98 | label = "evmsk:green:heartbeat"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 99 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 100 | linux,default-trigger = "heartbeat"; |
| 101 | default-state = "off"; |
| 102 | }; |
| 103 | }; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 104 | |
| 105 | gpio_buttons: gpio_buttons@0 { |
| 106 | compatible = "gpio-keys"; |
| 107 | #address-cells = <1>; |
| 108 | #size-cells = <0>; |
| 109 | |
| 110 | switch@1 { |
| 111 | label = "button0"; |
| 112 | linux,code = <0x100>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 113 | gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 114 | }; |
| 115 | |
| 116 | switch@2 { |
| 117 | label = "button1"; |
| 118 | linux,code = <0x101>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 119 | gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | switch@3 { |
| 123 | label = "button2"; |
| 124 | linux,code = <0x102>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 125 | gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 126 | gpio-key,wakeup; |
| 127 | }; |
| 128 | |
| 129 | switch@4 { |
| 130 | label = "button3"; |
| 131 | linux,code = <0x103>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 132 | gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 133 | }; |
| 134 | }; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 135 | |
| 136 | backlight { |
| 137 | compatible = "pwm-backlight"; |
Laurent Pinchart | eb9bdef | 2013-07-18 00:54:24 +0200 | [diff] [blame] | 138 | pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 139 | brightness-levels = <0 58 61 66 75 90 125 170 255>; |
| 140 | default-brightness-level = <8>; |
| 141 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 142 | |
| 143 | sound { |
| 144 | compatible = "ti,da830-evm-audio"; |
| 145 | ti,model = "AM335x-EVMSK"; |
| 146 | ti,audio-codec = <&tlv320aic3106>; |
| 147 | ti,mcasp-controller = <&mcasp1>; |
Peter Ujfalusi | d2c2892 | 2014-01-24 10:19:07 +0200 | [diff] [blame] | 148 | ti,codec-clock-rate = <24000000>; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 149 | ti,audio-routing = |
| 150 | "Headphone Jack", "HPLOUT", |
| 151 | "Headphone Jack", "HPROUT"; |
| 152 | }; |
Darren Etheridge | b675d1e | 2014-07-01 16:00:20 -0500 | [diff] [blame] | 153 | |
| 154 | panel { |
| 155 | compatible = "ti,tilcdc,panel"; |
| 156 | pinctrl-names = "default", "sleep"; |
| 157 | pinctrl-0 = <&lcd_pins_default>; |
| 158 | pinctrl-1 = <&lcd_pins_sleep>; |
| 159 | status = "okay"; |
| 160 | panel-info { |
| 161 | ac-bias = <255>; |
| 162 | ac-bias-intrpt = <0>; |
| 163 | dma-burst-sz = <16>; |
| 164 | bpp = <32>; |
| 165 | fdd = <0x80>; |
| 166 | sync-edge = <0>; |
| 167 | sync-ctrl = <1>; |
| 168 | raster-order = <0>; |
| 169 | fifo-th = <0>; |
| 170 | }; |
| 171 | display-timings { |
| 172 | 480x272 { |
| 173 | hactive = <480>; |
| 174 | vactive = <272>; |
| 175 | hback-porch = <43>; |
| 176 | hfront-porch = <8>; |
| 177 | hsync-len = <4>; |
| 178 | vback-porch = <12>; |
| 179 | vfront-porch = <4>; |
| 180 | vsync-len = <10>; |
| 181 | clock-frequency = <9000000>; |
| 182 | hsync-active = <0>; |
| 183 | vsync-active = <0>; |
| 184 | }; |
| 185 | }; |
| 186 | }; |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 187 | }; |
| 188 | |
Javier Martinez Canillas | 82d75af | 2013-09-20 17:00:00 +0200 | [diff] [blame] | 189 | &am33xx_pinmux { |
| 190 | pinctrl-names = "default"; |
| 191 | pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; |
| 192 | |
Darren Etheridge | b675d1e | 2014-07-01 16:00:20 -0500 | [diff] [blame] | 193 | lcd_pins_default: lcd_pins_default { |
| 194 | pinctrl-single,pins = < |
| 195 | 0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ |
| 196 | 0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ |
| 197 | 0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ |
| 198 | 0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ |
| 199 | 0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ |
| 200 | 0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ |
| 201 | 0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ |
| 202 | 0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ |
| 203 | 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ |
| 204 | 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ |
| 205 | 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ |
| 206 | 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ |
| 207 | 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ |
| 208 | 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ |
| 209 | 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ |
| 210 | 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ |
| 211 | 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ |
| 212 | 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ |
| 213 | 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ |
| 214 | 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ |
| 215 | 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ |
| 216 | 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ |
| 217 | 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ |
| 218 | 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ |
| 219 | 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ |
| 220 | 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ |
| 221 | 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ |
| 222 | 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ |
| 223 | >; |
| 224 | }; |
| 225 | |
| 226 | lcd_pins_sleep: lcd_pins_sleep { |
| 227 | pinctrl-single,pins = < |
| 228 | 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */ |
| 229 | 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */ |
| 230 | 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */ |
| 231 | 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */ |
| 232 | 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */ |
| 233 | 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */ |
| 234 | 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */ |
| 235 | 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */ |
| 236 | 0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */ |
| 237 | 0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */ |
| 238 | 0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */ |
| 239 | 0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */ |
| 240 | 0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */ |
| 241 | 0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */ |
| 242 | 0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */ |
| 243 | 0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */ |
| 244 | 0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */ |
| 245 | 0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */ |
| 246 | 0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */ |
| 247 | 0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */ |
| 248 | 0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */ |
| 249 | 0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */ |
| 250 | 0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */ |
| 251 | 0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */ |
| 252 | 0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */ |
| 253 | 0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */ |
| 254 | 0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */ |
| 255 | 0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */ |
| 256 | >; |
| 257 | }; |
| 258 | |
| 259 | |
Javier Martinez Canillas | 82d75af | 2013-09-20 17:00:00 +0200 | [diff] [blame] | 260 | user_leds_s0: user_leds_s0 { |
| 261 | pinctrl-single,pins = < |
| 262 | 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ |
| 263 | 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ |
| 264 | 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ |
| 265 | 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ |
| 266 | >; |
| 267 | }; |
| 268 | |
| 269 | gpio_keys_s0: gpio_keys_s0 { |
| 270 | pinctrl-single,pins = < |
| 271 | 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ |
| 272 | 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ |
| 273 | 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ |
| 274 | 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ |
| 275 | >; |
| 276 | }; |
| 277 | |
| 278 | i2c0_pins: pinmux_i2c0_pins { |
| 279 | pinctrl-single,pins = < |
| 280 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 281 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| 282 | >; |
| 283 | }; |
| 284 | |
| 285 | uart0_pins: pinmux_uart0_pins { |
| 286 | pinctrl-single,pins = < |
| 287 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
| 288 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
| 289 | >; |
| 290 | }; |
| 291 | |
| 292 | clkout2_pin: pinmux_clkout2_pin { |
| 293 | pinctrl-single,pins = < |
| 294 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
| 295 | >; |
| 296 | }; |
| 297 | |
| 298 | ecap2_pins: backlight_pins { |
| 299 | pinctrl-single,pins = < |
| 300 | 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ |
| 301 | >; |
| 302 | }; |
| 303 | |
| 304 | cpsw_default: cpsw_default { |
| 305 | pinctrl-single,pins = < |
| 306 | /* Slave 1 */ |
| 307 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
| 308 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
| 309 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ |
| 310 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ |
| 311 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
| 312 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
| 313 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ |
| 314 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ |
| 315 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ |
| 316 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ |
| 317 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
| 318 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
| 319 | |
| 320 | /* Slave 2 */ |
| 321 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ |
| 322 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ |
| 323 | 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ |
| 324 | 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ |
| 325 | 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ |
| 326 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ |
| 327 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ |
| 328 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ |
| 329 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ |
| 330 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ |
| 331 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ |
| 332 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ |
| 333 | >; |
| 334 | }; |
| 335 | |
| 336 | cpsw_sleep: cpsw_sleep { |
| 337 | pinctrl-single,pins = < |
| 338 | /* Slave 1 reset value */ |
| 339 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 340 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 341 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 342 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 343 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 344 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 345 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 346 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 347 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 348 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 349 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 350 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 351 | |
| 352 | /* Slave 2 reset value*/ |
| 353 | 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 354 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 355 | 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 356 | 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 357 | 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 358 | 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 359 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 360 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 361 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 362 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 363 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 364 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 365 | >; |
| 366 | }; |
| 367 | |
| 368 | davinci_mdio_default: davinci_mdio_default { |
| 369 | pinctrl-single,pins = < |
| 370 | /* MDIO */ |
| 371 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
| 372 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
| 373 | >; |
| 374 | }; |
| 375 | |
| 376 | davinci_mdio_sleep: davinci_mdio_sleep { |
| 377 | pinctrl-single,pins = < |
| 378 | /* MDIO reset value */ |
| 379 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 380 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 381 | >; |
| 382 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 383 | |
Peter Ujfalusi | 29ea5ef | 2013-12-23 11:28:35 +0200 | [diff] [blame] | 384 | mmc1_pins: pinmux_mmc1_pins { |
| 385 | pinctrl-single,pins = < |
| 386 | 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ |
| 387 | >; |
| 388 | }; |
| 389 | |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 390 | mcasp1_pins: mcasp1_pins { |
| 391 | pinctrl-single,pins = < |
| 392 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ |
| 393 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ |
| 394 | 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ |
| 395 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ |
| 396 | >; |
| 397 | }; |
Imre Kaloz | 90f4f01 | 2014-03-03 10:02:56 +0100 | [diff] [blame] | 398 | |
| 399 | mmc2_pins: pinmux_mmc2_pins { |
| 400 | pinctrl-single,pins = < |
| 401 | 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ |
| 402 | 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
| 403 | 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ |
| 404 | 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ |
| 405 | 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ |
| 406 | 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ |
| 407 | 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ |
| 408 | >; |
| 409 | }; |
| 410 | |
| 411 | wl12xx_gpio: pinmux_wl12xx_gpio { |
| 412 | pinctrl-single,pins = < |
| 413 | 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ |
| 414 | >; |
| 415 | }; |
Javier Martinez Canillas | 82d75af | 2013-09-20 17:00:00 +0200 | [diff] [blame] | 416 | }; |
| 417 | |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 418 | &uart0 { |
| 419 | pinctrl-names = "default"; |
| 420 | pinctrl-0 = <&uart0_pins>; |
| 421 | |
| 422 | status = "okay"; |
| 423 | }; |
| 424 | |
| 425 | &i2c0 { |
| 426 | pinctrl-names = "default"; |
| 427 | pinctrl-0 = <&i2c0_pins>; |
| 428 | |
| 429 | status = "okay"; |
| 430 | clock-frequency = <400000>; |
| 431 | |
| 432 | tps: tps@2d { |
| 433 | reg = <0x2d>; |
| 434 | }; |
| 435 | |
| 436 | lis331dlh: lis331dlh@18 { |
| 437 | compatible = "st,lis331dlh", "st,lis3lv02d"; |
| 438 | reg = <0x18>; |
| 439 | Vdd-supply = <&lis3_reg>; |
| 440 | Vdd_IO-supply = <&lis3_reg>; |
| 441 | |
| 442 | st,click-single-x; |
| 443 | st,click-single-y; |
| 444 | st,click-single-z; |
| 445 | st,click-thresh-x = <10>; |
| 446 | st,click-thresh-y = <10>; |
| 447 | st,click-thresh-z = <10>; |
| 448 | st,irq1-click; |
| 449 | st,irq2-click; |
| 450 | st,wakeup-x-lo; |
| 451 | st,wakeup-x-hi; |
| 452 | st,wakeup-y-lo; |
| 453 | st,wakeup-y-hi; |
| 454 | st,wakeup-z-lo; |
| 455 | st,wakeup-z-hi; |
| 456 | st,min-limit-x = <120>; |
| 457 | st,min-limit-y = <120>; |
| 458 | st,min-limit-z = <140>; |
| 459 | st,max-limit-x = <550>; |
| 460 | st,max-limit-y = <550>; |
| 461 | st,max-limit-z = <750>; |
| 462 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 463 | |
| 464 | tlv320aic3106: tlv320aic3106@1b { |
| 465 | compatible = "ti,tlv320aic3106"; |
| 466 | reg = <0x1b>; |
| 467 | status = "okay"; |
| 468 | |
| 469 | /* Regulators */ |
| 470 | AVDD-supply = <&vaux2_reg>; |
| 471 | IOVDD-supply = <&vaux2_reg>; |
| 472 | DRVDD-supply = <&vaux2_reg>; |
| 473 | DVDD-supply = <&vbat>; |
| 474 | }; |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 475 | }; |
| 476 | |
| 477 | &usb { |
| 478 | status = "okay"; |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 479 | }; |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 480 | |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 481 | &usb_ctrl_mod { |
| 482 | status = "okay"; |
| 483 | }; |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 484 | |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 485 | &usb0_phy { |
| 486 | status = "okay"; |
| 487 | }; |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 488 | |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 489 | &usb1_phy { |
| 490 | status = "okay"; |
| 491 | }; |
Yegor Yefremov | eda1a4b | 2014-02-28 08:19:04 +0100 | [diff] [blame] | 492 | |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 493 | &usb0 { |
| 494 | status = "okay"; |
| 495 | }; |
Yegor Yefremov | eda1a4b | 2014-02-28 08:19:04 +0100 | [diff] [blame] | 496 | |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 497 | &usb1 { |
| 498 | status = "okay"; |
| 499 | dr_mode = "host"; |
| 500 | }; |
Yegor Yefremov | cae2a9e | 2014-03-10 16:26:57 +0100 | [diff] [blame] | 501 | |
Guido MartÃnez | 0f686d2 | 2014-04-28 17:54:34 -0300 | [diff] [blame] | 502 | &cppi41dma { |
| 503 | status = "okay"; |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 504 | }; |
| 505 | |
| 506 | &epwmss2 { |
| 507 | status = "okay"; |
| 508 | |
| 509 | ecap2: ecap@48304100 { |
| 510 | status = "okay"; |
| 511 | pinctrl-names = "default"; |
| 512 | pinctrl-0 = <&ecap2_pins>; |
| 513 | }; |
| 514 | }; |
| 515 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame] | 516 | #include "tps65910.dtsi" |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 517 | |
| 518 | &tps { |
| 519 | vcc1-supply = <&vbat>; |
| 520 | vcc2-supply = <&vbat>; |
| 521 | vcc3-supply = <&vbat>; |
| 522 | vcc4-supply = <&vbat>; |
| 523 | vcc5-supply = <&vbat>; |
| 524 | vcc6-supply = <&vbat>; |
| 525 | vcc7-supply = <&vbat>; |
| 526 | vccio-supply = <&vbat>; |
| 527 | |
| 528 | regulators { |
| 529 | vrtc_reg: regulator@0 { |
| 530 | regulator-always-on; |
| 531 | }; |
| 532 | |
| 533 | vio_reg: regulator@1 { |
| 534 | regulator-always-on; |
| 535 | }; |
| 536 | |
| 537 | vdd1_reg: regulator@2 { |
| 538 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| 539 | regulator-name = "vdd_mpu"; |
| 540 | regulator-min-microvolt = <912500>; |
| 541 | regulator-max-microvolt = <1312500>; |
| 542 | regulator-boot-on; |
| 543 | regulator-always-on; |
| 544 | }; |
| 545 | |
| 546 | vdd2_reg: regulator@3 { |
| 547 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| 548 | regulator-name = "vdd_core"; |
| 549 | regulator-min-microvolt = <912500>; |
| 550 | regulator-max-microvolt = <1150000>; |
| 551 | regulator-boot-on; |
| 552 | regulator-always-on; |
| 553 | }; |
| 554 | |
| 555 | vdd3_reg: regulator@4 { |
| 556 | regulator-always-on; |
| 557 | }; |
| 558 | |
| 559 | vdig1_reg: regulator@5 { |
| 560 | regulator-always-on; |
| 561 | }; |
| 562 | |
| 563 | vdig2_reg: regulator@6 { |
| 564 | regulator-always-on; |
| 565 | }; |
| 566 | |
| 567 | vpll_reg: regulator@7 { |
| 568 | regulator-always-on; |
| 569 | }; |
| 570 | |
| 571 | vdac_reg: regulator@8 { |
| 572 | regulator-always-on; |
| 573 | }; |
| 574 | |
| 575 | vaux1_reg: regulator@9 { |
| 576 | regulator-always-on; |
| 577 | }; |
| 578 | |
| 579 | vaux2_reg: regulator@10 { |
| 580 | regulator-always-on; |
| 581 | }; |
| 582 | |
| 583 | vaux33_reg: regulator@11 { |
| 584 | regulator-always-on; |
| 585 | }; |
| 586 | |
| 587 | vmmc_reg: regulator@12 { |
Matt Porter | 55b4452 | 2013-09-10 14:24:39 -0500 | [diff] [blame] | 588 | regulator-min-microvolt = <1800000>; |
| 589 | regulator-max-microvolt = <3300000>; |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 590 | regulator-always-on; |
| 591 | }; |
| 592 | }; |
| 593 | }; |
Mugunthan V N | 94a924c | 2013-06-07 17:02:53 +0530 | [diff] [blame] | 594 | |
| 595 | &mac { |
| 596 | pinctrl-names = "default", "sleep"; |
| 597 | pinctrl-0 = <&cpsw_default>; |
| 598 | pinctrl-1 = <&cpsw_sleep>; |
Yegor Yefremov | 18c49af | 2014-03-05 08:29:19 +0100 | [diff] [blame] | 599 | dual_emac = <1>; |
Johan Hovold | 16c75a1 | 2014-05-08 10:57:36 +0200 | [diff] [blame] | 600 | status = "okay"; |
Mugunthan V N | 94a924c | 2013-06-07 17:02:53 +0530 | [diff] [blame] | 601 | }; |
| 602 | |
| 603 | &davinci_mdio { |
| 604 | pinctrl-names = "default", "sleep"; |
| 605 | pinctrl-0 = <&davinci_mdio_default>; |
| 606 | pinctrl-1 = <&davinci_mdio_sleep>; |
Johan Hovold | 16c75a1 | 2014-05-08 10:57:36 +0200 | [diff] [blame] | 607 | status = "okay"; |
Mugunthan V N | 94a924c | 2013-06-07 17:02:53 +0530 | [diff] [blame] | 608 | }; |
Linus Torvalds | 496322b | 2013-07-09 18:24:39 -0700 | [diff] [blame] | 609 | |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 610 | &cpsw_emac0 { |
| 611 | phy_id = <&davinci_mdio>, <0>; |
Mugunthan V N | 6d75afe | 2013-06-03 20:10:11 +0000 | [diff] [blame] | 612 | phy-mode = "rgmii-txid"; |
Yegor Yefremov | 18c49af | 2014-03-05 08:29:19 +0100 | [diff] [blame] | 613 | dual_emac_res_vlan = <1>; |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 614 | }; |
| 615 | |
| 616 | &cpsw_emac1 { |
| 617 | phy_id = <&davinci_mdio>, <1>; |
Mugunthan V N | 6d75afe | 2013-06-03 20:10:11 +0000 | [diff] [blame] | 618 | phy-mode = "rgmii-txid"; |
Yegor Yefremov | 18c49af | 2014-03-05 08:29:19 +0100 | [diff] [blame] | 619 | dual_emac_res_vlan = <2>; |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 620 | }; |
Matt Porter | 55b4452 | 2013-09-10 14:24:39 -0500 | [diff] [blame] | 621 | |
| 622 | &mmc1 { |
| 623 | status = "okay"; |
| 624 | vmmc-supply = <&vmmc_reg>; |
Balaji T K | 0d8d40f | 2013-09-27 17:05:10 +0530 | [diff] [blame] | 625 | bus-width = <4>; |
Peter Ujfalusi | 29ea5ef | 2013-12-23 11:28:35 +0200 | [diff] [blame] | 626 | pinctrl-names = "default"; |
| 627 | pinctrl-0 = <&mmc1_pins>; |
| 628 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; |
Matt Porter | 55b4452 | 2013-09-10 14:24:39 -0500 | [diff] [blame] | 629 | }; |
Mark A. Greer | f8302e1 | 2013-08-23 14:12:35 -0700 | [diff] [blame] | 630 | |
| 631 | &sham { |
| 632 | status = "okay"; |
| 633 | }; |
Mark A. Greer | 99919e5e | 2013-08-23 14:12:36 -0700 | [diff] [blame] | 634 | |
| 635 | &aes { |
| 636 | status = "okay"; |
| 637 | }; |
Rajendra Nayak | 6046adb | 2013-10-09 15:42:01 +0530 | [diff] [blame] | 638 | |
| 639 | &gpio0 { |
| 640 | ti,no-reset-on-init; |
| 641 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 642 | |
Imre Kaloz | 90f4f01 | 2014-03-03 10:02:56 +0100 | [diff] [blame] | 643 | &mmc2 { |
| 644 | status = "okay"; |
| 645 | vmmc-supply = <&wl12xx_vmmc>; |
| 646 | ti,non-removable; |
| 647 | bus-width = <4>; |
| 648 | cap-power-off-card; |
| 649 | pinctrl-names = "default"; |
| 650 | pinctrl-0 = <&mmc2_pins>; |
Eliad Peller | 99f84ca | 2015-03-18 18:38:29 +0200 | [diff] [blame] | 651 | |
| 652 | #address-cells = <1>; |
| 653 | #size-cells = <0>; |
| 654 | wlcore: wlcore@2 { |
| 655 | compatible = "ti,wl1271"; |
| 656 | reg = <2>; |
| 657 | interrupt-parent = <&gpio1>; |
| 658 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */ |
| 659 | ref-clock-frequency = <38400000>; |
| 660 | }; |
Imre Kaloz | 90f4f01 | 2014-03-03 10:02:56 +0100 | [diff] [blame] | 661 | }; |
| 662 | |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 663 | &mcasp1 { |
| 664 | pinctrl-names = "default"; |
| 665 | pinctrl-0 = <&mcasp1_pins>; |
| 666 | |
| 667 | status = "okay"; |
| 668 | |
| 669 | op-mode = <0>; /* MCASP_IIS_MODE */ |
| 670 | tdm-slots = <2>; |
| 671 | /* 4 serializers */ |
| 672 | serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 673 | 0 0 1 2 |
| 674 | >; |
Peter Ujfalusi | 6f2f52b | 2014-07-03 12:51:23 +0300 | [diff] [blame] | 675 | tx-num-evt = <32>; |
| 676 | rx-num-evt = <32>; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 677 | }; |
Linus Torvalds | 4937e2a | 2013-11-15 16:43:53 -0800 | [diff] [blame] | 678 | |
Felipe Balbi | 2c027b7 | 2013-11-10 23:58:31 -0800 | [diff] [blame] | 679 | &tscadc { |
| 680 | status = "okay"; |
| 681 | tsc { |
| 682 | ti,wires = <4>; |
| 683 | ti,x-plate-resistance = <200>; |
| 684 | ti,coordinate-readouts = <5>; |
| 685 | ti,wire-config = <0x00 0x11 0x22 0x33>; |
| 686 | }; |
| 687 | }; |
Darren Etheridge | b675d1e | 2014-07-01 16:00:20 -0500 | [diff] [blame] | 688 | |
| 689 | &lcdc { |
| 690 | status = "okay"; |
| 691 | }; |