blob: 6e05a2e75a46c211bcd5b4236e7c094b1636c9a1 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2009 Jerome Glisse.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Jerome Glisse
23 */
24#include <drm/drmP.h>
25#include <drm/radeon_drm.h>
26#include "radeon_reg.h"
27#include "radeon.h"
28
Ilija Hadziccc340512011-10-12 23:29:38 -040029#define RADEON_BENCHMARK_COPY_BLIT 1
30#define RADEON_BENCHMARK_COPY_DMA 0
31
32#define RADEON_BENCHMARK_ITERATIONS 1024
Ilija Hadzic638dd7d2011-10-12 23:29:39 -040033#define RADEON_BENCHMARK_COMMON_MODES_N 17
Ilija Hadziccc340512011-10-12 23:29:38 -040034
35static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36 uint64_t saddr, uint64_t daddr,
37 int flag, int n)
38{
39 unsigned long start_jiffies;
40 unsigned long end_jiffies;
41 struct radeon_fence *fence = NULL;
42 int i, r;
43
44 start_jiffies = jiffies;
45 for (i = 0; i < n; i++) {
Ilija Hadziccc340512011-10-12 23:29:38 -040046 switch (flag) {
47 case RADEON_BENCHMARK_COPY_DMA:
48 r = radeon_copy_dma(rdev, saddr, daddr,
49 size / RADEON_GPU_PAGE_SIZE,
Christian König876dc9f2012-05-08 14:24:01 +020050 &fence);
Ilija Hadziccc340512011-10-12 23:29:38 -040051 break;
52 case RADEON_BENCHMARK_COPY_BLIT:
53 r = radeon_copy_blit(rdev, saddr, daddr,
54 size / RADEON_GPU_PAGE_SIZE,
Christian König876dc9f2012-05-08 14:24:01 +020055 &fence);
Ilija Hadziccc340512011-10-12 23:29:38 -040056 break;
57 default:
58 DRM_ERROR("Unknown copy method\n");
59 r = -EINVAL;
60 }
61 if (r)
62 goto exit_do_move;
63 r = radeon_fence_wait(fence, false);
64 if (r)
65 goto exit_do_move;
66 radeon_fence_unref(&fence);
67 }
68 end_jiffies = jiffies;
69 r = jiffies_to_msecs(end_jiffies - start_jiffies);
70
71exit_do_move:
72 if (fence)
73 radeon_fence_unref(&fence);
74 return r;
75}
76
77
78static void radeon_benchmark_log_results(int n, unsigned size,
79 unsigned int time,
80 unsigned sdomain, unsigned ddomain,
81 char *kind)
82{
83 unsigned int throughput = (n * (size >> 10)) / time;
84 DRM_INFO("radeon: %s %u bo moves of %u kB from"
85 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
86 kind, n, size >> 10, sdomain, ddomain, time,
87 throughput * 8, throughput);
88}
89
90static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
91 unsigned sdomain, unsigned ddomain)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020092{
Jerome Glisse4c788672009-11-20 14:29:23 +010093 struct radeon_bo *dobj = NULL;
94 struct radeon_bo *sobj = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020095 uint64_t saddr, daddr;
Ilija Hadziccc340512011-10-12 23:29:38 -040096 int r, n;
Dan Carpenterbfba1652011-10-29 10:21:28 +030097 int time;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020098
Ilija Hadziccc340512011-10-12 23:29:38 -040099 n = RADEON_BENCHMARK_ITERATIONS;
Alex Deucher40f5cf92012-05-10 18:33:13 -0400100 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, NULL, &sobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200101 if (r) {
102 goto out_cleanup;
103 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100104 r = radeon_bo_reserve(sobj, false);
105 if (unlikely(r != 0))
106 goto out_cleanup;
107 r = radeon_bo_pin(sobj, sdomain, &saddr);
108 radeon_bo_unreserve(sobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200109 if (r) {
110 goto out_cleanup;
111 }
Alex Deucher40f5cf92012-05-10 18:33:13 -0400112 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, NULL, &dobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200113 if (r) {
114 goto out_cleanup;
115 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100116 r = radeon_bo_reserve(dobj, false);
117 if (unlikely(r != 0))
118 goto out_cleanup;
119 r = radeon_bo_pin(dobj, ddomain, &daddr);
120 radeon_bo_unreserve(dobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200121 if (r) {
122 goto out_cleanup;
123 }
Pauli Nieminenc60a2842010-02-11 00:10:33 +0200124
Alex Deucher271e53d2013-03-12 12:55:56 -0400125 if (rdev->asic->copy.dma) {
Ilija Hadziccc340512011-10-12 23:29:38 -0400126 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
127 RADEON_BENCHMARK_COPY_DMA, n);
128 if (time < 0)
129 goto out_cleanup;
130 if (time > 0)
131 radeon_benchmark_log_results(n, size, time,
132 sdomain, ddomain, "dma");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200133 }
Pauli Nieminenc60a2842010-02-11 00:10:33 +0200134
Alex Deucherfa8d3872013-03-12 12:53:13 -0400135 if (rdev->asic->copy.blit) {
136 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
137 RADEON_BENCHMARK_COPY_BLIT, n);
138 if (time < 0)
139 goto out_cleanup;
140 if (time > 0)
141 radeon_benchmark_log_results(n, size, time,
142 sdomain, ddomain, "blit");
143 }
Ilija Hadziccc340512011-10-12 23:29:38 -0400144
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200145out_cleanup:
146 if (sobj) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100147 r = radeon_bo_reserve(sobj, false);
148 if (likely(r == 0)) {
149 radeon_bo_unpin(sobj);
150 radeon_bo_unreserve(sobj);
151 }
152 radeon_bo_unref(&sobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200153 }
154 if (dobj) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100155 r = radeon_bo_reserve(dobj, false);
156 if (likely(r == 0)) {
157 radeon_bo_unpin(dobj);
158 radeon_bo_unreserve(dobj);
159 }
160 radeon_bo_unref(&dobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200161 }
Ilija Hadziccc340512011-10-12 23:29:38 -0400162
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200163 if (r) {
Ilija Hadziccc340512011-10-12 23:29:38 -0400164 DRM_ERROR("Error while benchmarking BO move.\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200165 }
166}
167
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400168void radeon_benchmark(struct radeon_device *rdev, int test_number)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200169{
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400170 int i;
171 int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
172 640 * 480 * 4,
173 720 * 480 * 4,
174 800 * 600 * 4,
175 848 * 480 * 4,
176 1024 * 768 * 4,
177 1152 * 768 * 4,
178 1280 * 720 * 4,
179 1280 * 800 * 4,
180 1280 * 854 * 4,
181 1280 * 960 * 4,
182 1280 * 1024 * 4,
183 1440 * 900 * 4,
184 1400 * 1050 * 4,
185 1680 * 1050 * 4,
186 1600 * 1200 * 4,
187 1920 * 1080 * 4,
188 1920 * 1200 * 4
189 };
190
191 switch (test_number) {
192 case 1:
193 /* simple test, VRAM to GTT and GTT to VRAM */
194 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
195 RADEON_GEM_DOMAIN_VRAM);
196 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
197 RADEON_GEM_DOMAIN_GTT);
198 break;
199 case 2:
200 /* simple test, VRAM to VRAM */
201 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
202 RADEON_GEM_DOMAIN_VRAM);
203 break;
204 case 3:
205 /* GTT to VRAM, buffer size sweep, powers of 2 */
Ilija Hadzic6d75e832012-01-31 09:35:25 -0500206 for (i = 1; i <= 16384; i <<= 1)
207 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400208 RADEON_GEM_DOMAIN_GTT,
209 RADEON_GEM_DOMAIN_VRAM);
210 break;
211 case 4:
212 /* VRAM to GTT, buffer size sweep, powers of 2 */
Ilija Hadzic6d75e832012-01-31 09:35:25 -0500213 for (i = 1; i <= 16384; i <<= 1)
214 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400215 RADEON_GEM_DOMAIN_VRAM,
216 RADEON_GEM_DOMAIN_GTT);
217 break;
218 case 5:
219 /* VRAM to VRAM, buffer size sweep, powers of 2 */
Ilija Hadzic6d75e832012-01-31 09:35:25 -0500220 for (i = 1; i <= 16384; i <<= 1)
221 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400222 RADEON_GEM_DOMAIN_VRAM,
223 RADEON_GEM_DOMAIN_VRAM);
224 break;
225 case 6:
226 /* GTT to VRAM, buffer size sweep, common modes */
Chen Jied7d0a752011-12-07 10:18:18 +0800227 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400228 radeon_benchmark_move(rdev, common_modes[i],
229 RADEON_GEM_DOMAIN_GTT,
230 RADEON_GEM_DOMAIN_VRAM);
231 break;
232 case 7:
233 /* VRAM to GTT, buffer size sweep, common modes */
Chen Jied7d0a752011-12-07 10:18:18 +0800234 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400235 radeon_benchmark_move(rdev, common_modes[i],
236 RADEON_GEM_DOMAIN_VRAM,
237 RADEON_GEM_DOMAIN_GTT);
238 break;
239 case 8:
240 /* VRAM to VRAM, buffer size sweep, common modes */
Chen Jied7d0a752011-12-07 10:18:18 +0800241 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400242 radeon_benchmark_move(rdev, common_modes[i],
243 RADEON_GEM_DOMAIN_VRAM,
244 RADEON_GEM_DOMAIN_VRAM);
245 break;
246
247 default:
248 DRM_ERROR("Unknown benchmark\n");
249 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200250}