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gerrit-public.fairphone.software / kernel / msm-4.9 / 309f15d8bbe122c5fd0f1b1a2aa1ab79a66608b6 / . / arch / arm / boot / dts / efm32gg.dtsi
blob: b78c57e51ed5139a69e6d4773675a5cbdca52219 [file] [log] [blame]
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]1/*
2 * Device tree for Energy Micro EFM32 Giant Gecko SoC.
3 *
4 * Documentation available from
5 * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
6 */
Joachim Eastwood05b23eb2016-08-29 23:33:56 +0200[diff] [blame]7
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]8#include "armv7-m.dtsi"
9#include "dt-bindings/clock/efm32-cmu.h"
10
11/ {
Joachim Eastwood83640742016-08-29 23:58:29 +0200[diff] [blame]12 #address-cells = <1>;
13 #size-cells = <1>;
14
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 serial0 = &uart0;
19 serial1 = &uart1;
20 serial2 = &uart2;
21 serial3 = &uart3;
22 serial4 = &uart4;
23 spi0 = &spi0;
24 spi1 = &spi1;
25 spi2 = &spi2;
26 };
27
28 soc {
29 adc: adc@40002000 {
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]30 compatible = "energymicro,efm32-adc";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]31 reg = <0x40002000 0x400>;
32 interrupts = <7>;
33 clocks = <&cmu clk_HFPERCLKADC0>;
34 status = "disabled";
35 };
36
37 gpio: gpio@40006000 {
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]38 compatible = "energymicro,efm32-gpio";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]39 reg = <0x40006000 0x1000>;
40 interrupts = <1 11>;
41 gpio-controller;
42 #gpio-cells = <2>;
43 interrupt-controller;
44 #interrupt-cells = <1>;
45 clocks = <&cmu clk_HFPERCLKGPIO>;
46 status = "ok";
47 };
48
49 i2c0: i2c@4000a000 {
50 #address-cells = <1>;
51 #size-cells = <0>;
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]52 compatible = "energymicro,efm32-i2c";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]53 reg = <0x4000a000 0x400>;
54 interrupts = <9>;
55 clocks = <&cmu clk_HFPERCLKI2C0>;
56 clock-frequency = <100000>;
57 status = "disabled";
58 };
59
60 i2c1: i2c@4000a400 {
61 #address-cells = <1>;
62 #size-cells = <0>;
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]63 compatible = "energymicro,efm32-i2c";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]64 reg = <0x4000a400 0x400>;
65 interrupts = <10>;
66 clocks = <&cmu clk_HFPERCLKI2C1>;
67 clock-frequency = <100000>;
68 status = "disabled";
69 };
70
71 spi0: spi@4000c000 { /* USART0 */
72 #address-cells = <1>;
73 #size-cells = <0>;
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]74 compatible = "energymicro,efm32-spi";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]75 reg = <0x4000c000 0x400>;
76 interrupts = <3 4>;
77 clocks = <&cmu clk_HFPERCLKUSART0>;
78 status = "disabled";
79 };
80
81 spi1: spi@4000c400 { /* USART1 */
82 #address-cells = <1>;
83 #size-cells = <0>;
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]84 compatible = "energymicro,efm32-spi";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]85 reg = <0x4000c400 0x400>;
86 interrupts = <15 16>;
87 clocks = <&cmu clk_HFPERCLKUSART1>;
88 status = "disabled";
89 };
90
Uwe Kleine-König64afb242014-03-14 15:51:15 +0100[diff] [blame]91 spi2: spi@4000c800 { /* USART2 */
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]92 #address-cells = <1>;
93 #size-cells = <0>;
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]94 compatible = "energymicro,efm32-spi";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]95 reg = <0x4000c800 0x400>;
96 interrupts = <18 19>;
97 clocks = <&cmu clk_HFPERCLKUSART2>;
98 status = "disabled";
99 };
100
101 uart0: uart@4000c000 { /* USART0 */
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]102 compatible = "energymicro,efm32-uart";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]103 reg = <0x4000c000 0x400>;
104 interrupts = <3 4>;
105 clocks = <&cmu clk_HFPERCLKUSART0>;
106 status = "disabled";
107 };
108
109 uart1: uart@4000c400 { /* USART1 */
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]110 compatible = "energymicro,efm32-uart";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]111 reg = <0x4000c400 0x400>;
112 interrupts = <15 16>;
113 clocks = <&cmu clk_HFPERCLKUSART1>;
114 status = "disabled";
115 };
116
Uwe Kleine-König64afb242014-03-14 15:51:15 +0100[diff] [blame]117 uart2: uart@4000c800 { /* USART2 */
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]118 compatible = "energymicro,efm32-uart";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]119 reg = <0x4000c800 0x400>;
120 interrupts = <18 19>;
121 clocks = <&cmu clk_HFPERCLKUSART2>;
122 status = "disabled";
123 };
124
125 uart3: uart@4000e000 { /* UART0 */
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]126 compatible = "energymicro,efm32-uart";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]127 reg = <0x4000e000 0x400>;
128 interrupts = <20 21>;
129 clocks = <&cmu clk_HFPERCLKUART0>;
130 status = "disabled";
131 };
132
133 uart4: uart@4000e400 { /* UART1 */
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]134 compatible = "energymicro,efm32-uart";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]135 reg = <0x4000e400 0x400>;
136 interrupts = <22 23>;
137 clocks = <&cmu clk_HFPERCLKUART1>;
138 status = "disabled";
139 };
140
141 timer0: timer@40010000 {
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]142 compatible = "energymicro,efm32-timer";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]143 reg = <0x40010000 0x400>;
144 interrupts = <2>;
145 clocks = <&cmu clk_HFPERCLKTIMER0>;
146 };
147
148 timer1: timer@40010400 {
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]149 compatible = "energymicro,efm32-timer";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]150 reg = <0x40010400 0x400>;
151 interrupts = <12>;
152 clocks = <&cmu clk_HFPERCLKTIMER1>;
153 };
154
155 timer2: timer@40010800 {
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]156 compatible = "energymicro,efm32-timer";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]157 reg = <0x40010800 0x400>;
158 interrupts = <13>;
159 clocks = <&cmu clk_HFPERCLKTIMER2>;
160 };
161
162 timer3: timer@40010c00 {
Uwe Kleine-Königf719a0d2014-03-25 11:27:25 +0100[diff] [blame]163 compatible = "energymicro,efm32-timer";
Uwe Kleine-Königef43eff2013-09-17 21:08:42 +0200[diff] [blame]164 reg = <0x40010c00 0x400>;
165 interrupts = <14>;
166 clocks = <&cmu clk_HFPERCLKTIMER3>;
167 };
168
169 cmu: cmu@400c8000 {
170 compatible = "efm32gg,cmu";
171 reg = <0x400c8000 0x400>;
172 interrupts = <32>;
173 #clock-cells = <1>;
174 };
175 };
176};