blob: d13af8437d1090e2e6ace885fa9201ff35eb95d6 [file] [log] [blame]
Haifeng Yan75a47952014-04-11 12:50:13 +08001/*
2 * Copyright (c) 2013-2014 Linaro Ltd.
3 * Copyright (c) 2013-2014 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
8 */
9
10/dts-v1/;
11#include "hisi-x5hd2.dtsi"
12
13/ {
14 model = "Hisilicon HIX5HD2 Development Board";
15 compatible = "hisilicon,hix5hd2";
16
17 chosen {
Wei Xu14317942015-09-25 18:22:35 +010018 stdout-path = "serial0:115200n8";
Haifeng Yan75a47952014-04-11 12:50:13 +080019 };
20
21 cpus {
22 #address-cells = <1>;
23 #size-cells = <0>;
Haojian Zhuangc2fff852014-07-28 20:14:32 +080024 enable-method = "hisilicon,hix5hd2-smp";
Haifeng Yan75a47952014-04-11 12:50:13 +080025
26 cpu@0 {
27 compatible = "arm,cortex-a9";
28 device_type = "cpu";
29 reg = <0>;
30 next-level-cache = <&l2>;
31 };
32
33 cpu@1 {
34 compatible = "arm,cortex-a9";
35 device_type = "cpu";
36 reg = <1>;
37 next-level-cache = <&l2>;
38 };
39 };
40
41 memory {
42 device_type = "memory";
43 reg = <0x00000000 0x80000000>;
44 };
45};
46
47&timer0 {
48 status = "okay";
49};
50
51&uart0 {
52 status = "okay";
53};
Zhangfei Gao9fb0e6e2014-08-19 11:00:33 +080054
55&gmac0 {
56 #address-cells = <1>;
57 #size-cells = <0>;
58 phy-handle = <&phy2>;
59 phy-mode = "mii";
60 /* Placeholder, overwritten by bootloader */
61 mac-address = [00 00 00 00 00 00];
62 status = "okay";
63
64 phy2: ethernet-phy@2 {
65 reg = <2>;
66 };
67};
68
69&gmac1 {
70 #address-cells = <1>;
71 #size-cells = <0>;
72 phy-handle = <&phy1>;
73 phy-mode = "rgmii";
74 /* Placeholder, overwritten by bootloader */
75 mac-address = [00 00 00 00 00 00];
76 status = "okay";
77
78 phy1: ethernet-phy@1 {
79 reg = <1>;
80 };
81};
Zhangfei Gaoa47f88e2014-08-20 15:14:39 +080082
83&ahci {
84 phys = <&sata_phy>;
85 phy-names = "sata-phy";
86};