Peter Griffin | b16b77a | 2014-11-17 17:48:00 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 STMicroelectronics Limited. |
| 3 | * Author: Peter Griffin <peter.griffin@linaro.org> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * publishhed by the Free Software Foundation. |
| 8 | */ |
| 9 | #include "stih410-clock.dtsi" |
| 10 | #include "stih407-family.dtsi" |
| 11 | #include "stih410-pinctrl.dtsi" |
| 12 | / { |
Fabien Dessenne | 7944450 | 2015-06-16 15:30:00 +0200 | [diff] [blame] | 13 | aliases { |
| 14 | bdisp0 = &bdisp0; |
| 15 | }; |
| 16 | |
Peter Griffin | 9d9f65f | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 17 | soc { |
| 18 | usb2_picophy1: phy2 { |
| 19 | compatible = "st,stih407-usb2-phy"; |
| 20 | #phy-cells = <0>; |
| 21 | st,syscfg = <&syscfg_core 0xf8 0xf4>; |
| 22 | resets = <&softreset STIH407_PICOPHY_SOFTRESET>, |
| 23 | <&picophyreset STIH407_PICOPHY0_RESET>; |
| 24 | reset-names = "global", "port"; |
Maxime Coquelin | b771ae2 | 2015-09-23 19:53:58 +0200 | [diff] [blame] | 25 | |
| 26 | status = "disabled"; |
Peter Griffin | 9d9f65f | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 27 | }; |
Peter Griffin | b16b77a | 2014-11-17 17:48:00 +0100 | [diff] [blame] | 28 | |
Peter Griffin | 9d9f65f | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 29 | usb2_picophy2: phy3 { |
| 30 | compatible = "st,stih407-usb2-phy"; |
| 31 | #phy-cells = <0>; |
| 32 | st,syscfg = <&syscfg_core 0xfc 0xf4>; |
| 33 | resets = <&softreset STIH407_PICOPHY_SOFTRESET>, |
| 34 | <&picophyreset STIH407_PICOPHY1_RESET>; |
| 35 | reset-names = "global", "port"; |
Maxime Coquelin | b771ae2 | 2015-09-23 19:53:58 +0200 | [diff] [blame] | 36 | |
| 37 | status = "disabled"; |
Peter Griffin | 9d9f65f | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 38 | }; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 39 | |
| 40 | ohci0: usb@9a03c00 { |
| 41 | compatible = "st,st-ohci-300x"; |
| 42 | reg = <0x9a03c00 0x100>; |
| 43 | interrupts = <GIC_SPI 180 IRQ_TYPE_NONE>; |
Lee Jones | 7e9d285 | 2016-09-08 11:11:00 +0200 | [diff] [blame] | 44 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, |
| 45 | <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 46 | resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, |
| 47 | <&softreset STIH407_USB2_PORT0_SOFTRESET>; |
| 48 | reset-names = "power", "softreset"; |
| 49 | phys = <&usb2_picophy1>; |
| 50 | phy-names = "usb"; |
Maxime Coquelin | b771ae2 | 2015-09-23 19:53:58 +0200 | [diff] [blame] | 51 | |
| 52 | status = "disabled"; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 53 | }; |
| 54 | |
| 55 | ehci0: usb@9a03e00 { |
| 56 | compatible = "st,st-ehci-300x"; |
| 57 | reg = <0x9a03e00 0x100>; |
| 58 | interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>; |
| 59 | pinctrl-names = "default"; |
| 60 | pinctrl-0 = <&pinctrl_usb0>; |
Lee Jones | 7e9d285 | 2016-09-08 11:11:00 +0200 | [diff] [blame] | 61 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, |
| 62 | <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 63 | resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, |
| 64 | <&softreset STIH407_USB2_PORT0_SOFTRESET>; |
| 65 | reset-names = "power", "softreset"; |
| 66 | phys = <&usb2_picophy1>; |
| 67 | phy-names = "usb"; |
Maxime Coquelin | b771ae2 | 2015-09-23 19:53:58 +0200 | [diff] [blame] | 68 | |
| 69 | status = "disabled"; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 70 | }; |
| 71 | |
| 72 | ohci1: usb@9a83c00 { |
| 73 | compatible = "st,st-ohci-300x"; |
| 74 | reg = <0x9a83c00 0x100>; |
| 75 | interrupts = <GIC_SPI 181 IRQ_TYPE_NONE>; |
Lee Jones | 7e9d285 | 2016-09-08 11:11:00 +0200 | [diff] [blame] | 76 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, |
| 77 | <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 78 | resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, |
| 79 | <&softreset STIH407_USB2_PORT1_SOFTRESET>; |
| 80 | reset-names = "power", "softreset"; |
| 81 | phys = <&usb2_picophy2>; |
| 82 | phy-names = "usb"; |
Maxime Coquelin | b771ae2 | 2015-09-23 19:53:58 +0200 | [diff] [blame] | 83 | |
| 84 | status = "disabled"; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 85 | }; |
| 86 | |
| 87 | ehci1: usb@9a83e00 { |
| 88 | compatible = "st,st-ehci-300x"; |
| 89 | reg = <0x9a83e00 0x100>; |
| 90 | interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>; |
| 91 | pinctrl-names = "default"; |
| 92 | pinctrl-0 = <&pinctrl_usb1>; |
Lee Jones | 7e9d285 | 2016-09-08 11:11:00 +0200 | [diff] [blame] | 93 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, |
| 94 | <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; |
Peter Griffin | a59a4d96 | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 95 | resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, |
| 96 | <&softreset STIH407_USB2_PORT1_SOFTRESET>; |
| 97 | reset-names = "power", "softreset"; |
| 98 | phys = <&usb2_picophy2>; |
| 99 | phy-names = "usb"; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 100 | |
Maxime Coquelin | b771ae2 | 2015-09-23 19:53:58 +0200 | [diff] [blame] | 101 | status = "disabled"; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 102 | }; |
| 103 | |
| 104 | sti-display-subsystem { |
| 105 | compatible = "st,sti-display-subsystem"; |
| 106 | #address-cells = <1>; |
| 107 | #size-cells = <1>; |
| 108 | |
| 109 | assigned-clocks = <&clk_s_d2_quadfs 0>, |
Gabriel Fernandez | 3a74152 | 2016-08-29 14:27:00 +0200 | [diff] [blame] | 110 | <&clk_s_d2_quadfs 1>, |
| 111 | <&clk_s_c0_pll1 0>, |
| 112 | <&clk_s_c0_flexgen CLK_COMPO_DVP>, |
| 113 | <&clk_s_c0_flexgen CLK_MAIN_DISP>, |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 114 | <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, |
| 115 | <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, |
| 116 | <&clk_s_d2_flexgen CLK_PIX_GDP1>, |
| 117 | <&clk_s_d2_flexgen CLK_PIX_GDP2>, |
| 118 | <&clk_s_d2_flexgen CLK_PIX_GDP3>, |
| 119 | <&clk_s_d2_flexgen CLK_PIX_GDP4>; |
| 120 | |
| 121 | assigned-clock-parents = <0>, |
| 122 | <0>, |
Gabriel Fernandez | 3a74152 | 2016-08-29 14:27:00 +0200 | [diff] [blame] | 123 | <0>, |
| 124 | <&clk_s_c0_pll1 0>, |
| 125 | <&clk_s_c0_pll1 0>, |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 126 | <&clk_s_d2_quadfs 0>, |
Gabriel Fernandez | 3a74152 | 2016-08-29 14:27:00 +0200 | [diff] [blame] | 127 | <&clk_s_d2_quadfs 1>, |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 128 | <&clk_s_d2_quadfs 0>, |
| 129 | <&clk_s_d2_quadfs 0>, |
| 130 | <&clk_s_d2_quadfs 0>, |
| 131 | <&clk_s_d2_quadfs 0>; |
| 132 | |
Gabriel Fernandez | 3a74152 | 2016-08-29 14:27:00 +0200 | [diff] [blame] | 133 | assigned-clock-rates = <297000000>, |
| 134 | <108000000>, |
| 135 | <0>, |
| 136 | <400000000>, |
| 137 | <400000000>; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 138 | |
| 139 | ranges; |
| 140 | |
| 141 | sti-compositor@9d11000 { |
| 142 | compatible = "st,stih407-compositor"; |
| 143 | reg = <0x9d11000 0x1000>; |
| 144 | |
| 145 | clock-names = "compo_main", |
| 146 | "compo_aux", |
| 147 | "pix_main", |
| 148 | "pix_aux", |
| 149 | "pix_gdp1", |
| 150 | "pix_gdp2", |
| 151 | "pix_gdp3", |
| 152 | "pix_gdp4", |
| 153 | "main_parent", |
| 154 | "aux_parent"; |
| 155 | |
| 156 | clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>, |
| 157 | <&clk_s_c0_flexgen CLK_COMPO_DVP>, |
| 158 | <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, |
| 159 | <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, |
| 160 | <&clk_s_d2_flexgen CLK_PIX_GDP1>, |
| 161 | <&clk_s_d2_flexgen CLK_PIX_GDP2>, |
| 162 | <&clk_s_d2_flexgen CLK_PIX_GDP3>, |
| 163 | <&clk_s_d2_flexgen CLK_PIX_GDP4>, |
| 164 | <&clk_s_d2_quadfs 0>, |
| 165 | <&clk_s_d2_quadfs 1>; |
| 166 | |
| 167 | reset-names = "compo-main", "compo-aux"; |
| 168 | resets = <&softreset STIH407_COMPO_SOFTRESET>, |
| 169 | <&softreset STIH407_COMPO_SOFTRESET>; |
| 170 | st,vtg = <&vtg_main>, <&vtg_aux>; |
| 171 | }; |
| 172 | |
| 173 | sti-tvout@8d08000 { |
| 174 | compatible = "st,stih407-tvout"; |
| 175 | reg = <0x8d08000 0x1000>; |
| 176 | reg-names = "tvout-reg"; |
| 177 | reset-names = "tvout"; |
| 178 | resets = <&softreset STIH407_HDTVOUT_SOFTRESET>; |
| 179 | #address-cells = <1>; |
| 180 | #size-cells = <1>; |
| 181 | assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, |
| 182 | <&clk_s_d2_flexgen CLK_TMDS_HDMI>, |
| 183 | <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, |
| 184 | <&clk_s_d0_flexgen CLK_PCM_0>, |
| 185 | <&clk_s_d2_flexgen CLK_PIX_HDDAC>, |
| 186 | <&clk_s_d2_flexgen CLK_HDDAC>; |
| 187 | |
| 188 | assigned-clock-parents = <&clk_s_d2_quadfs 0>, |
| 189 | <&clk_tmdsout_hdmi>, |
| 190 | <&clk_s_d2_quadfs 0>, |
| 191 | <&clk_s_d0_quadfs 0>, |
| 192 | <&clk_s_d2_quadfs 0>, |
| 193 | <&clk_s_d2_quadfs 0>; |
Benjamin Gaignard | 79a313f | 2015-09-23 21:48:03 +0200 | [diff] [blame] | 194 | }; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 195 | |
Benjamin Gaignard | 79a313f | 2015-09-23 21:48:03 +0200 | [diff] [blame] | 196 | sti-hdmi@8d04000 { |
| 197 | compatible = "st,stih407-hdmi"; |
| 198 | reg = <0x8d04000 0x1000>; |
| 199 | reg-names = "hdmi-reg"; |
| 200 | interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>; |
| 201 | interrupt-names = "irq"; |
| 202 | clock-names = "pix", |
| 203 | "tmds", |
| 204 | "phy", |
| 205 | "audio", |
| 206 | "main_parent", |
| 207 | "aux_parent"; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 208 | |
Benjamin Gaignard | 79a313f | 2015-09-23 21:48:03 +0200 | [diff] [blame] | 209 | clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, |
| 210 | <&clk_s_d2_flexgen CLK_TMDS_HDMI>, |
| 211 | <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, |
| 212 | <&clk_s_d0_flexgen CLK_PCM_0>, |
| 213 | <&clk_s_d2_quadfs 0>, |
| 214 | <&clk_s_d2_quadfs 1>; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 215 | |
Benjamin Gaignard | 79a313f | 2015-09-23 21:48:03 +0200 | [diff] [blame] | 216 | hdmi,hpd-gpio = <&pio5 3>; |
| 217 | reset-names = "hdmi"; |
| 218 | resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; |
| 219 | ddc = <&hdmiddc>; |
| 220 | }; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 221 | |
Benjamin Gaignard | 79a313f | 2015-09-23 21:48:03 +0200 | [diff] [blame] | 222 | sti-hda@8d02000 { |
| 223 | compatible = "st,stih407-hda"; |
| 224 | reg = <0x8d02000 0x400>, <0x92b0120 0x4>; |
| 225 | reg-names = "hda-reg", "video-dacs-ctrl"; |
| 226 | clock-names = "pix", |
| 227 | "hddac", |
| 228 | "main_parent", |
| 229 | "aux_parent"; |
| 230 | clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, |
| 231 | <&clk_s_d2_flexgen CLK_HDDAC>, |
| 232 | <&clk_s_d2_quadfs 0>, |
| 233 | <&clk_s_d2_quadfs 1>; |
Gabriel FERNANDEZ | 956b42d | 2015-01-14 16:47:00 +0100 | [diff] [blame] | 234 | }; |
| 235 | }; |
Fabien Dessenne | 7944450 | 2015-06-16 15:30:00 +0200 | [diff] [blame] | 236 | |
| 237 | bdisp0:bdisp@9f10000 { |
| 238 | compatible = "st,stih407-bdisp"; |
| 239 | reg = <0x9f10000 0x1000>; |
| 240 | interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>; |
| 241 | clock-names = "bdisp"; |
| 242 | clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>; |
| 243 | }; |
Patrice Chotard | 70bc0f3 | 2016-08-15 14:17:00 +0200 | [diff] [blame] | 244 | |
Jean-Christophe Trotin | 390aafe | 2016-07-25 09:57:30 +0200 | [diff] [blame] | 245 | hva@8c85000 { |
| 246 | compatible = "st,st-hva"; |
| 247 | reg = <0x8c85000 0x400>, <0x6000000 0x40000>; |
| 248 | reg-names = "hva_registers", "hva_esram"; |
| 249 | interrupts = <GIC_SPI 58 IRQ_TYPE_NONE>, |
| 250 | <GIC_SPI 59 IRQ_TYPE_NONE>; |
| 251 | clock-names = "clk_hva"; |
| 252 | clocks = <&clk_s_c0_flexgen CLK_HVA>; |
| 253 | }; |
| 254 | |
Patrice Chotard | 70bc0f3 | 2016-08-15 14:17:00 +0200 | [diff] [blame] | 255 | thermal@91a0000 { |
| 256 | compatible = "st,stih407-thermal"; |
| 257 | reg = <0x91a0000 0x28>; |
| 258 | clock-names = "thermal"; |
| 259 | clocks = <&clk_sysin>; |
| 260 | interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>; |
| 261 | }; |
Peter Griffin | 9d9f65f | 2015-01-07 16:04:00 +0100 | [diff] [blame] | 262 | }; |
Peter Griffin | b16b77a | 2014-11-17 17:48:00 +0100 | [diff] [blame] | 263 | }; |