Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Register interface file for Samsung Camera Interface (FIMC) driver |
| 3 | * |
| 4 | * Copyright (c) 2010 Samsung Electronics |
| 5 | * |
| 6 | * Sylwester Nawrocki, s.nawrocki@samsung.com |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/io.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include <mach/map.h> |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 16 | #include <media/s5p_fimc.h> |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 17 | |
| 18 | #include "fimc-core.h" |
| 19 | |
| 20 | |
| 21 | void fimc_hw_reset(struct fimc_dev *dev) |
| 22 | { |
| 23 | u32 cfg; |
| 24 | |
| 25 | cfg = readl(dev->regs + S5P_CISRCFMT); |
| 26 | cfg |= S5P_CISRCFMT_ITU601_8BIT; |
| 27 | writel(cfg, dev->regs + S5P_CISRCFMT); |
| 28 | |
| 29 | /* Software reset. */ |
| 30 | cfg = readl(dev->regs + S5P_CIGCTRL); |
| 31 | cfg |= (S5P_CIGCTRL_SWRST | S5P_CIGCTRL_IRQ_LEVEL); |
| 32 | writel(cfg, dev->regs + S5P_CIGCTRL); |
Sylwester Nawrocki | e9e2108 | 2011-09-02 06:25:32 -0300 | [diff] [blame] | 33 | udelay(10); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 34 | |
| 35 | cfg = readl(dev->regs + S5P_CIGCTRL); |
| 36 | cfg &= ~S5P_CIGCTRL_SWRST; |
| 37 | writel(cfg, dev->regs + S5P_CIGCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 38 | } |
| 39 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 40 | static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 41 | { |
| 42 | u32 flip = S5P_MSCTRL_FLIP_NORMAL; |
| 43 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 44 | switch (ctx->flip) { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 45 | case FLIP_X_AXIS: |
| 46 | flip = S5P_MSCTRL_FLIP_X_MIRROR; |
| 47 | break; |
| 48 | case FLIP_Y_AXIS: |
| 49 | flip = S5P_MSCTRL_FLIP_Y_MIRROR; |
| 50 | break; |
| 51 | case FLIP_XY_AXIS: |
| 52 | flip = S5P_MSCTRL_FLIP_180; |
| 53 | break; |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 54 | default: |
| 55 | break; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 56 | } |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 57 | if (ctx->rotation <= 90) |
| 58 | return flip; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 59 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 60 | return (flip ^ S5P_MSCTRL_FLIP_180) & S5P_MSCTRL_FLIP_180; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 61 | } |
| 62 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 63 | static u32 fimc_hw_get_target_flip(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 64 | { |
| 65 | u32 flip = S5P_CITRGFMT_FLIP_NORMAL; |
| 66 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 67 | switch (ctx->flip) { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 68 | case FLIP_X_AXIS: |
| 69 | flip = S5P_CITRGFMT_FLIP_X_MIRROR; |
| 70 | break; |
| 71 | case FLIP_Y_AXIS: |
| 72 | flip = S5P_CITRGFMT_FLIP_Y_MIRROR; |
| 73 | break; |
| 74 | case FLIP_XY_AXIS: |
| 75 | flip = S5P_CITRGFMT_FLIP_180; |
| 76 | break; |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 77 | default: |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 78 | break; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 79 | } |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 80 | if (ctx->rotation <= 90) |
| 81 | return flip; |
| 82 | |
| 83 | return (flip ^ S5P_CITRGFMT_FLIP_180) & S5P_CITRGFMT_FLIP_180; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 84 | } |
| 85 | |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 86 | void fimc_hw_set_rotation(struct fimc_ctx *ctx) |
| 87 | { |
| 88 | u32 cfg, flip; |
| 89 | struct fimc_dev *dev = ctx->fimc_dev; |
| 90 | |
| 91 | cfg = readl(dev->regs + S5P_CITRGFMT); |
| 92 | cfg &= ~(S5P_CITRGFMT_INROT90 | S5P_CITRGFMT_OUTROT90 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 93 | S5P_CITRGFMT_FLIP_180); |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 94 | |
| 95 | /* |
| 96 | * The input and output rotator cannot work simultaneously. |
| 97 | * Use the output rotator in output DMA mode or the input rotator |
| 98 | * in direct fifo output mode. |
| 99 | */ |
| 100 | if (ctx->rotation == 90 || ctx->rotation == 270) { |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 101 | if (ctx->out_path == FIMC_LCDFIFO) |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 102 | cfg |= S5P_CITRGFMT_INROT90; |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 103 | else |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 104 | cfg |= S5P_CITRGFMT_OUTROT90; |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 105 | } |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 106 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 107 | if (ctx->out_path == FIMC_DMA) { |
| 108 | cfg |= fimc_hw_get_target_flip(ctx); |
| 109 | writel(cfg, dev->regs + S5P_CITRGFMT); |
| 110 | } else { |
| 111 | /* LCD FIFO path */ |
| 112 | flip = readl(dev->regs + S5P_MSCTRL); |
| 113 | flip &= ~S5P_MSCTRL_FLIP_MASK; |
| 114 | flip |= fimc_hw_get_in_flip(ctx); |
| 115 | writel(flip, dev->regs + S5P_MSCTRL); |
| 116 | } |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 117 | } |
| 118 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 119 | void fimc_hw_set_target_format(struct fimc_ctx *ctx) |
| 120 | { |
| 121 | u32 cfg; |
| 122 | struct fimc_dev *dev = ctx->fimc_dev; |
| 123 | struct fimc_frame *frame = &ctx->d_frame; |
| 124 | |
| 125 | dbg("w= %d, h= %d color: %d", frame->width, |
| 126 | frame->height, frame->fmt->color); |
| 127 | |
| 128 | cfg = readl(dev->regs + S5P_CITRGFMT); |
| 129 | cfg &= ~(S5P_CITRGFMT_FMT_MASK | S5P_CITRGFMT_HSIZE_MASK | |
| 130 | S5P_CITRGFMT_VSIZE_MASK); |
| 131 | |
| 132 | switch (frame->fmt->color) { |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 133 | case S5P_FIMC_RGB565...S5P_FIMC_RGB888: |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 134 | cfg |= S5P_CITRGFMT_RGB; |
| 135 | break; |
| 136 | case S5P_FIMC_YCBCR420: |
| 137 | cfg |= S5P_CITRGFMT_YCBCR420; |
| 138 | break; |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 139 | case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422: |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 140 | if (frame->fmt->colplanes == 1) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 141 | cfg |= S5P_CITRGFMT_YCBCR422_1P; |
| 142 | else |
| 143 | cfg |= S5P_CITRGFMT_YCBCR422; |
| 144 | break; |
| 145 | default: |
| 146 | break; |
| 147 | } |
| 148 | |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 149 | if (ctx->rotation == 90 || ctx->rotation == 270) { |
| 150 | cfg |= S5P_CITRGFMT_HSIZE(frame->height); |
| 151 | cfg |= S5P_CITRGFMT_VSIZE(frame->width); |
| 152 | } else { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 153 | |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 154 | cfg |= S5P_CITRGFMT_HSIZE(frame->width); |
| 155 | cfg |= S5P_CITRGFMT_VSIZE(frame->height); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 156 | } |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 157 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 158 | writel(cfg, dev->regs + S5P_CITRGFMT); |
| 159 | |
| 160 | cfg = readl(dev->regs + S5P_CITAREA) & ~S5P_CITAREA_MASK; |
| 161 | cfg |= (frame->width * frame->height); |
| 162 | writel(cfg, dev->regs + S5P_CITAREA); |
| 163 | } |
| 164 | |
| 165 | static void fimc_hw_set_out_dma_size(struct fimc_ctx *ctx) |
| 166 | { |
| 167 | struct fimc_dev *dev = ctx->fimc_dev; |
| 168 | struct fimc_frame *frame = &ctx->d_frame; |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 169 | u32 cfg; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 170 | |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 171 | cfg = S5P_ORIG_SIZE_HOR(frame->f_width); |
| 172 | cfg |= S5P_ORIG_SIZE_VER(frame->f_height); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 173 | writel(cfg, dev->regs + S5P_ORGOSIZE); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 174 | |
| 175 | /* Select color space conversion equation (HD/SD size).*/ |
| 176 | cfg = readl(dev->regs + S5P_CIGCTRL); |
| 177 | if (frame->f_width >= 1280) /* HD */ |
| 178 | cfg |= S5P_CIGCTRL_CSC_ITU601_709; |
| 179 | else /* SD */ |
| 180 | cfg &= ~S5P_CIGCTRL_CSC_ITU601_709; |
| 181 | writel(cfg, dev->regs + S5P_CIGCTRL); |
| 182 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 183 | } |
| 184 | |
| 185 | void fimc_hw_set_out_dma(struct fimc_ctx *ctx) |
| 186 | { |
| 187 | u32 cfg; |
| 188 | struct fimc_dev *dev = ctx->fimc_dev; |
| 189 | struct fimc_frame *frame = &ctx->d_frame; |
| 190 | struct fimc_dma_offset *offset = &frame->dma_offset; |
| 191 | |
| 192 | /* Set the input dma offsets. */ |
| 193 | cfg = 0; |
| 194 | cfg |= S5P_CIO_OFFS_HOR(offset->y_h); |
| 195 | cfg |= S5P_CIO_OFFS_VER(offset->y_v); |
| 196 | writel(cfg, dev->regs + S5P_CIOYOFF); |
| 197 | |
| 198 | cfg = 0; |
| 199 | cfg |= S5P_CIO_OFFS_HOR(offset->cb_h); |
| 200 | cfg |= S5P_CIO_OFFS_VER(offset->cb_v); |
| 201 | writel(cfg, dev->regs + S5P_CIOCBOFF); |
| 202 | |
| 203 | cfg = 0; |
| 204 | cfg |= S5P_CIO_OFFS_HOR(offset->cr_h); |
| 205 | cfg |= S5P_CIO_OFFS_VER(offset->cr_v); |
| 206 | writel(cfg, dev->regs + S5P_CIOCROFF); |
| 207 | |
| 208 | fimc_hw_set_out_dma_size(ctx); |
| 209 | |
| 210 | /* Configure chroma components order. */ |
| 211 | cfg = readl(dev->regs + S5P_CIOCTRL); |
| 212 | |
| 213 | cfg &= ~(S5P_CIOCTRL_ORDER2P_MASK | S5P_CIOCTRL_ORDER422_MASK | |
| 214 | S5P_CIOCTRL_YCBCR_PLANE_MASK); |
| 215 | |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 216 | if (frame->fmt->colplanes == 1) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 217 | cfg |= ctx->out_order_1p; |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 218 | else if (frame->fmt->colplanes == 2) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 219 | cfg |= ctx->out_order_2p | S5P_CIOCTRL_YCBCR_2PLANE; |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 220 | else if (frame->fmt->colplanes == 3) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 221 | cfg |= S5P_CIOCTRL_YCBCR_3PLANE; |
| 222 | |
| 223 | writel(cfg, dev->regs + S5P_CIOCTRL); |
| 224 | } |
| 225 | |
| 226 | static void fimc_hw_en_autoload(struct fimc_dev *dev, int enable) |
| 227 | { |
| 228 | u32 cfg = readl(dev->regs + S5P_ORGISIZE); |
| 229 | if (enable) |
| 230 | cfg |= S5P_CIREAL_ISIZE_AUTOLOAD_EN; |
| 231 | else |
| 232 | cfg &= ~S5P_CIREAL_ISIZE_AUTOLOAD_EN; |
| 233 | writel(cfg, dev->regs + S5P_ORGISIZE); |
| 234 | } |
| 235 | |
| 236 | void fimc_hw_en_lastirq(struct fimc_dev *dev, int enable) |
| 237 | { |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 238 | u32 cfg = readl(dev->regs + S5P_CIOCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 239 | if (enable) |
| 240 | cfg |= S5P_CIOCTRL_LASTIRQ_ENABLE; |
| 241 | else |
| 242 | cfg &= ~S5P_CIOCTRL_LASTIRQ_ENABLE; |
| 243 | writel(cfg, dev->regs + S5P_CIOCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 244 | } |
| 245 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 246 | void fimc_hw_set_prescaler(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 247 | { |
| 248 | struct fimc_dev *dev = ctx->fimc_dev; |
| 249 | struct fimc_scaler *sc = &ctx->scaler; |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 250 | u32 cfg, shfactor; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 251 | |
| 252 | shfactor = 10 - (sc->hfactor + sc->vfactor); |
| 253 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 254 | cfg = S5P_CISCPRERATIO_SHFACTOR(shfactor); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 255 | cfg |= S5P_CISCPRERATIO_HOR(sc->pre_hratio); |
| 256 | cfg |= S5P_CISCPRERATIO_VER(sc->pre_vratio); |
| 257 | writel(cfg, dev->regs + S5P_CISCPRERATIO); |
| 258 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 259 | cfg = S5P_CISCPREDST_WIDTH(sc->pre_dst_width); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 260 | cfg |= S5P_CISCPREDST_HEIGHT(sc->pre_dst_height); |
| 261 | writel(cfg, dev->regs + S5P_CISCPREDST); |
| 262 | } |
| 263 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 264 | static void fimc_hw_set_scaler(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 265 | { |
| 266 | struct fimc_dev *dev = ctx->fimc_dev; |
| 267 | struct fimc_scaler *sc = &ctx->scaler; |
| 268 | struct fimc_frame *src_frame = &ctx->s_frame; |
| 269 | struct fimc_frame *dst_frame = &ctx->d_frame; |
| 270 | u32 cfg = 0; |
| 271 | |
| 272 | if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW)) |
| 273 | cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE); |
| 274 | |
| 275 | if (!sc->enabled) |
| 276 | cfg |= S5P_CISCCTRL_SCALERBYPASS; |
| 277 | |
| 278 | if (sc->scaleup_h) |
| 279 | cfg |= S5P_CISCCTRL_SCALEUP_H; |
| 280 | |
| 281 | if (sc->scaleup_v) |
| 282 | cfg |= S5P_CISCCTRL_SCALEUP_V; |
| 283 | |
| 284 | if (sc->copy_mode) |
| 285 | cfg |= S5P_CISCCTRL_ONE2ONE; |
| 286 | |
| 287 | |
| 288 | if (ctx->in_path == FIMC_DMA) { |
| 289 | if (src_frame->fmt->color == S5P_FIMC_RGB565) |
| 290 | cfg |= S5P_CISCCTRL_INRGB_FMT_RGB565; |
| 291 | else if (src_frame->fmt->color == S5P_FIMC_RGB666) |
| 292 | cfg |= S5P_CISCCTRL_INRGB_FMT_RGB666; |
| 293 | else if (src_frame->fmt->color == S5P_FIMC_RGB888) |
| 294 | cfg |= S5P_CISCCTRL_INRGB_FMT_RGB888; |
| 295 | } |
| 296 | |
| 297 | if (ctx->out_path == FIMC_DMA) { |
| 298 | if (dst_frame->fmt->color == S5P_FIMC_RGB565) |
| 299 | cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB565; |
| 300 | else if (dst_frame->fmt->color == S5P_FIMC_RGB666) |
| 301 | cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB666; |
| 302 | else if (dst_frame->fmt->color == S5P_FIMC_RGB888) |
| 303 | cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888; |
| 304 | } else { |
| 305 | cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888; |
| 306 | |
| 307 | if (ctx->flags & FIMC_SCAN_MODE_INTERLACED) |
| 308 | cfg |= S5P_CISCCTRL_INTERLACE; |
| 309 | } |
| 310 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 311 | writel(cfg, dev->regs + S5P_CISCCTRL); |
| 312 | } |
| 313 | |
| 314 | void fimc_hw_set_mainscaler(struct fimc_ctx *ctx) |
| 315 | { |
| 316 | struct fimc_dev *dev = ctx->fimc_dev; |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 317 | struct samsung_fimc_variant *variant = dev->variant; |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 318 | struct fimc_scaler *sc = &ctx->scaler; |
| 319 | u32 cfg; |
| 320 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 321 | dbg("main_hratio= 0x%X main_vratio= 0x%X", |
| 322 | sc->main_hratio, sc->main_vratio); |
| 323 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 324 | fimc_hw_set_scaler(ctx); |
| 325 | |
| 326 | cfg = readl(dev->regs + S5P_CISCCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 327 | |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 328 | if (variant->has_mainscaler_ext) { |
| 329 | cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); |
| 330 | cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc->main_hratio); |
| 331 | cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc->main_vratio); |
| 332 | writel(cfg, dev->regs + S5P_CISCCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 333 | |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 334 | cfg = readl(dev->regs + S5P_CIEXTEN); |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 335 | |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 336 | cfg &= ~(S5P_CIEXTEN_MVRATIO_EXT_MASK | |
| 337 | S5P_CIEXTEN_MHRATIO_EXT_MASK); |
| 338 | cfg |= S5P_CIEXTEN_MHRATIO_EXT(sc->main_hratio); |
| 339 | cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc->main_vratio); |
| 340 | writel(cfg, dev->regs + S5P_CIEXTEN); |
| 341 | } else { |
| 342 | cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); |
| 343 | cfg |= S5P_CISCCTRL_MHRATIO(sc->main_hratio); |
| 344 | cfg |= S5P_CISCCTRL_MVRATIO(sc->main_vratio); |
| 345 | writel(cfg, dev->regs + S5P_CISCCTRL); |
| 346 | } |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 347 | } |
| 348 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 349 | void fimc_hw_en_capture(struct fimc_ctx *ctx) |
| 350 | { |
| 351 | struct fimc_dev *dev = ctx->fimc_dev; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 352 | |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 353 | u32 cfg = readl(dev->regs + S5P_CIIMGCPT); |
| 354 | |
| 355 | if (ctx->out_path == FIMC_DMA) { |
| 356 | /* one shot mode */ |
| 357 | cfg |= S5P_CIIMGCPT_CPT_FREN_ENABLE | S5P_CIIMGCPT_IMGCPTEN; |
| 358 | } else { |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 359 | /* Continuous frame capture mode (freerun). */ |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 360 | cfg &= ~(S5P_CIIMGCPT_CPT_FREN_ENABLE | |
| 361 | S5P_CIIMGCPT_CPT_FRMOD_CNT); |
| 362 | cfg |= S5P_CIIMGCPT_IMGCPTEN; |
| 363 | } |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 364 | |
| 365 | if (ctx->scaler.enabled) |
| 366 | cfg |= S5P_CIIMGCPT_IMGCPTEN_SC; |
| 367 | |
| 368 | writel(cfg | S5P_CIIMGCPT_IMGCPTEN, dev->regs + S5P_CIIMGCPT); |
| 369 | } |
| 370 | |
| 371 | void fimc_hw_set_effect(struct fimc_ctx *ctx) |
| 372 | { |
| 373 | struct fimc_dev *dev = ctx->fimc_dev; |
| 374 | struct fimc_effect *effect = &ctx->effect; |
| 375 | u32 cfg = (S5P_CIIMGEFF_IE_ENABLE | S5P_CIIMGEFF_IE_SC_AFTER); |
| 376 | |
| 377 | cfg |= effect->type; |
| 378 | |
| 379 | if (effect->type == S5P_FIMC_EFFECT_ARBITRARY) { |
| 380 | cfg |= S5P_CIIMGEFF_PAT_CB(effect->pat_cb); |
| 381 | cfg |= S5P_CIIMGEFF_PAT_CR(effect->pat_cr); |
| 382 | } |
| 383 | |
| 384 | writel(cfg, dev->regs + S5P_CIIMGEFF); |
| 385 | } |
| 386 | |
| 387 | static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx) |
| 388 | { |
| 389 | struct fimc_dev *dev = ctx->fimc_dev; |
| 390 | struct fimc_frame *frame = &ctx->s_frame; |
| 391 | u32 cfg_o = 0; |
| 392 | u32 cfg_r = 0; |
| 393 | |
| 394 | if (FIMC_LCDFIFO == ctx->out_path) |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 395 | cfg_r |= S5P_CIREAL_ISIZE_AUTOLOAD_EN; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 396 | |
| 397 | cfg_o |= S5P_ORIG_SIZE_HOR(frame->f_width); |
| 398 | cfg_o |= S5P_ORIG_SIZE_VER(frame->f_height); |
| 399 | cfg_r |= S5P_CIREAL_ISIZE_WIDTH(frame->width); |
| 400 | cfg_r |= S5P_CIREAL_ISIZE_HEIGHT(frame->height); |
| 401 | |
| 402 | writel(cfg_o, dev->regs + S5P_ORGISIZE); |
| 403 | writel(cfg_r, dev->regs + S5P_CIREAL_ISIZE); |
| 404 | } |
| 405 | |
| 406 | void fimc_hw_set_in_dma(struct fimc_ctx *ctx) |
| 407 | { |
| 408 | struct fimc_dev *dev = ctx->fimc_dev; |
| 409 | struct fimc_frame *frame = &ctx->s_frame; |
| 410 | struct fimc_dma_offset *offset = &frame->dma_offset; |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 411 | u32 cfg; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 412 | |
| 413 | /* Set the pixel offsets. */ |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 414 | cfg = S5P_CIO_OFFS_HOR(offset->y_h); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 415 | cfg |= S5P_CIO_OFFS_VER(offset->y_v); |
| 416 | writel(cfg, dev->regs + S5P_CIIYOFF); |
| 417 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 418 | cfg = S5P_CIO_OFFS_HOR(offset->cb_h); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 419 | cfg |= S5P_CIO_OFFS_VER(offset->cb_v); |
| 420 | writel(cfg, dev->regs + S5P_CIICBOFF); |
| 421 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 422 | cfg = S5P_CIO_OFFS_HOR(offset->cr_h); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 423 | cfg |= S5P_CIO_OFFS_VER(offset->cr_v); |
| 424 | writel(cfg, dev->regs + S5P_CIICROFF); |
| 425 | |
| 426 | /* Input original and real size. */ |
| 427 | fimc_hw_set_in_dma_size(ctx); |
| 428 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 429 | /* Use DMA autoload only in FIFO mode. */ |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 430 | fimc_hw_en_autoload(dev, ctx->out_path == FIMC_LCDFIFO); |
| 431 | |
| 432 | /* Set the input DMA to process single frame only. */ |
| 433 | cfg = readl(dev->regs + S5P_MSCTRL); |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 434 | cfg &= ~(S5P_MSCTRL_INFORMAT_MASK |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 435 | | S5P_MSCTRL_IN_BURST_COUNT_MASK |
| 436 | | S5P_MSCTRL_INPUT_MASK |
| 437 | | S5P_MSCTRL_C_INT_IN_MASK |
| 438 | | S5P_MSCTRL_2P_IN_ORDER_MASK); |
| 439 | |
Hyunwoong Kim | 5bbe425e | 2010-12-29 07:08:32 -0300 | [diff] [blame] | 440 | cfg |= (S5P_MSCTRL_IN_BURST_COUNT(4) |
| 441 | | S5P_MSCTRL_INPUT_MEMORY |
| 442 | | S5P_MSCTRL_FIFO_CTRL_FULL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 443 | |
| 444 | switch (frame->fmt->color) { |
Sylwester Nawrocki | d9160af | 2010-12-08 12:48:23 -0300 | [diff] [blame] | 445 | case S5P_FIMC_RGB565...S5P_FIMC_RGB888: |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 446 | cfg |= S5P_MSCTRL_INFORMAT_RGB; |
| 447 | break; |
| 448 | case S5P_FIMC_YCBCR420: |
| 449 | cfg |= S5P_MSCTRL_INFORMAT_YCBCR420; |
| 450 | |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 451 | if (frame->fmt->colplanes == 2) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 452 | cfg |= ctx->in_order_2p | S5P_MSCTRL_C_INT_IN_2PLANE; |
| 453 | else |
| 454 | cfg |= S5P_MSCTRL_C_INT_IN_3PLANE; |
| 455 | |
| 456 | break; |
Sylwester Nawrocki | d9160af | 2010-12-08 12:48:23 -0300 | [diff] [blame] | 457 | case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422: |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 458 | if (frame->fmt->colplanes == 1) { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 459 | cfg |= ctx->in_order_1p |
| 460 | | S5P_MSCTRL_INFORMAT_YCBCR422_1P; |
| 461 | } else { |
| 462 | cfg |= S5P_MSCTRL_INFORMAT_YCBCR422; |
| 463 | |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 464 | if (frame->fmt->colplanes == 2) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 465 | cfg |= ctx->in_order_2p |
| 466 | | S5P_MSCTRL_C_INT_IN_2PLANE; |
| 467 | else |
| 468 | cfg |= S5P_MSCTRL_C_INT_IN_3PLANE; |
| 469 | } |
| 470 | break; |
| 471 | default: |
| 472 | break; |
| 473 | } |
| 474 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 475 | writel(cfg, dev->regs + S5P_MSCTRL); |
| 476 | |
| 477 | /* Input/output DMA linear/tiled mode. */ |
| 478 | cfg = readl(dev->regs + S5P_CIDMAPARAM); |
| 479 | cfg &= ~S5P_CIDMAPARAM_TILE_MASK; |
| 480 | |
| 481 | if (tiled_fmt(ctx->s_frame.fmt)) |
| 482 | cfg |= S5P_CIDMAPARAM_R_64X32; |
| 483 | |
| 484 | if (tiled_fmt(ctx->d_frame.fmt)) |
| 485 | cfg |= S5P_CIDMAPARAM_W_64X32; |
| 486 | |
| 487 | writel(cfg, dev->regs + S5P_CIDMAPARAM); |
| 488 | } |
| 489 | |
| 490 | |
| 491 | void fimc_hw_set_input_path(struct fimc_ctx *ctx) |
| 492 | { |
| 493 | struct fimc_dev *dev = ctx->fimc_dev; |
| 494 | |
| 495 | u32 cfg = readl(dev->regs + S5P_MSCTRL); |
| 496 | cfg &= ~S5P_MSCTRL_INPUT_MASK; |
| 497 | |
| 498 | if (ctx->in_path == FIMC_DMA) |
| 499 | cfg |= S5P_MSCTRL_INPUT_MEMORY; |
| 500 | else |
| 501 | cfg |= S5P_MSCTRL_INPUT_EXTCAM; |
| 502 | |
| 503 | writel(cfg, dev->regs + S5P_MSCTRL); |
| 504 | } |
| 505 | |
| 506 | void fimc_hw_set_output_path(struct fimc_ctx *ctx) |
| 507 | { |
| 508 | struct fimc_dev *dev = ctx->fimc_dev; |
| 509 | |
| 510 | u32 cfg = readl(dev->regs + S5P_CISCCTRL); |
| 511 | cfg &= ~S5P_CISCCTRL_LCDPATHEN_FIFO; |
| 512 | if (ctx->out_path == FIMC_LCDFIFO) |
| 513 | cfg |= S5P_CISCCTRL_LCDPATHEN_FIFO; |
| 514 | writel(cfg, dev->regs + S5P_CISCCTRL); |
| 515 | } |
| 516 | |
| 517 | void fimc_hw_set_input_addr(struct fimc_dev *dev, struct fimc_addr *paddr) |
| 518 | { |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 519 | u32 cfg = readl(dev->regs + S5P_CIREAL_ISIZE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 520 | cfg |= S5P_CIREAL_ISIZE_ADDR_CH_DIS; |
| 521 | writel(cfg, dev->regs + S5P_CIREAL_ISIZE); |
| 522 | |
Sylwester Nawrocki | 77e6208 | 2010-09-28 05:49:11 -0300 | [diff] [blame] | 523 | writel(paddr->y, dev->regs + S5P_CIIYSA(0)); |
| 524 | writel(paddr->cb, dev->regs + S5P_CIICBSA(0)); |
| 525 | writel(paddr->cr, dev->regs + S5P_CIICRSA(0)); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 526 | |
| 527 | cfg &= ~S5P_CIREAL_ISIZE_ADDR_CH_DIS; |
| 528 | writel(cfg, dev->regs + S5P_CIREAL_ISIZE); |
| 529 | } |
| 530 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 531 | void fimc_hw_set_output_addr(struct fimc_dev *dev, |
| 532 | struct fimc_addr *paddr, int index) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 533 | { |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 534 | int i = (index == -1) ? 0 : index; |
| 535 | do { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 536 | writel(paddr->y, dev->regs + S5P_CIOYSA(i)); |
| 537 | writel(paddr->cb, dev->regs + S5P_CIOCBSA(i)); |
| 538 | writel(paddr->cr, dev->regs + S5P_CIOCRSA(i)); |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 539 | dbg("dst_buf[%d]: 0x%X, cb: 0x%X, cr: 0x%X", |
| 540 | i, paddr->y, paddr->cb, paddr->cr); |
| 541 | } while (index == -1 && ++i < FIMC_MAX_OUT_BUFS); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 542 | } |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 543 | |
| 544 | int fimc_hw_set_camera_polarity(struct fimc_dev *fimc, |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 545 | struct s5p_fimc_isp_info *cam) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 546 | { |
| 547 | u32 cfg = readl(fimc->regs + S5P_CIGCTRL); |
| 548 | |
| 549 | cfg &= ~(S5P_CIGCTRL_INVPOLPCLK | S5P_CIGCTRL_INVPOLVSYNC | |
| 550 | S5P_CIGCTRL_INVPOLHREF | S5P_CIGCTRL_INVPOLHSYNC); |
| 551 | |
| 552 | if (cam->flags & FIMC_CLK_INV_PCLK) |
| 553 | cfg |= S5P_CIGCTRL_INVPOLPCLK; |
| 554 | |
| 555 | if (cam->flags & FIMC_CLK_INV_VSYNC) |
| 556 | cfg |= S5P_CIGCTRL_INVPOLVSYNC; |
| 557 | |
| 558 | if (cam->flags & FIMC_CLK_INV_HREF) |
| 559 | cfg |= S5P_CIGCTRL_INVPOLHREF; |
| 560 | |
| 561 | if (cam->flags & FIMC_CLK_INV_HSYNC) |
| 562 | cfg |= S5P_CIGCTRL_INVPOLHSYNC; |
| 563 | |
| 564 | writel(cfg, fimc->regs + S5P_CIGCTRL); |
| 565 | |
| 566 | return 0; |
| 567 | } |
| 568 | |
| 569 | int fimc_hw_set_camera_source(struct fimc_dev *fimc, |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 570 | struct s5p_fimc_isp_info *cam) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 571 | { |
| 572 | struct fimc_frame *f = &fimc->vid_cap.ctx->s_frame; |
| 573 | u32 cfg = 0; |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 574 | u32 bus_width; |
| 575 | int i; |
| 576 | |
| 577 | static const struct { |
| 578 | u32 pixelcode; |
| 579 | u32 cisrcfmt; |
| 580 | u16 bus_width; |
| 581 | } pix_desc[] = { |
| 582 | { V4L2_MBUS_FMT_YUYV8_2X8, S5P_CISRCFMT_ORDER422_YCBYCR, 8 }, |
| 583 | { V4L2_MBUS_FMT_YVYU8_2X8, S5P_CISRCFMT_ORDER422_YCRYCB, 8 }, |
| 584 | { V4L2_MBUS_FMT_VYUY8_2X8, S5P_CISRCFMT_ORDER422_CRYCBY, 8 }, |
| 585 | { V4L2_MBUS_FMT_UYVY8_2X8, S5P_CISRCFMT_ORDER422_CBYCRY, 8 }, |
| 586 | /* TODO: Add pixel codes for 16-bit bus width */ |
| 587 | }; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 588 | |
| 589 | if (cam->bus_type == FIMC_ITU_601 || cam->bus_type == FIMC_ITU_656) { |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 590 | for (i = 0; i < ARRAY_SIZE(pix_desc); i++) { |
| 591 | if (fimc->vid_cap.fmt.code == pix_desc[i].pixelcode) { |
| 592 | cfg = pix_desc[i].cisrcfmt; |
| 593 | bus_width = pix_desc[i].bus_width; |
| 594 | break; |
| 595 | } |
| 596 | } |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 597 | |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 598 | if (i == ARRAY_SIZE(pix_desc)) { |
Sylwester Nawrocki | 30c9939 | 2011-06-10 15:36:48 -0300 | [diff] [blame^] | 599 | v4l2_err(fimc->vid_cap.vfd, |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 600 | "Camera color format not supported: %d\n", |
| 601 | fimc->vid_cap.fmt.code); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 602 | return -EINVAL; |
| 603 | } |
| 604 | |
| 605 | if (cam->bus_type == FIMC_ITU_601) { |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 606 | if (bus_width == 8) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 607 | cfg |= S5P_CISRCFMT_ITU601_8BIT; |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 608 | else if (bus_width == 16) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 609 | cfg |= S5P_CISRCFMT_ITU601_16BIT; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 610 | } /* else defaults to ITU-R BT.656 8-bit */ |
| 611 | } |
| 612 | |
| 613 | cfg |= S5P_CISRCFMT_HSIZE(f->o_width) | S5P_CISRCFMT_VSIZE(f->o_height); |
| 614 | writel(cfg, fimc->regs + S5P_CISRCFMT); |
| 615 | return 0; |
| 616 | } |
| 617 | |
| 618 | |
| 619 | int fimc_hw_set_camera_offset(struct fimc_dev *fimc, struct fimc_frame *f) |
| 620 | { |
| 621 | u32 hoff2, voff2; |
| 622 | |
| 623 | u32 cfg = readl(fimc->regs + S5P_CIWDOFST); |
| 624 | |
| 625 | cfg &= ~(S5P_CIWDOFST_HOROFF_MASK | S5P_CIWDOFST_VEROFF_MASK); |
| 626 | cfg |= S5P_CIWDOFST_OFF_EN | |
| 627 | S5P_CIWDOFST_HOROFF(f->offs_h) | |
| 628 | S5P_CIWDOFST_VEROFF(f->offs_v); |
| 629 | |
| 630 | writel(cfg, fimc->regs + S5P_CIWDOFST); |
| 631 | |
| 632 | /* See CIWDOFSTn register description in the datasheet for details. */ |
| 633 | hoff2 = f->o_width - f->width - f->offs_h; |
| 634 | voff2 = f->o_height - f->height - f->offs_v; |
| 635 | cfg = S5P_CIWDOFST2_HOROFF(hoff2) | S5P_CIWDOFST2_VEROFF(voff2); |
| 636 | |
| 637 | writel(cfg, fimc->regs + S5P_CIWDOFST2); |
| 638 | return 0; |
| 639 | } |
| 640 | |
| 641 | int fimc_hw_set_camera_type(struct fimc_dev *fimc, |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 642 | struct s5p_fimc_isp_info *cam) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 643 | { |
| 644 | u32 cfg, tmp; |
| 645 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
| 646 | |
| 647 | cfg = readl(fimc->regs + S5P_CIGCTRL); |
| 648 | |
| 649 | /* Select ITU B interface, disable Writeback path and test pattern. */ |
| 650 | cfg &= ~(S5P_CIGCTRL_TESTPAT_MASK | S5P_CIGCTRL_SELCAM_ITU_A | |
| 651 | S5P_CIGCTRL_SELCAM_MIPI | S5P_CIGCTRL_CAMIF_SELWB | |
| 652 | S5P_CIGCTRL_SELCAM_MIPI_A); |
| 653 | |
| 654 | if (cam->bus_type == FIMC_MIPI_CSI2) { |
| 655 | cfg |= S5P_CIGCTRL_SELCAM_MIPI; |
| 656 | |
| 657 | if (cam->mux_id == 0) |
| 658 | cfg |= S5P_CIGCTRL_SELCAM_MIPI_A; |
| 659 | |
| 660 | /* TODO: add remaining supported formats. */ |
| 661 | if (vid_cap->fmt.code == V4L2_MBUS_FMT_VYUY8_2X8) { |
| 662 | tmp = S5P_CSIIMGFMT_YCBCR422_8BIT; |
| 663 | } else { |
Sylwester Nawrocki | 30c9939 | 2011-06-10 15:36:48 -0300 | [diff] [blame^] | 664 | v4l2_err(fimc->vid_cap.vfd, |
| 665 | "Not supported camera pixel format: %d", |
| 666 | vid_cap->fmt.code); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 667 | return -EINVAL; |
| 668 | } |
Sylwester Nawrocki | e0eec9a | 2011-02-21 12:09:01 -0300 | [diff] [blame] | 669 | tmp |= (cam->csi_data_align == 32) << 8; |
| 670 | |
| 671 | writel(tmp, fimc->regs + S5P_CSIIMGFMT); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 672 | |
| 673 | } else if (cam->bus_type == FIMC_ITU_601 || |
Sylwester Nawrocki | e0eec9a | 2011-02-21 12:09:01 -0300 | [diff] [blame] | 674 | cam->bus_type == FIMC_ITU_656) { |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 675 | if (cam->mux_id == 0) /* ITU-A, ITU-B: 0, 1 */ |
| 676 | cfg |= S5P_CIGCTRL_SELCAM_ITU_A; |
| 677 | } else if (cam->bus_type == FIMC_LCD_WB) { |
| 678 | cfg |= S5P_CIGCTRL_CAMIF_SELWB; |
| 679 | } else { |
| 680 | err("invalid camera bus type selected\n"); |
| 681 | return -EINVAL; |
| 682 | } |
| 683 | writel(cfg, fimc->regs + S5P_CIGCTRL); |
| 684 | |
| 685 | return 0; |
| 686 | } |