Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1 | /* |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2 | * Copyright (c) 2015-2016, Mellanox Technologies. All rights reserved. |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
| 32 | |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 33 | #include <net/tc_act/tc_gact.h> |
| 34 | #include <net/pkt_cls.h> |
Maor Gottlieb | 86d722a | 2015-12-10 17:12:44 +0200 | [diff] [blame] | 35 | #include <linux/mlx5/fs.h> |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 36 | #include <net/vxlan.h> |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 37 | #include "en.h" |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 38 | #include "en_tc.h" |
Saeed Mahameed | 66e49de | 2015-12-01 18:03:25 +0200 | [diff] [blame] | 39 | #include "eswitch.h" |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 40 | #include "vxlan.h" |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 41 | |
Daniel Jurgens | 29429f3 | 2016-06-30 17:34:44 +0300 | [diff] [blame] | 42 | enum { |
| 43 | MLX5_EN_QP_FLUSH_TIMEOUT_MS = 5000, |
| 44 | MLX5_EN_QP_FLUSH_MSLEEP_QUANT = 20, |
| 45 | MLX5_EN_QP_FLUSH_MAX_ITER = MLX5_EN_QP_FLUSH_TIMEOUT_MS / |
| 46 | MLX5_EN_QP_FLUSH_MSLEEP_QUANT, |
| 47 | }; |
| 48 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 49 | struct mlx5e_rq_param { |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 50 | u32 rqc[MLX5_ST_SZ_DW(rqc)]; |
| 51 | struct mlx5_wq_param wq; |
| 52 | bool am_enabled; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 53 | }; |
| 54 | |
| 55 | struct mlx5e_sq_param { |
| 56 | u32 sqc[MLX5_ST_SZ_DW(sqc)]; |
| 57 | struct mlx5_wq_param wq; |
Achiad Shochat | 58d5229 | 2015-07-23 23:35:58 +0300 | [diff] [blame] | 58 | u16 max_inline; |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 59 | bool icosq; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | struct mlx5e_cq_param { |
| 63 | u32 cqc[MLX5_ST_SZ_DW(cqc)]; |
| 64 | struct mlx5_wq_param wq; |
| 65 | u16 eq_ix; |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 66 | u8 cq_period_mode; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | struct mlx5e_channel_param { |
| 70 | struct mlx5e_rq_param rq; |
| 71 | struct mlx5e_sq_param sq; |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 72 | struct mlx5e_sq_param icosq; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 73 | struct mlx5e_cq_param rx_cq; |
| 74 | struct mlx5e_cq_param tx_cq; |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 75 | struct mlx5e_cq_param icosq_cq; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 76 | }; |
| 77 | |
| 78 | static void mlx5e_update_carrier(struct mlx5e_priv *priv) |
| 79 | { |
| 80 | struct mlx5_core_dev *mdev = priv->mdev; |
| 81 | u8 port_state; |
| 82 | |
| 83 | port_state = mlx5_query_vport_state(mdev, |
Saeed Mahameed | e754651 | 2015-12-01 18:03:13 +0200 | [diff] [blame] | 84 | MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT, 0); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 85 | |
Shaker Daibes | 87424ad | 2016-06-30 17:34:50 +0300 | [diff] [blame] | 86 | if (port_state == VPORT_STATE_UP) { |
| 87 | netdev_info(priv->netdev, "Link up\n"); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 88 | netif_carrier_on(priv->netdev); |
Shaker Daibes | 87424ad | 2016-06-30 17:34:50 +0300 | [diff] [blame] | 89 | } else { |
| 90 | netdev_info(priv->netdev, "Link down\n"); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 91 | netif_carrier_off(priv->netdev); |
Shaker Daibes | 87424ad | 2016-06-30 17:34:50 +0300 | [diff] [blame] | 92 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 93 | } |
| 94 | |
| 95 | static void mlx5e_update_carrier_work(struct work_struct *work) |
| 96 | { |
| 97 | struct mlx5e_priv *priv = container_of(work, struct mlx5e_priv, |
| 98 | update_carrier_work); |
| 99 | |
| 100 | mutex_lock(&priv->state_lock); |
| 101 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) |
| 102 | mlx5e_update_carrier(priv); |
| 103 | mutex_unlock(&priv->state_lock); |
| 104 | } |
| 105 | |
Daniel Jurgens | 3947ca1 | 2016-06-30 17:34:45 +0300 | [diff] [blame] | 106 | static void mlx5e_tx_timeout_work(struct work_struct *work) |
| 107 | { |
| 108 | struct mlx5e_priv *priv = container_of(work, struct mlx5e_priv, |
| 109 | tx_timeout_work); |
| 110 | int err; |
| 111 | |
| 112 | rtnl_lock(); |
| 113 | mutex_lock(&priv->state_lock); |
| 114 | if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) |
| 115 | goto unlock; |
| 116 | mlx5e_close_locked(priv->netdev); |
| 117 | err = mlx5e_open_locked(priv->netdev); |
| 118 | if (err) |
| 119 | netdev_err(priv->netdev, "mlx5e_open_locked failed recovering from a tx_timeout, err(%d).\n", |
| 120 | err); |
| 121 | unlock: |
| 122 | mutex_unlock(&priv->state_lock); |
| 123 | rtnl_unlock(); |
| 124 | } |
| 125 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 126 | static void mlx5e_update_sw_counters(struct mlx5e_priv *priv) |
Gal Pressman | efea389 | 2015-08-04 14:05:47 +0300 | [diff] [blame] | 127 | { |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 128 | struct mlx5e_sw_stats *s = &priv->stats.sw; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 129 | struct mlx5e_rq_stats *rq_stats; |
| 130 | struct mlx5e_sq_stats *sq_stats; |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 131 | u64 tx_offload_none = 0; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 132 | int i, j; |
| 133 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 134 | memset(s, 0, sizeof(*s)); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 135 | for (i = 0; i < priv->params.num_channels; i++) { |
| 136 | rq_stats = &priv->channel[i]->rq.stats; |
| 137 | |
Gal Pressman | faf4478 | 2016-02-29 21:17:15 +0200 | [diff] [blame] | 138 | s->rx_packets += rq_stats->packets; |
| 139 | s->rx_bytes += rq_stats->bytes; |
Gal Pressman | bfe6d8d | 2016-06-27 12:08:38 +0300 | [diff] [blame] | 140 | s->rx_lro_packets += rq_stats->lro_packets; |
| 141 | s->rx_lro_bytes += rq_stats->lro_bytes; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 142 | s->rx_csum_none += rq_stats->csum_none; |
Gal Pressman | bfe6d8d | 2016-06-27 12:08:38 +0300 | [diff] [blame] | 143 | s->rx_csum_complete += rq_stats->csum_complete; |
| 144 | s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 145 | s->rx_wqe_err += rq_stats->wqe_err; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 146 | s->rx_mpwqe_filler += rq_stats->mpwqe_filler; |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 147 | s->rx_mpwqe_frag += rq_stats->mpwqe_frag; |
Tariq Toukan | 5498440 | 2016-04-20 22:02:19 +0300 | [diff] [blame] | 148 | s->rx_buff_alloc_err += rq_stats->buff_alloc_err; |
Tariq Toukan | 7219ab3 | 2016-05-11 00:29:14 +0300 | [diff] [blame] | 149 | s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks; |
| 150 | s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 151 | |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 152 | for (j = 0; j < priv->params.num_tc; j++) { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 153 | sq_stats = &priv->channel[i]->sq[j].stats; |
| 154 | |
Gal Pressman | faf4478 | 2016-02-29 21:17:15 +0200 | [diff] [blame] | 155 | s->tx_packets += sq_stats->packets; |
| 156 | s->tx_bytes += sq_stats->bytes; |
Gal Pressman | bfe6d8d | 2016-06-27 12:08:38 +0300 | [diff] [blame] | 157 | s->tx_tso_packets += sq_stats->tso_packets; |
| 158 | s->tx_tso_bytes += sq_stats->tso_bytes; |
| 159 | s->tx_tso_inner_packets += sq_stats->tso_inner_packets; |
| 160 | s->tx_tso_inner_bytes += sq_stats->tso_inner_bytes; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 161 | s->tx_queue_stopped += sq_stats->stopped; |
| 162 | s->tx_queue_wake += sq_stats->wake; |
| 163 | s->tx_queue_dropped += sq_stats->dropped; |
Gal Pressman | bfe6d8d | 2016-06-27 12:08:38 +0300 | [diff] [blame] | 164 | s->tx_csum_partial_inner += sq_stats->csum_partial_inner; |
| 165 | tx_offload_none += sq_stats->csum_none; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 166 | } |
| 167 | } |
| 168 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 169 | /* Update calculated offload counters */ |
Gal Pressman | bfe6d8d | 2016-06-27 12:08:38 +0300 | [diff] [blame] | 170 | s->tx_csum_partial = s->tx_packets - tx_offload_none - s->tx_csum_partial_inner; |
| 171 | s->rx_csum_unnecessary = s->rx_packets - s->rx_csum_none - s->rx_csum_complete; |
Gal Pressman | 121fcdc | 2016-04-24 22:51:50 +0300 | [diff] [blame] | 172 | |
Gal Pressman | bfe6d8d | 2016-06-27 12:08:38 +0300 | [diff] [blame] | 173 | s->link_down_events_phy = MLX5_GET(ppcnt_reg, |
Gal Pressman | 121fcdc | 2016-04-24 22:51:50 +0300 | [diff] [blame] | 174 | priv->stats.pport.phy_counters, |
| 175 | counter_set.phys_layer_cntrs.link_down_events); |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 176 | } |
| 177 | |
| 178 | static void mlx5e_update_vport_counters(struct mlx5e_priv *priv) |
| 179 | { |
| 180 | int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out); |
| 181 | u32 *out = (u32 *)priv->stats.vport.query_vport_out; |
| 182 | u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)]; |
| 183 | struct mlx5_core_dev *mdev = priv->mdev; |
| 184 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 185 | memset(in, 0, sizeof(in)); |
| 186 | |
| 187 | MLX5_SET(query_vport_counter_in, in, opcode, |
| 188 | MLX5_CMD_OP_QUERY_VPORT_COUNTER); |
| 189 | MLX5_SET(query_vport_counter_in, in, op_mod, 0); |
| 190 | MLX5_SET(query_vport_counter_in, in, other_vport, 0); |
| 191 | |
| 192 | memset(out, 0, outlen); |
| 193 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 194 | mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); |
| 195 | } |
| 196 | |
| 197 | static void mlx5e_update_pport_counters(struct mlx5e_priv *priv) |
| 198 | { |
| 199 | struct mlx5e_pport_stats *pstats = &priv->stats.pport; |
| 200 | struct mlx5_core_dev *mdev = priv->mdev; |
| 201 | int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); |
Gal Pressman | cf67857 | 2016-04-24 22:51:49 +0300 | [diff] [blame] | 202 | int prio; |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 203 | void *out; |
| 204 | u32 *in; |
| 205 | |
| 206 | in = mlx5_vzalloc(sz); |
| 207 | if (!in) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 208 | goto free_out; |
| 209 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 210 | MLX5_SET(ppcnt_reg, in, local_port, 1); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 211 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 212 | out = pstats->IEEE_802_3_counters; |
| 213 | MLX5_SET(ppcnt_reg, in, grp, MLX5_IEEE_802_3_COUNTERS_GROUP); |
| 214 | mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 215 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 216 | out = pstats->RFC_2863_counters; |
| 217 | MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2863_COUNTERS_GROUP); |
| 218 | mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 219 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 220 | out = pstats->RFC_2819_counters; |
| 221 | MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2819_COUNTERS_GROUP); |
| 222 | mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); |
Rana Shahout | 593cf33 | 2016-04-20 22:02:10 +0300 | [diff] [blame] | 223 | |
Gal Pressman | 121fcdc | 2016-04-24 22:51:50 +0300 | [diff] [blame] | 224 | out = pstats->phy_counters; |
| 225 | MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP); |
| 226 | mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); |
| 227 | |
Gal Pressman | cf67857 | 2016-04-24 22:51:49 +0300 | [diff] [blame] | 228 | MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP); |
| 229 | for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { |
| 230 | out = pstats->per_prio_counters[prio]; |
| 231 | MLX5_SET(ppcnt_reg, in, prio_tc, prio); |
| 232 | mlx5_core_access_reg(mdev, in, sz, out, sz, |
| 233 | MLX5_REG_PPCNT, 0, 0); |
| 234 | } |
| 235 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 236 | free_out: |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 237 | kvfree(in); |
| 238 | } |
| 239 | |
| 240 | static void mlx5e_update_q_counter(struct mlx5e_priv *priv) |
| 241 | { |
| 242 | struct mlx5e_qcounter_stats *qcnt = &priv->stats.qcnt; |
| 243 | |
| 244 | if (!priv->q_counter) |
| 245 | return; |
| 246 | |
| 247 | mlx5_core_query_out_of_buffer(priv->mdev, priv->q_counter, |
| 248 | &qcnt->rx_out_of_buffer); |
| 249 | } |
| 250 | |
| 251 | void mlx5e_update_stats(struct mlx5e_priv *priv) |
| 252 | { |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 253 | mlx5e_update_q_counter(priv); |
| 254 | mlx5e_update_vport_counters(priv); |
| 255 | mlx5e_update_pport_counters(priv); |
Gal Pressman | 121fcdc | 2016-04-24 22:51:50 +0300 | [diff] [blame] | 256 | mlx5e_update_sw_counters(priv); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 257 | } |
| 258 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 259 | void mlx5e_update_stats_work(struct work_struct *work) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 260 | { |
| 261 | struct delayed_work *dwork = to_delayed_work(work); |
| 262 | struct mlx5e_priv *priv = container_of(dwork, struct mlx5e_priv, |
| 263 | update_stats_work); |
| 264 | mutex_lock(&priv->state_lock); |
| 265 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) { |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 266 | priv->profile->update_stats(priv); |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 267 | queue_delayed_work(priv->wq, dwork, |
| 268 | msecs_to_jiffies(MLX5E_UPDATE_STATS_INTERVAL)); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 269 | } |
| 270 | mutex_unlock(&priv->state_lock); |
| 271 | } |
| 272 | |
Tariq Toukan | daa2156 | 2016-03-02 00:13:32 +0200 | [diff] [blame] | 273 | static void mlx5e_async_event(struct mlx5_core_dev *mdev, void *vpriv, |
| 274 | enum mlx5_dev_event event, unsigned long param) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 275 | { |
Tariq Toukan | daa2156 | 2016-03-02 00:13:32 +0200 | [diff] [blame] | 276 | struct mlx5e_priv *priv = vpriv; |
| 277 | |
Eli Cohen | e0f46eb | 2016-06-27 12:08:34 +0300 | [diff] [blame] | 278 | if (!test_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state)) |
Tariq Toukan | daa2156 | 2016-03-02 00:13:32 +0200 | [diff] [blame] | 279 | return; |
| 280 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 281 | switch (event) { |
| 282 | case MLX5_DEV_EVENT_PORT_UP: |
| 283 | case MLX5_DEV_EVENT_PORT_DOWN: |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 284 | queue_work(priv->wq, &priv->update_carrier_work); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 285 | break; |
| 286 | |
| 287 | default: |
| 288 | break; |
| 289 | } |
| 290 | } |
| 291 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 292 | static void mlx5e_enable_async_events(struct mlx5e_priv *priv) |
| 293 | { |
Eli Cohen | e0f46eb | 2016-06-27 12:08:34 +0300 | [diff] [blame] | 294 | set_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 295 | } |
| 296 | |
| 297 | static void mlx5e_disable_async_events(struct mlx5e_priv *priv) |
| 298 | { |
Eli Cohen | e0f46eb | 2016-06-27 12:08:34 +0300 | [diff] [blame] | 299 | clear_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state); |
Tariq Toukan | daa2156 | 2016-03-02 00:13:32 +0200 | [diff] [blame] | 300 | synchronize_irq(mlx5_get_msix_vec(priv->mdev, MLX5_EQ_VEC_ASYNC)); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 301 | } |
| 302 | |
Saeed Mahameed | facc969 | 2015-06-11 14:47:27 +0300 | [diff] [blame] | 303 | #define MLX5E_HW2SW_MTU(hwmtu) (hwmtu - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)) |
| 304 | #define MLX5E_SW2HW_MTU(swmtu) (swmtu + (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)) |
| 305 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 306 | static int mlx5e_create_rq(struct mlx5e_channel *c, |
| 307 | struct mlx5e_rq_param *param, |
| 308 | struct mlx5e_rq *rq) |
| 309 | { |
| 310 | struct mlx5e_priv *priv = c->priv; |
| 311 | struct mlx5_core_dev *mdev = priv->mdev; |
| 312 | void *rqc = param->rqc; |
| 313 | void *rqc_wq = MLX5_ADDR_OF(rqc, rqc, wq); |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 314 | u32 byte_count; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 315 | int wq_sz; |
| 316 | int err; |
| 317 | int i; |
| 318 | |
Saeed Mahameed | 311c7c7 | 2015-07-23 23:35:57 +0300 | [diff] [blame] | 319 | param->wq.db_numa_node = cpu_to_node(c->cpu); |
| 320 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 321 | err = mlx5_wq_ll_create(mdev, ¶m->wq, rqc_wq, &rq->wq, |
| 322 | &rq->wq_ctrl); |
| 323 | if (err) |
| 324 | return err; |
| 325 | |
| 326 | rq->wq.db = &rq->wq.db[MLX5_RCV_DBR]; |
| 327 | |
| 328 | wq_sz = mlx5_wq_ll_get_size(&rq->wq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 329 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 330 | switch (priv->params.rq_wq_type) { |
| 331 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
| 332 | rq->wqe_info = kzalloc_node(wq_sz * sizeof(*rq->wqe_info), |
| 333 | GFP_KERNEL, cpu_to_node(c->cpu)); |
| 334 | if (!rq->wqe_info) { |
| 335 | err = -ENOMEM; |
| 336 | goto err_rq_wq_destroy; |
| 337 | } |
| 338 | rq->handle_rx_cqe = mlx5e_handle_rx_cqe_mpwrq; |
| 339 | rq->alloc_wqe = mlx5e_alloc_rx_mpwqe; |
Daniel Jurgens | 6cd392a | 2016-06-30 17:34:46 +0300 | [diff] [blame] | 340 | rq->dealloc_wqe = mlx5e_dealloc_rx_mpwqe; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 341 | |
Tariq Toukan | d9d9f15 | 2016-05-11 00:29:15 +0300 | [diff] [blame] | 342 | rq->mpwqe_stride_sz = BIT(priv->params.mpwqe_log_stride_sz); |
| 343 | rq->mpwqe_num_strides = BIT(priv->params.mpwqe_log_num_strides); |
| 344 | rq->wqe_sz = rq->mpwqe_stride_sz * rq->mpwqe_num_strides; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 345 | byte_count = rq->wqe_sz; |
| 346 | break; |
| 347 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
| 348 | rq->skb = kzalloc_node(wq_sz * sizeof(*rq->skb), GFP_KERNEL, |
| 349 | cpu_to_node(c->cpu)); |
| 350 | if (!rq->skb) { |
| 351 | err = -ENOMEM; |
| 352 | goto err_rq_wq_destroy; |
| 353 | } |
| 354 | rq->handle_rx_cqe = mlx5e_handle_rx_cqe; |
| 355 | rq->alloc_wqe = mlx5e_alloc_rx_wqe; |
Daniel Jurgens | 6cd392a | 2016-06-30 17:34:46 +0300 | [diff] [blame] | 356 | rq->dealloc_wqe = mlx5e_dealloc_rx_wqe; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 357 | |
| 358 | rq->wqe_sz = (priv->params.lro_en) ? |
| 359 | priv->params.lro_wqe_sz : |
| 360 | MLX5E_SW2HW_MTU(priv->netdev->mtu); |
Tariq Toukan | c5adb96 | 2016-04-20 22:02:16 +0300 | [diff] [blame] | 361 | rq->wqe_sz = SKB_DATA_ALIGN(rq->wqe_sz); |
| 362 | byte_count = rq->wqe_sz; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 363 | byte_count |= MLX5_HW_START_PADDING; |
| 364 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 365 | |
| 366 | for (i = 0; i < wq_sz; i++) { |
| 367 | struct mlx5e_rx_wqe *wqe = mlx5_wq_ll_get_wqe(&rq->wq, i); |
| 368 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 369 | wqe->data.byte_count = cpu_to_be32(byte_count); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 370 | } |
| 371 | |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 372 | INIT_WORK(&rq->am.work, mlx5e_rx_am_work); |
| 373 | rq->am.mode = priv->params.rx_cq_period_mode; |
| 374 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 375 | rq->wq_type = priv->params.rq_wq_type; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 376 | rq->pdev = c->pdev; |
| 377 | rq->netdev = c->netdev; |
Eran Ben Elisha | ef9814d | 2015-12-29 14:58:31 +0200 | [diff] [blame] | 378 | rq->tstamp = &priv->tstamp; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 379 | rq->channel = c; |
| 380 | rq->ix = c->ix; |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 381 | rq->priv = c->priv; |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 382 | rq->mkey_be = c->mkey_be; |
| 383 | rq->umr_mkey_be = cpu_to_be32(c->priv->umr_mkey.key); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 384 | |
| 385 | return 0; |
| 386 | |
| 387 | err_rq_wq_destroy: |
| 388 | mlx5_wq_destroy(&rq->wq_ctrl); |
| 389 | |
| 390 | return err; |
| 391 | } |
| 392 | |
| 393 | static void mlx5e_destroy_rq(struct mlx5e_rq *rq) |
| 394 | { |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 395 | switch (rq->wq_type) { |
| 396 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
| 397 | kfree(rq->wqe_info); |
| 398 | break; |
| 399 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
| 400 | kfree(rq->skb); |
| 401 | } |
| 402 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 403 | mlx5_wq_destroy(&rq->wq_ctrl); |
| 404 | } |
| 405 | |
| 406 | static int mlx5e_enable_rq(struct mlx5e_rq *rq, struct mlx5e_rq_param *param) |
| 407 | { |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 408 | struct mlx5e_priv *priv = rq->priv; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 409 | struct mlx5_core_dev *mdev = priv->mdev; |
| 410 | |
| 411 | void *in; |
| 412 | void *rqc; |
| 413 | void *wq; |
| 414 | int inlen; |
| 415 | int err; |
| 416 | |
| 417 | inlen = MLX5_ST_SZ_BYTES(create_rq_in) + |
| 418 | sizeof(u64) * rq->wq_ctrl.buf.npages; |
| 419 | in = mlx5_vzalloc(inlen); |
| 420 | if (!in) |
| 421 | return -ENOMEM; |
| 422 | |
| 423 | rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); |
| 424 | wq = MLX5_ADDR_OF(rqc, rqc, wq); |
| 425 | |
| 426 | memcpy(rqc, param->rqc, sizeof(param->rqc)); |
| 427 | |
Achiad Shochat | 97de9f3 | 2015-07-29 15:05:43 +0300 | [diff] [blame] | 428 | MLX5_SET(rqc, rqc, cqn, rq->cq.mcq.cqn); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 429 | MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); |
| 430 | MLX5_SET(rqc, rqc, flush_in_error_en, 1); |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 431 | MLX5_SET(rqc, rqc, vsd, priv->params.vlan_strip_disable); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 432 | MLX5_SET(wq, wq, log_wq_pg_sz, rq->wq_ctrl.buf.page_shift - |
Achiad Shochat | 68cdf5d | 2015-07-29 15:05:40 +0300 | [diff] [blame] | 433 | MLX5_ADAPTER_PAGE_SHIFT); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 434 | MLX5_SET64(wq, wq, dbr_addr, rq->wq_ctrl.db.dma); |
| 435 | |
| 436 | mlx5_fill_page_array(&rq->wq_ctrl.buf, |
| 437 | (__be64 *)MLX5_ADDR_OF(wq, wq, pas)); |
| 438 | |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 439 | err = mlx5_core_create_rq(mdev, in, inlen, &rq->rqn); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 440 | |
| 441 | kvfree(in); |
| 442 | |
| 443 | return err; |
| 444 | } |
| 445 | |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 446 | static int mlx5e_modify_rq_state(struct mlx5e_rq *rq, int curr_state, |
| 447 | int next_state) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 448 | { |
| 449 | struct mlx5e_channel *c = rq->channel; |
| 450 | struct mlx5e_priv *priv = c->priv; |
| 451 | struct mlx5_core_dev *mdev = priv->mdev; |
| 452 | |
| 453 | void *in; |
| 454 | void *rqc; |
| 455 | int inlen; |
| 456 | int err; |
| 457 | |
| 458 | inlen = MLX5_ST_SZ_BYTES(modify_rq_in); |
| 459 | in = mlx5_vzalloc(inlen); |
| 460 | if (!in) |
| 461 | return -ENOMEM; |
| 462 | |
| 463 | rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); |
| 464 | |
| 465 | MLX5_SET(modify_rq_in, in, rq_state, curr_state); |
| 466 | MLX5_SET(rqc, rqc, state, next_state); |
| 467 | |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 468 | err = mlx5_core_modify_rq(mdev, rq->rqn, in, inlen); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 469 | |
| 470 | kvfree(in); |
| 471 | |
| 472 | return err; |
| 473 | } |
| 474 | |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 475 | static int mlx5e_modify_rq_vsd(struct mlx5e_rq *rq, bool vsd) |
| 476 | { |
| 477 | struct mlx5e_channel *c = rq->channel; |
| 478 | struct mlx5e_priv *priv = c->priv; |
| 479 | struct mlx5_core_dev *mdev = priv->mdev; |
| 480 | |
| 481 | void *in; |
| 482 | void *rqc; |
| 483 | int inlen; |
| 484 | int err; |
| 485 | |
| 486 | inlen = MLX5_ST_SZ_BYTES(modify_rq_in); |
| 487 | in = mlx5_vzalloc(inlen); |
| 488 | if (!in) |
| 489 | return -ENOMEM; |
| 490 | |
| 491 | rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); |
| 492 | |
| 493 | MLX5_SET(modify_rq_in, in, rq_state, MLX5_RQC_STATE_RDY); |
| 494 | MLX5_SET64(modify_rq_in, in, modify_bitmask, MLX5_RQ_BITMASK_VSD); |
| 495 | MLX5_SET(rqc, rqc, vsd, vsd); |
| 496 | MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RDY); |
| 497 | |
| 498 | err = mlx5_core_modify_rq(mdev, rq->rqn, in, inlen); |
| 499 | |
| 500 | kvfree(in); |
| 501 | |
| 502 | return err; |
| 503 | } |
| 504 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 505 | static void mlx5e_disable_rq(struct mlx5e_rq *rq) |
| 506 | { |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 507 | mlx5_core_destroy_rq(rq->priv->mdev, rq->rqn); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 508 | } |
| 509 | |
| 510 | static int mlx5e_wait_for_min_rx_wqes(struct mlx5e_rq *rq) |
| 511 | { |
Achiad Shochat | 01c196a | 2015-11-03 08:07:19 +0200 | [diff] [blame] | 512 | unsigned long exp_time = jiffies + msecs_to_jiffies(20000); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 513 | struct mlx5e_channel *c = rq->channel; |
| 514 | struct mlx5e_priv *priv = c->priv; |
| 515 | struct mlx5_wq_ll *wq = &rq->wq; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 516 | |
Achiad Shochat | 01c196a | 2015-11-03 08:07:19 +0200 | [diff] [blame] | 517 | while (time_before(jiffies, exp_time)) { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 518 | if (wq->cur_sz >= priv->params.min_rx_wqes) |
| 519 | return 0; |
| 520 | |
| 521 | msleep(20); |
| 522 | } |
| 523 | |
| 524 | return -ETIMEDOUT; |
| 525 | } |
| 526 | |
| 527 | static int mlx5e_open_rq(struct mlx5e_channel *c, |
| 528 | struct mlx5e_rq_param *param, |
| 529 | struct mlx5e_rq *rq) |
| 530 | { |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 531 | struct mlx5e_sq *sq = &c->icosq; |
| 532 | u16 pi = sq->pc & sq->wq.sz_m1; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 533 | int err; |
| 534 | |
| 535 | err = mlx5e_create_rq(c, param, rq); |
| 536 | if (err) |
| 537 | return err; |
| 538 | |
| 539 | err = mlx5e_enable_rq(rq, param); |
| 540 | if (err) |
| 541 | goto err_destroy_rq; |
| 542 | |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 543 | err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 544 | if (err) |
| 545 | goto err_disable_rq; |
| 546 | |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 547 | if (param->am_enabled) |
| 548 | set_bit(MLX5E_RQ_STATE_AM, &c->rq.state); |
| 549 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 550 | set_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 551 | |
| 552 | sq->ico_wqe_info[pi].opcode = MLX5_OPCODE_NOP; |
| 553 | sq->ico_wqe_info[pi].num_wqebbs = 1; |
| 554 | mlx5e_send_nop(sq, true); /* trigger mlx5e_post_rx_wqes() */ |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 555 | |
| 556 | return 0; |
| 557 | |
| 558 | err_disable_rq: |
| 559 | mlx5e_disable_rq(rq); |
| 560 | err_destroy_rq: |
| 561 | mlx5e_destroy_rq(rq); |
| 562 | |
| 563 | return err; |
| 564 | } |
| 565 | |
| 566 | static void mlx5e_close_rq(struct mlx5e_rq *rq) |
| 567 | { |
Daniel Jurgens | 6cd392a | 2016-06-30 17:34:46 +0300 | [diff] [blame] | 568 | int tout = 0; |
| 569 | int err; |
| 570 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 571 | clear_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state); |
| 572 | napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */ |
| 573 | |
Daniel Jurgens | 6cd392a | 2016-06-30 17:34:46 +0300 | [diff] [blame] | 574 | err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR); |
| 575 | while (!mlx5_wq_ll_is_empty(&rq->wq) && !err && |
| 576 | tout++ < MLX5_EN_QP_FLUSH_MAX_ITER) |
| 577 | msleep(MLX5_EN_QP_FLUSH_MSLEEP_QUANT); |
| 578 | |
| 579 | if (err || tout == MLX5_EN_QP_FLUSH_MAX_ITER) |
| 580 | set_bit(MLX5E_RQ_STATE_FLUSH_TIMEOUT, &rq->state); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 581 | |
| 582 | /* avoid destroying rq before mlx5e_poll_rx_cq() is done with it */ |
| 583 | napi_synchronize(&rq->channel->napi); |
| 584 | |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 585 | cancel_work_sync(&rq->am.work); |
| 586 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 587 | mlx5e_disable_rq(rq); |
Daniel Jurgens | 6cd392a | 2016-06-30 17:34:46 +0300 | [diff] [blame] | 588 | mlx5e_free_rx_descs(rq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 589 | mlx5e_destroy_rq(rq); |
| 590 | } |
| 591 | |
| 592 | static void mlx5e_free_sq_db(struct mlx5e_sq *sq) |
| 593 | { |
Achiad Shochat | 34802a4 | 2015-12-29 14:58:29 +0200 | [diff] [blame] | 594 | kfree(sq->wqe_info); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 595 | kfree(sq->dma_fifo); |
| 596 | kfree(sq->skb); |
| 597 | } |
| 598 | |
| 599 | static int mlx5e_alloc_sq_db(struct mlx5e_sq *sq, int numa) |
| 600 | { |
| 601 | int wq_sz = mlx5_wq_cyc_get_size(&sq->wq); |
| 602 | int df_sz = wq_sz * MLX5_SEND_WQEBB_NUM_DS; |
| 603 | |
| 604 | sq->skb = kzalloc_node(wq_sz * sizeof(*sq->skb), GFP_KERNEL, numa); |
| 605 | sq->dma_fifo = kzalloc_node(df_sz * sizeof(*sq->dma_fifo), GFP_KERNEL, |
| 606 | numa); |
Achiad Shochat | 34802a4 | 2015-12-29 14:58:29 +0200 | [diff] [blame] | 607 | sq->wqe_info = kzalloc_node(wq_sz * sizeof(*sq->wqe_info), GFP_KERNEL, |
| 608 | numa); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 609 | |
Achiad Shochat | 34802a4 | 2015-12-29 14:58:29 +0200 | [diff] [blame] | 610 | if (!sq->skb || !sq->dma_fifo || !sq->wqe_info) { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 611 | mlx5e_free_sq_db(sq); |
| 612 | return -ENOMEM; |
| 613 | } |
| 614 | |
| 615 | sq->dma_fifo_mask = df_sz - 1; |
| 616 | |
| 617 | return 0; |
| 618 | } |
| 619 | |
| 620 | static int mlx5e_create_sq(struct mlx5e_channel *c, |
| 621 | int tc, |
| 622 | struct mlx5e_sq_param *param, |
| 623 | struct mlx5e_sq *sq) |
| 624 | { |
| 625 | struct mlx5e_priv *priv = c->priv; |
| 626 | struct mlx5_core_dev *mdev = priv->mdev; |
| 627 | |
| 628 | void *sqc = param->sqc; |
| 629 | void *sqc_wq = MLX5_ADDR_OF(sqc, sqc, wq); |
| 630 | int err; |
| 631 | |
Gal Pressman | fd4782c | 2016-06-27 12:08:35 +0300 | [diff] [blame] | 632 | err = mlx5_alloc_map_uar(mdev, &sq->uar, !!MLX5_CAP_GEN(mdev, bf)); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 633 | if (err) |
| 634 | return err; |
| 635 | |
Saeed Mahameed | 311c7c7 | 2015-07-23 23:35:57 +0300 | [diff] [blame] | 636 | param->wq.db_numa_node = cpu_to_node(c->cpu); |
| 637 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 638 | err = mlx5_wq_cyc_create(mdev, ¶m->wq, sqc_wq, &sq->wq, |
| 639 | &sq->wq_ctrl); |
| 640 | if (err) |
| 641 | goto err_unmap_free_uar; |
| 642 | |
| 643 | sq->wq.db = &sq->wq.db[MLX5_SND_DBR]; |
Moshe Lazer | 0ba4224 | 2016-03-02 00:13:40 +0200 | [diff] [blame] | 644 | if (sq->uar.bf_map) { |
| 645 | set_bit(MLX5E_SQ_STATE_BF_ENABLE, &sq->state); |
| 646 | sq->uar_map = sq->uar.bf_map; |
| 647 | } else { |
| 648 | sq->uar_map = sq->uar.map; |
| 649 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 650 | sq->bf_buf_size = (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) / 2; |
Achiad Shochat | 58d5229 | 2015-07-23 23:35:58 +0300 | [diff] [blame] | 651 | sq->max_inline = param->max_inline; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 652 | |
Dan Carpenter | 7ec0bb2 | 2015-06-11 11:50:01 +0300 | [diff] [blame] | 653 | err = mlx5e_alloc_sq_db(sq, cpu_to_node(c->cpu)); |
| 654 | if (err) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 655 | goto err_sq_wq_destroy; |
| 656 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 657 | if (param->icosq) { |
| 658 | u8 wq_sz = mlx5_wq_cyc_get_size(&sq->wq); |
| 659 | |
| 660 | sq->ico_wqe_info = kzalloc_node(sizeof(*sq->ico_wqe_info) * |
| 661 | wq_sz, |
| 662 | GFP_KERNEL, |
| 663 | cpu_to_node(c->cpu)); |
| 664 | if (!sq->ico_wqe_info) { |
| 665 | err = -ENOMEM; |
| 666 | goto err_free_sq_db; |
| 667 | } |
| 668 | } else { |
| 669 | int txq_ix; |
| 670 | |
| 671 | txq_ix = c->ix + tc * priv->params.num_channels; |
| 672 | sq->txq = netdev_get_tx_queue(priv->netdev, txq_ix); |
| 673 | priv->txq_to_sq_map[txq_ix] = sq; |
| 674 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 675 | |
Achiad Shochat | 88a85f9 | 2015-07-23 23:35:59 +0300 | [diff] [blame] | 676 | sq->pdev = c->pdev; |
Eran Ben Elisha | ef9814d | 2015-12-29 14:58:31 +0200 | [diff] [blame] | 677 | sq->tstamp = &priv->tstamp; |
Achiad Shochat | 88a85f9 | 2015-07-23 23:35:59 +0300 | [diff] [blame] | 678 | sq->mkey_be = c->mkey_be; |
| 679 | sq->channel = c; |
| 680 | sq->tc = tc; |
| 681 | sq->edge = (sq->wq.sz_m1 + 1) - MLX5_SEND_WQE_MAX_WQEBBS; |
| 682 | sq->bf_budget = MLX5E_SQ_BF_BUDGET; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 683 | |
| 684 | return 0; |
| 685 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 686 | err_free_sq_db: |
| 687 | mlx5e_free_sq_db(sq); |
| 688 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 689 | err_sq_wq_destroy: |
| 690 | mlx5_wq_destroy(&sq->wq_ctrl); |
| 691 | |
| 692 | err_unmap_free_uar: |
| 693 | mlx5_unmap_free_uar(mdev, &sq->uar); |
| 694 | |
| 695 | return err; |
| 696 | } |
| 697 | |
| 698 | static void mlx5e_destroy_sq(struct mlx5e_sq *sq) |
| 699 | { |
| 700 | struct mlx5e_channel *c = sq->channel; |
| 701 | struct mlx5e_priv *priv = c->priv; |
| 702 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 703 | kfree(sq->ico_wqe_info); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 704 | mlx5e_free_sq_db(sq); |
| 705 | mlx5_wq_destroy(&sq->wq_ctrl); |
| 706 | mlx5_unmap_free_uar(priv->mdev, &sq->uar); |
| 707 | } |
| 708 | |
| 709 | static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param) |
| 710 | { |
| 711 | struct mlx5e_channel *c = sq->channel; |
| 712 | struct mlx5e_priv *priv = c->priv; |
| 713 | struct mlx5_core_dev *mdev = priv->mdev; |
| 714 | |
| 715 | void *in; |
| 716 | void *sqc; |
| 717 | void *wq; |
| 718 | int inlen; |
| 719 | int err; |
| 720 | |
| 721 | inlen = MLX5_ST_SZ_BYTES(create_sq_in) + |
| 722 | sizeof(u64) * sq->wq_ctrl.buf.npages; |
| 723 | in = mlx5_vzalloc(inlen); |
| 724 | if (!in) |
| 725 | return -ENOMEM; |
| 726 | |
| 727 | sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); |
| 728 | wq = MLX5_ADDR_OF(sqc, sqc, wq); |
| 729 | |
| 730 | memcpy(sqc, param->sqc, sizeof(param->sqc)); |
| 731 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 732 | MLX5_SET(sqc, sqc, tis_num_0, param->icosq ? 0 : priv->tisn[sq->tc]); |
| 733 | MLX5_SET(sqc, sqc, cqn, sq->cq.mcq.cqn); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 734 | MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 735 | MLX5_SET(sqc, sqc, tis_lst_sz, param->icosq ? 0 : 1); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 736 | MLX5_SET(sqc, sqc, flush_in_error_en, 1); |
| 737 | |
| 738 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); |
| 739 | MLX5_SET(wq, wq, uar_page, sq->uar.index); |
| 740 | MLX5_SET(wq, wq, log_wq_pg_sz, sq->wq_ctrl.buf.page_shift - |
Achiad Shochat | 68cdf5d | 2015-07-29 15:05:40 +0300 | [diff] [blame] | 741 | MLX5_ADAPTER_PAGE_SHIFT); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 742 | MLX5_SET64(wq, wq, dbr_addr, sq->wq_ctrl.db.dma); |
| 743 | |
| 744 | mlx5_fill_page_array(&sq->wq_ctrl.buf, |
| 745 | (__be64 *)MLX5_ADDR_OF(wq, wq, pas)); |
| 746 | |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 747 | err = mlx5_core_create_sq(mdev, in, inlen, &sq->sqn); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 748 | |
| 749 | kvfree(in); |
| 750 | |
| 751 | return err; |
| 752 | } |
| 753 | |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 754 | static int mlx5e_modify_sq(struct mlx5e_sq *sq, int curr_state, |
| 755 | int next_state, bool update_rl, int rl_index) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 756 | { |
| 757 | struct mlx5e_channel *c = sq->channel; |
| 758 | struct mlx5e_priv *priv = c->priv; |
| 759 | struct mlx5_core_dev *mdev = priv->mdev; |
| 760 | |
| 761 | void *in; |
| 762 | void *sqc; |
| 763 | int inlen; |
| 764 | int err; |
| 765 | |
| 766 | inlen = MLX5_ST_SZ_BYTES(modify_sq_in); |
| 767 | in = mlx5_vzalloc(inlen); |
| 768 | if (!in) |
| 769 | return -ENOMEM; |
| 770 | |
| 771 | sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); |
| 772 | |
| 773 | MLX5_SET(modify_sq_in, in, sq_state, curr_state); |
| 774 | MLX5_SET(sqc, sqc, state, next_state); |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 775 | if (update_rl && next_state == MLX5_SQC_STATE_RDY) { |
| 776 | MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); |
| 777 | MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); |
| 778 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 779 | |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 780 | err = mlx5_core_modify_sq(mdev, sq->sqn, in, inlen); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 781 | |
| 782 | kvfree(in); |
| 783 | |
| 784 | return err; |
| 785 | } |
| 786 | |
| 787 | static void mlx5e_disable_sq(struct mlx5e_sq *sq) |
| 788 | { |
| 789 | struct mlx5e_channel *c = sq->channel; |
| 790 | struct mlx5e_priv *priv = c->priv; |
| 791 | struct mlx5_core_dev *mdev = priv->mdev; |
| 792 | |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 793 | mlx5_core_destroy_sq(mdev, sq->sqn); |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 794 | if (sq->rate_limit) |
| 795 | mlx5_rl_remove_rate(mdev, sq->rate_limit); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 796 | } |
| 797 | |
| 798 | static int mlx5e_open_sq(struct mlx5e_channel *c, |
| 799 | int tc, |
| 800 | struct mlx5e_sq_param *param, |
| 801 | struct mlx5e_sq *sq) |
| 802 | { |
| 803 | int err; |
| 804 | |
| 805 | err = mlx5e_create_sq(c, tc, param, sq); |
| 806 | if (err) |
| 807 | return err; |
| 808 | |
| 809 | err = mlx5e_enable_sq(sq, param); |
| 810 | if (err) |
| 811 | goto err_destroy_sq; |
| 812 | |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 813 | err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY, |
| 814 | false, 0); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 815 | if (err) |
| 816 | goto err_disable_sq; |
| 817 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 818 | if (sq->txq) { |
| 819 | set_bit(MLX5E_SQ_STATE_WAKE_TXQ_ENABLE, &sq->state); |
| 820 | netdev_tx_reset_queue(sq->txq); |
| 821 | netif_tx_start_queue(sq->txq); |
| 822 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 823 | |
| 824 | return 0; |
| 825 | |
| 826 | err_disable_sq: |
| 827 | mlx5e_disable_sq(sq); |
| 828 | err_destroy_sq: |
| 829 | mlx5e_destroy_sq(sq); |
| 830 | |
| 831 | return err; |
| 832 | } |
| 833 | |
| 834 | static inline void netif_tx_disable_queue(struct netdev_queue *txq) |
| 835 | { |
| 836 | __netif_tx_lock_bh(txq); |
| 837 | netif_tx_stop_queue(txq); |
| 838 | __netif_tx_unlock_bh(txq); |
| 839 | } |
| 840 | |
| 841 | static void mlx5e_close_sq(struct mlx5e_sq *sq) |
| 842 | { |
Daniel Jurgens | 29429f3 | 2016-06-30 17:34:44 +0300 | [diff] [blame] | 843 | int tout = 0; |
| 844 | int err; |
| 845 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 846 | if (sq->txq) { |
| 847 | clear_bit(MLX5E_SQ_STATE_WAKE_TXQ_ENABLE, &sq->state); |
| 848 | /* prevent netif_tx_wake_queue */ |
| 849 | napi_synchronize(&sq->channel->napi); |
| 850 | netif_tx_disable_queue(sq->txq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 851 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 852 | /* ensure hw is notified of all pending wqes */ |
| 853 | if (mlx5e_sq_has_room_for(sq, 1)) |
| 854 | mlx5e_send_nop(sq, true); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 855 | |
Daniel Jurgens | 29429f3 | 2016-06-30 17:34:44 +0300 | [diff] [blame] | 856 | err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY, |
David S. Miller | 30d0844 | 2016-07-06 10:35:22 -0700 | [diff] [blame^] | 857 | MLX5_SQC_STATE_ERR, false, 0); |
Daniel Jurgens | 29429f3 | 2016-06-30 17:34:44 +0300 | [diff] [blame] | 858 | if (err) |
| 859 | set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 860 | } |
| 861 | |
Daniel Jurgens | 29429f3 | 2016-06-30 17:34:44 +0300 | [diff] [blame] | 862 | /* wait till sq is empty, unless a TX timeout occurred on this SQ */ |
| 863 | while (sq->cc != sq->pc && |
| 864 | !test_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state)) { |
| 865 | msleep(MLX5_EN_QP_FLUSH_MSLEEP_QUANT); |
| 866 | if (tout++ > MLX5_EN_QP_FLUSH_MAX_ITER) |
| 867 | set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state); |
| 868 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 869 | |
| 870 | /* avoid destroying sq before mlx5e_poll_tx_cq() is done with it */ |
| 871 | napi_synchronize(&sq->channel->napi); |
| 872 | |
Daniel Jurgens | 29429f3 | 2016-06-30 17:34:44 +0300 | [diff] [blame] | 873 | mlx5e_free_tx_descs(sq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 874 | mlx5e_disable_sq(sq); |
| 875 | mlx5e_destroy_sq(sq); |
| 876 | } |
| 877 | |
| 878 | static int mlx5e_create_cq(struct mlx5e_channel *c, |
| 879 | struct mlx5e_cq_param *param, |
| 880 | struct mlx5e_cq *cq) |
| 881 | { |
| 882 | struct mlx5e_priv *priv = c->priv; |
| 883 | struct mlx5_core_dev *mdev = priv->mdev; |
| 884 | struct mlx5_core_cq *mcq = &cq->mcq; |
| 885 | int eqn_not_used; |
Doron Tsur | 0b6e26c | 2016-01-17 11:25:47 +0200 | [diff] [blame] | 886 | unsigned int irqn; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 887 | int err; |
| 888 | u32 i; |
| 889 | |
Saeed Mahameed | 311c7c7 | 2015-07-23 23:35:57 +0300 | [diff] [blame] | 890 | param->wq.buf_numa_node = cpu_to_node(c->cpu); |
| 891 | param->wq.db_numa_node = cpu_to_node(c->cpu); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 892 | param->eq_ix = c->ix; |
| 893 | |
| 894 | err = mlx5_cqwq_create(mdev, ¶m->wq, param->cqc, &cq->wq, |
| 895 | &cq->wq_ctrl); |
| 896 | if (err) |
| 897 | return err; |
| 898 | |
| 899 | mlx5_vector2eqn(mdev, param->eq_ix, &eqn_not_used, &irqn); |
| 900 | |
| 901 | cq->napi = &c->napi; |
| 902 | |
| 903 | mcq->cqe_sz = 64; |
| 904 | mcq->set_ci_db = cq->wq_ctrl.db.db; |
| 905 | mcq->arm_db = cq->wq_ctrl.db.db + 1; |
| 906 | *mcq->set_ci_db = 0; |
| 907 | *mcq->arm_db = 0; |
| 908 | mcq->vector = param->eq_ix; |
| 909 | mcq->comp = mlx5e_completion_event; |
| 910 | mcq->event = mlx5e_cq_error_event; |
| 911 | mcq->irqn = irqn; |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 912 | mcq->uar = &mdev->mlx5e_res.cq_uar; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 913 | |
| 914 | for (i = 0; i < mlx5_cqwq_get_size(&cq->wq); i++) { |
| 915 | struct mlx5_cqe64 *cqe = mlx5_cqwq_get_wqe(&cq->wq, i); |
| 916 | |
| 917 | cqe->op_own = 0xf1; |
| 918 | } |
| 919 | |
| 920 | cq->channel = c; |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 921 | cq->priv = priv; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 922 | |
| 923 | return 0; |
| 924 | } |
| 925 | |
| 926 | static void mlx5e_destroy_cq(struct mlx5e_cq *cq) |
| 927 | { |
| 928 | mlx5_wq_destroy(&cq->wq_ctrl); |
| 929 | } |
| 930 | |
| 931 | static int mlx5e_enable_cq(struct mlx5e_cq *cq, struct mlx5e_cq_param *param) |
| 932 | { |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 933 | struct mlx5e_priv *priv = cq->priv; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 934 | struct mlx5_core_dev *mdev = priv->mdev; |
| 935 | struct mlx5_core_cq *mcq = &cq->mcq; |
| 936 | |
| 937 | void *in; |
| 938 | void *cqc; |
| 939 | int inlen; |
Doron Tsur | 0b6e26c | 2016-01-17 11:25:47 +0200 | [diff] [blame] | 940 | unsigned int irqn_not_used; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 941 | int eqn; |
| 942 | int err; |
| 943 | |
| 944 | inlen = MLX5_ST_SZ_BYTES(create_cq_in) + |
| 945 | sizeof(u64) * cq->wq_ctrl.buf.npages; |
| 946 | in = mlx5_vzalloc(inlen); |
| 947 | if (!in) |
| 948 | return -ENOMEM; |
| 949 | |
| 950 | cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context); |
| 951 | |
| 952 | memcpy(cqc, param->cqc, sizeof(param->cqc)); |
| 953 | |
| 954 | mlx5_fill_page_array(&cq->wq_ctrl.buf, |
| 955 | (__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas)); |
| 956 | |
| 957 | mlx5_vector2eqn(mdev, param->eq_ix, &eqn, &irqn_not_used); |
| 958 | |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 959 | MLX5_SET(cqc, cqc, cq_period_mode, param->cq_period_mode); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 960 | MLX5_SET(cqc, cqc, c_eqn, eqn); |
| 961 | MLX5_SET(cqc, cqc, uar_page, mcq->uar->index); |
| 962 | MLX5_SET(cqc, cqc, log_page_size, cq->wq_ctrl.buf.page_shift - |
Achiad Shochat | 68cdf5d | 2015-07-29 15:05:40 +0300 | [diff] [blame] | 963 | MLX5_ADAPTER_PAGE_SHIFT); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 964 | MLX5_SET64(cqc, cqc, dbr_addr, cq->wq_ctrl.db.dma); |
| 965 | |
| 966 | err = mlx5_core_create_cq(mdev, mcq, in, inlen); |
| 967 | |
| 968 | kvfree(in); |
| 969 | |
| 970 | if (err) |
| 971 | return err; |
| 972 | |
| 973 | mlx5e_cq_arm(cq); |
| 974 | |
| 975 | return 0; |
| 976 | } |
| 977 | |
| 978 | static void mlx5e_disable_cq(struct mlx5e_cq *cq) |
| 979 | { |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 980 | struct mlx5e_priv *priv = cq->priv; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 981 | struct mlx5_core_dev *mdev = priv->mdev; |
| 982 | |
| 983 | mlx5_core_destroy_cq(mdev, &cq->mcq); |
| 984 | } |
| 985 | |
| 986 | static int mlx5e_open_cq(struct mlx5e_channel *c, |
| 987 | struct mlx5e_cq_param *param, |
| 988 | struct mlx5e_cq *cq, |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 989 | struct mlx5e_cq_moder moderation) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 990 | { |
| 991 | int err; |
| 992 | struct mlx5e_priv *priv = c->priv; |
| 993 | struct mlx5_core_dev *mdev = priv->mdev; |
| 994 | |
| 995 | err = mlx5e_create_cq(c, param, cq); |
| 996 | if (err) |
| 997 | return err; |
| 998 | |
| 999 | err = mlx5e_enable_cq(cq, param); |
| 1000 | if (err) |
| 1001 | goto err_destroy_cq; |
| 1002 | |
Gal Pressman | 7524a5d | 2016-03-02 00:13:37 +0200 | [diff] [blame] | 1003 | if (MLX5_CAP_GEN(mdev, cq_moderation)) |
| 1004 | mlx5_core_modify_cq_moderation(mdev, &cq->mcq, |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1005 | moderation.usec, |
| 1006 | moderation.pkts); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1007 | return 0; |
| 1008 | |
| 1009 | err_destroy_cq: |
| 1010 | mlx5e_destroy_cq(cq); |
| 1011 | |
| 1012 | return err; |
| 1013 | } |
| 1014 | |
| 1015 | static void mlx5e_close_cq(struct mlx5e_cq *cq) |
| 1016 | { |
| 1017 | mlx5e_disable_cq(cq); |
| 1018 | mlx5e_destroy_cq(cq); |
| 1019 | } |
| 1020 | |
| 1021 | static int mlx5e_get_cpu(struct mlx5e_priv *priv, int ix) |
| 1022 | { |
| 1023 | return cpumask_first(priv->mdev->priv.irq_info[ix].mask); |
| 1024 | } |
| 1025 | |
| 1026 | static int mlx5e_open_tx_cqs(struct mlx5e_channel *c, |
| 1027 | struct mlx5e_channel_param *cparam) |
| 1028 | { |
| 1029 | struct mlx5e_priv *priv = c->priv; |
| 1030 | int err; |
| 1031 | int tc; |
| 1032 | |
| 1033 | for (tc = 0; tc < c->num_tc; tc++) { |
| 1034 | err = mlx5e_open_cq(c, &cparam->tx_cq, &c->sq[tc].cq, |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1035 | priv->params.tx_cq_moderation); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1036 | if (err) |
| 1037 | goto err_close_tx_cqs; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1038 | } |
| 1039 | |
| 1040 | return 0; |
| 1041 | |
| 1042 | err_close_tx_cqs: |
| 1043 | for (tc--; tc >= 0; tc--) |
| 1044 | mlx5e_close_cq(&c->sq[tc].cq); |
| 1045 | |
| 1046 | return err; |
| 1047 | } |
| 1048 | |
| 1049 | static void mlx5e_close_tx_cqs(struct mlx5e_channel *c) |
| 1050 | { |
| 1051 | int tc; |
| 1052 | |
| 1053 | for (tc = 0; tc < c->num_tc; tc++) |
| 1054 | mlx5e_close_cq(&c->sq[tc].cq); |
| 1055 | } |
| 1056 | |
| 1057 | static int mlx5e_open_sqs(struct mlx5e_channel *c, |
| 1058 | struct mlx5e_channel_param *cparam) |
| 1059 | { |
| 1060 | int err; |
| 1061 | int tc; |
| 1062 | |
| 1063 | for (tc = 0; tc < c->num_tc; tc++) { |
| 1064 | err = mlx5e_open_sq(c, tc, &cparam->sq, &c->sq[tc]); |
| 1065 | if (err) |
| 1066 | goto err_close_sqs; |
| 1067 | } |
| 1068 | |
| 1069 | return 0; |
| 1070 | |
| 1071 | err_close_sqs: |
| 1072 | for (tc--; tc >= 0; tc--) |
| 1073 | mlx5e_close_sq(&c->sq[tc]); |
| 1074 | |
| 1075 | return err; |
| 1076 | } |
| 1077 | |
| 1078 | static void mlx5e_close_sqs(struct mlx5e_channel *c) |
| 1079 | { |
| 1080 | int tc; |
| 1081 | |
| 1082 | for (tc = 0; tc < c->num_tc; tc++) |
| 1083 | mlx5e_close_sq(&c->sq[tc]); |
| 1084 | } |
| 1085 | |
Rana Shahout | 5283af8 | 2015-08-23 16:12:14 +0300 | [diff] [blame] | 1086 | static void mlx5e_build_channeltc_to_txq_map(struct mlx5e_priv *priv, int ix) |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1087 | { |
| 1088 | int i; |
| 1089 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 1090 | for (i = 0; i < priv->profile->max_tc; i++) |
Rana Shahout | 5283af8 | 2015-08-23 16:12:14 +0300 | [diff] [blame] | 1091 | priv->channeltc_to_txq_map[ix][i] = |
| 1092 | ix + i * priv->params.num_channels; |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1093 | } |
| 1094 | |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 1095 | static int mlx5e_set_sq_maxrate(struct net_device *dev, |
| 1096 | struct mlx5e_sq *sq, u32 rate) |
| 1097 | { |
| 1098 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 1099 | struct mlx5_core_dev *mdev = priv->mdev; |
| 1100 | u16 rl_index = 0; |
| 1101 | int err; |
| 1102 | |
| 1103 | if (rate == sq->rate_limit) |
| 1104 | /* nothing to do */ |
| 1105 | return 0; |
| 1106 | |
| 1107 | if (sq->rate_limit) |
| 1108 | /* remove current rl index to free space to next ones */ |
| 1109 | mlx5_rl_remove_rate(mdev, sq->rate_limit); |
| 1110 | |
| 1111 | sq->rate_limit = 0; |
| 1112 | |
| 1113 | if (rate) { |
| 1114 | err = mlx5_rl_add_rate(mdev, rate, &rl_index); |
| 1115 | if (err) { |
| 1116 | netdev_err(dev, "Failed configuring rate %u: %d\n", |
| 1117 | rate, err); |
| 1118 | return err; |
| 1119 | } |
| 1120 | } |
| 1121 | |
| 1122 | err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY, |
| 1123 | MLX5_SQC_STATE_RDY, true, rl_index); |
| 1124 | if (err) { |
| 1125 | netdev_err(dev, "Failed configuring rate %u: %d\n", |
| 1126 | rate, err); |
| 1127 | /* remove the rate from the table */ |
| 1128 | if (rate) |
| 1129 | mlx5_rl_remove_rate(mdev, rate); |
| 1130 | return err; |
| 1131 | } |
| 1132 | |
| 1133 | sq->rate_limit = rate; |
| 1134 | return 0; |
| 1135 | } |
| 1136 | |
| 1137 | static int mlx5e_set_tx_maxrate(struct net_device *dev, int index, u32 rate) |
| 1138 | { |
| 1139 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 1140 | struct mlx5_core_dev *mdev = priv->mdev; |
| 1141 | struct mlx5e_sq *sq = priv->txq_to_sq_map[index]; |
| 1142 | int err = 0; |
| 1143 | |
| 1144 | if (!mlx5_rl_is_supported(mdev)) { |
| 1145 | netdev_err(dev, "Rate limiting is not supported on this device\n"); |
| 1146 | return -EINVAL; |
| 1147 | } |
| 1148 | |
| 1149 | /* rate is given in Mb/sec, HW config is in Kb/sec */ |
| 1150 | rate = rate << 10; |
| 1151 | |
| 1152 | /* Check whether rate in valid range, 0 is always valid */ |
| 1153 | if (rate && !mlx5_rl_is_in_range(mdev, rate)) { |
| 1154 | netdev_err(dev, "TX rate %u, is not in range\n", rate); |
| 1155 | return -ERANGE; |
| 1156 | } |
| 1157 | |
| 1158 | mutex_lock(&priv->state_lock); |
| 1159 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) |
| 1160 | err = mlx5e_set_sq_maxrate(dev, sq, rate); |
| 1161 | if (!err) |
| 1162 | priv->tx_rates[index] = rate; |
| 1163 | mutex_unlock(&priv->state_lock); |
| 1164 | |
| 1165 | return err; |
| 1166 | } |
| 1167 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1168 | static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, |
| 1169 | struct mlx5e_channel_param *cparam, |
| 1170 | struct mlx5e_channel **cp) |
| 1171 | { |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1172 | struct mlx5e_cq_moder icosq_cq_moder = {0, 0}; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1173 | struct net_device *netdev = priv->netdev; |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 1174 | struct mlx5e_cq_moder rx_cq_profile; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1175 | int cpu = mlx5e_get_cpu(priv, ix); |
| 1176 | struct mlx5e_channel *c; |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 1177 | struct mlx5e_sq *sq; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1178 | int err; |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 1179 | int i; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1180 | |
| 1181 | c = kzalloc_node(sizeof(*c), GFP_KERNEL, cpu_to_node(cpu)); |
| 1182 | if (!c) |
| 1183 | return -ENOMEM; |
| 1184 | |
| 1185 | c->priv = priv; |
| 1186 | c->ix = ix; |
| 1187 | c->cpu = cpu; |
| 1188 | c->pdev = &priv->mdev->pdev->dev; |
| 1189 | c->netdev = priv->netdev; |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 1190 | c->mkey_be = cpu_to_be32(priv->mdev->mlx5e_res.mkey.key); |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 1191 | c->num_tc = priv->params.num_tc; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1192 | |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 1193 | if (priv->params.rx_am_enabled) |
| 1194 | rx_cq_profile = mlx5e_am_get_def_profile(priv->params.rx_cq_period_mode); |
| 1195 | else |
| 1196 | rx_cq_profile = priv->params.rx_cq_moderation; |
| 1197 | |
Rana Shahout | 5283af8 | 2015-08-23 16:12:14 +0300 | [diff] [blame] | 1198 | mlx5e_build_channeltc_to_txq_map(priv, ix); |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1199 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1200 | netif_napi_add(netdev, &c->napi, mlx5e_napi_poll, 64); |
| 1201 | |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1202 | err = mlx5e_open_cq(c, &cparam->icosq_cq, &c->icosq.cq, icosq_cq_moder); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1203 | if (err) |
| 1204 | goto err_napi_del; |
| 1205 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1206 | err = mlx5e_open_tx_cqs(c, cparam); |
| 1207 | if (err) |
| 1208 | goto err_close_icosq_cq; |
| 1209 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1210 | err = mlx5e_open_cq(c, &cparam->rx_cq, &c->rq.cq, |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 1211 | rx_cq_profile); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1212 | if (err) |
| 1213 | goto err_close_tx_cqs; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1214 | |
| 1215 | napi_enable(&c->napi); |
| 1216 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1217 | err = mlx5e_open_sq(c, 0, &cparam->icosq, &c->icosq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1218 | if (err) |
| 1219 | goto err_disable_napi; |
| 1220 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1221 | err = mlx5e_open_sqs(c, cparam); |
| 1222 | if (err) |
| 1223 | goto err_close_icosq; |
| 1224 | |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 1225 | for (i = 0; i < priv->params.num_tc; i++) { |
| 1226 | u32 txq_ix = priv->channeltc_to_txq_map[ix][i]; |
| 1227 | |
| 1228 | if (priv->tx_rates[txq_ix]) { |
| 1229 | sq = priv->txq_to_sq_map[txq_ix]; |
| 1230 | mlx5e_set_sq_maxrate(priv->netdev, sq, |
| 1231 | priv->tx_rates[txq_ix]); |
| 1232 | } |
| 1233 | } |
| 1234 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1235 | err = mlx5e_open_rq(c, &cparam->rq, &c->rq); |
| 1236 | if (err) |
| 1237 | goto err_close_sqs; |
| 1238 | |
| 1239 | netif_set_xps_queue(netdev, get_cpu_mask(c->cpu), ix); |
| 1240 | *cp = c; |
| 1241 | |
| 1242 | return 0; |
| 1243 | |
| 1244 | err_close_sqs: |
| 1245 | mlx5e_close_sqs(c); |
| 1246 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1247 | err_close_icosq: |
| 1248 | mlx5e_close_sq(&c->icosq); |
| 1249 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1250 | err_disable_napi: |
| 1251 | napi_disable(&c->napi); |
| 1252 | mlx5e_close_cq(&c->rq.cq); |
| 1253 | |
| 1254 | err_close_tx_cqs: |
| 1255 | mlx5e_close_tx_cqs(c); |
| 1256 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1257 | err_close_icosq_cq: |
| 1258 | mlx5e_close_cq(&c->icosq.cq); |
| 1259 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1260 | err_napi_del: |
| 1261 | netif_napi_del(&c->napi); |
Eric Dumazet | 7ae92ae | 2015-11-18 06:30:55 -0800 | [diff] [blame] | 1262 | napi_hash_del(&c->napi); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1263 | kfree(c); |
| 1264 | |
| 1265 | return err; |
| 1266 | } |
| 1267 | |
| 1268 | static void mlx5e_close_channel(struct mlx5e_channel *c) |
| 1269 | { |
| 1270 | mlx5e_close_rq(&c->rq); |
| 1271 | mlx5e_close_sqs(c); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1272 | mlx5e_close_sq(&c->icosq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1273 | napi_disable(&c->napi); |
| 1274 | mlx5e_close_cq(&c->rq.cq); |
| 1275 | mlx5e_close_tx_cqs(c); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1276 | mlx5e_close_cq(&c->icosq.cq); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1277 | netif_napi_del(&c->napi); |
Eric Dumazet | 7ae92ae | 2015-11-18 06:30:55 -0800 | [diff] [blame] | 1278 | |
| 1279 | napi_hash_del(&c->napi); |
| 1280 | synchronize_rcu(); |
| 1281 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1282 | kfree(c); |
| 1283 | } |
| 1284 | |
| 1285 | static void mlx5e_build_rq_param(struct mlx5e_priv *priv, |
| 1286 | struct mlx5e_rq_param *param) |
| 1287 | { |
| 1288 | void *rqc = param->rqc; |
| 1289 | void *wq = MLX5_ADDR_OF(rqc, rqc, wq); |
| 1290 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 1291 | switch (priv->params.rq_wq_type) { |
| 1292 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
| 1293 | MLX5_SET(wq, wq, log_wqe_num_of_strides, |
Tariq Toukan | d9d9f15 | 2016-05-11 00:29:15 +0300 | [diff] [blame] | 1294 | priv->params.mpwqe_log_num_strides - 9); |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 1295 | MLX5_SET(wq, wq, log_wqe_stride_size, |
Tariq Toukan | d9d9f15 | 2016-05-11 00:29:15 +0300 | [diff] [blame] | 1296 | priv->params.mpwqe_log_stride_sz - 6); |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 1297 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ); |
| 1298 | break; |
| 1299 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
| 1300 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST); |
| 1301 | } |
| 1302 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1303 | MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); |
| 1304 | MLX5_SET(wq, wq, log_wq_stride, ilog2(sizeof(struct mlx5e_rx_wqe))); |
| 1305 | MLX5_SET(wq, wq, log_wq_sz, priv->params.log_rq_size); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 1306 | MLX5_SET(wq, wq, pd, priv->mdev->mlx5e_res.pdn); |
Rana Shahout | 593cf33 | 2016-04-20 22:02:10 +0300 | [diff] [blame] | 1307 | MLX5_SET(rqc, rqc, counter_set_id, priv->q_counter); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1308 | |
Saeed Mahameed | 311c7c7 | 2015-07-23 23:35:57 +0300 | [diff] [blame] | 1309 | param->wq.buf_numa_node = dev_to_node(&priv->mdev->pdev->dev); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1310 | param->wq.linear = 1; |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 1311 | |
| 1312 | param->am_enabled = priv->params.rx_am_enabled; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1313 | } |
| 1314 | |
Tariq Toukan | 556dd1b | 2016-03-02 00:13:36 +0200 | [diff] [blame] | 1315 | static void mlx5e_build_drop_rq_param(struct mlx5e_rq_param *param) |
| 1316 | { |
| 1317 | void *rqc = param->rqc; |
| 1318 | void *wq = MLX5_ADDR_OF(rqc, rqc, wq); |
| 1319 | |
| 1320 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST); |
| 1321 | MLX5_SET(wq, wq, log_wq_stride, ilog2(sizeof(struct mlx5e_rx_wqe))); |
| 1322 | } |
| 1323 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1324 | static void mlx5e_build_sq_param_common(struct mlx5e_priv *priv, |
| 1325 | struct mlx5e_sq_param *param) |
| 1326 | { |
| 1327 | void *sqc = param->sqc; |
| 1328 | void *wq = MLX5_ADDR_OF(sqc, sqc, wq); |
| 1329 | |
| 1330 | MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 1331 | MLX5_SET(wq, wq, pd, priv->mdev->mlx5e_res.pdn); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1332 | |
| 1333 | param->wq.buf_numa_node = dev_to_node(&priv->mdev->pdev->dev); |
| 1334 | } |
| 1335 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1336 | static void mlx5e_build_sq_param(struct mlx5e_priv *priv, |
| 1337 | struct mlx5e_sq_param *param) |
| 1338 | { |
| 1339 | void *sqc = param->sqc; |
| 1340 | void *wq = MLX5_ADDR_OF(sqc, sqc, wq); |
| 1341 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1342 | mlx5e_build_sq_param_common(priv, param); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1343 | MLX5_SET(wq, wq, log_wq_sz, priv->params.log_sq_size); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1344 | |
Achiad Shochat | 58d5229 | 2015-07-23 23:35:58 +0300 | [diff] [blame] | 1345 | param->max_inline = priv->params.tx_max_inline; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1346 | } |
| 1347 | |
| 1348 | static void mlx5e_build_common_cq_param(struct mlx5e_priv *priv, |
| 1349 | struct mlx5e_cq_param *param) |
| 1350 | { |
| 1351 | void *cqc = param->cqc; |
| 1352 | |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 1353 | MLX5_SET(cqc, cqc, uar_page, priv->mdev->mlx5e_res.cq_uar.index); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1354 | } |
| 1355 | |
| 1356 | static void mlx5e_build_rx_cq_param(struct mlx5e_priv *priv, |
| 1357 | struct mlx5e_cq_param *param) |
| 1358 | { |
| 1359 | void *cqc = param->cqc; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 1360 | u8 log_cq_size; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1361 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 1362 | switch (priv->params.rq_wq_type) { |
| 1363 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
| 1364 | log_cq_size = priv->params.log_rq_size + |
Tariq Toukan | d9d9f15 | 2016-05-11 00:29:15 +0300 | [diff] [blame] | 1365 | priv->params.mpwqe_log_num_strides; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 1366 | break; |
| 1367 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
| 1368 | log_cq_size = priv->params.log_rq_size; |
| 1369 | } |
| 1370 | |
| 1371 | MLX5_SET(cqc, cqc, log_cq_size, log_cq_size); |
Tariq Toukan | 7219ab3 | 2016-05-11 00:29:14 +0300 | [diff] [blame] | 1372 | if (priv->params.rx_cqe_compress) { |
| 1373 | MLX5_SET(cqc, cqc, mini_cqe_res_format, MLX5_CQE_FORMAT_CSUM); |
| 1374 | MLX5_SET(cqc, cqc, cqe_comp_en, 1); |
| 1375 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1376 | |
| 1377 | mlx5e_build_common_cq_param(priv, param); |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1378 | |
| 1379 | param->cq_period_mode = priv->params.rx_cq_period_mode; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1380 | } |
| 1381 | |
| 1382 | static void mlx5e_build_tx_cq_param(struct mlx5e_priv *priv, |
| 1383 | struct mlx5e_cq_param *param) |
| 1384 | { |
| 1385 | void *cqc = param->cqc; |
| 1386 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1387 | MLX5_SET(cqc, cqc, log_cq_size, priv->params.log_sq_size); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1388 | |
| 1389 | mlx5e_build_common_cq_param(priv, param); |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1390 | |
| 1391 | param->cq_period_mode = MLX5_CQ_PERIOD_MODE_START_FROM_EQE; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1392 | } |
| 1393 | |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1394 | static void mlx5e_build_ico_cq_param(struct mlx5e_priv *priv, |
| 1395 | struct mlx5e_cq_param *param, |
| 1396 | u8 log_wq_size) |
| 1397 | { |
| 1398 | void *cqc = param->cqc; |
| 1399 | |
| 1400 | MLX5_SET(cqc, cqc, log_cq_size, log_wq_size); |
| 1401 | |
| 1402 | mlx5e_build_common_cq_param(priv, param); |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 1403 | |
| 1404 | param->cq_period_mode = MLX5_CQ_PERIOD_MODE_START_FROM_EQE; |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1405 | } |
| 1406 | |
| 1407 | static void mlx5e_build_icosq_param(struct mlx5e_priv *priv, |
| 1408 | struct mlx5e_sq_param *param, |
| 1409 | u8 log_wq_size) |
| 1410 | { |
| 1411 | void *sqc = param->sqc; |
| 1412 | void *wq = MLX5_ADDR_OF(sqc, sqc, wq); |
| 1413 | |
| 1414 | mlx5e_build_sq_param_common(priv, param); |
| 1415 | |
| 1416 | MLX5_SET(wq, wq, log_wq_sz, log_wq_size); |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 1417 | MLX5_SET(sqc, sqc, reg_umr, MLX5_CAP_ETH(priv->mdev, reg_umr_sq)); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1418 | |
| 1419 | param->icosq = true; |
| 1420 | } |
| 1421 | |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1422 | static void mlx5e_build_channel_param(struct mlx5e_priv *priv, struct mlx5e_channel_param *cparam) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1423 | { |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 1424 | u8 icosq_log_wq_sz = MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1425 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1426 | mlx5e_build_rq_param(priv, &cparam->rq); |
| 1427 | mlx5e_build_sq_param(priv, &cparam->sq); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1428 | mlx5e_build_icosq_param(priv, &cparam->icosq, icosq_log_wq_sz); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1429 | mlx5e_build_rx_cq_param(priv, &cparam->rx_cq); |
| 1430 | mlx5e_build_tx_cq_param(priv, &cparam->tx_cq); |
Tariq Toukan | d3c9bc2 | 2016-04-20 22:02:14 +0300 | [diff] [blame] | 1431 | mlx5e_build_ico_cq_param(priv, &cparam->icosq_cq, icosq_log_wq_sz); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1432 | } |
| 1433 | |
| 1434 | static int mlx5e_open_channels(struct mlx5e_priv *priv) |
| 1435 | { |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1436 | struct mlx5e_channel_param *cparam; |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 1437 | int nch = priv->params.num_channels; |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1438 | int err = -ENOMEM; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1439 | int i; |
| 1440 | int j; |
| 1441 | |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 1442 | priv->channel = kcalloc(nch, sizeof(struct mlx5e_channel *), |
| 1443 | GFP_KERNEL); |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1444 | |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 1445 | priv->txq_to_sq_map = kcalloc(nch * priv->params.num_tc, |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1446 | sizeof(struct mlx5e_sq *), GFP_KERNEL); |
| 1447 | |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1448 | cparam = kzalloc(sizeof(struct mlx5e_channel_param), GFP_KERNEL); |
| 1449 | |
| 1450 | if (!priv->channel || !priv->txq_to_sq_map || !cparam) |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1451 | goto err_free_txq_to_sq_map; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1452 | |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1453 | mlx5e_build_channel_param(priv, cparam); |
| 1454 | |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 1455 | for (i = 0; i < nch; i++) { |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1456 | err = mlx5e_open_channel(priv, i, cparam, &priv->channel[i]); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1457 | if (err) |
| 1458 | goto err_close_channels; |
| 1459 | } |
| 1460 | |
Achiad Shochat | a4418a6 | 2015-07-29 15:05:41 +0300 | [diff] [blame] | 1461 | for (j = 0; j < nch; j++) { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1462 | err = mlx5e_wait_for_min_rx_wqes(&priv->channel[j]->rq); |
| 1463 | if (err) |
| 1464 | goto err_close_channels; |
| 1465 | } |
| 1466 | |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1467 | kfree(cparam); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1468 | return 0; |
| 1469 | |
| 1470 | err_close_channels: |
| 1471 | for (i--; i >= 0; i--) |
| 1472 | mlx5e_close_channel(priv->channel[i]); |
| 1473 | |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1474 | err_free_txq_to_sq_map: |
| 1475 | kfree(priv->txq_to_sq_map); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1476 | kfree(priv->channel); |
Arnd Bergmann | 6b87663 | 2016-04-26 17:52:33 +0200 | [diff] [blame] | 1477 | kfree(cparam); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1478 | |
| 1479 | return err; |
| 1480 | } |
| 1481 | |
| 1482 | static void mlx5e_close_channels(struct mlx5e_priv *priv) |
| 1483 | { |
| 1484 | int i; |
| 1485 | |
| 1486 | for (i = 0; i < priv->params.num_channels; i++) |
| 1487 | mlx5e_close_channel(priv->channel[i]); |
| 1488 | |
Saeed Mahameed | 03289b8 | 2015-06-23 17:14:14 +0300 | [diff] [blame] | 1489 | kfree(priv->txq_to_sq_map); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1490 | kfree(priv->channel); |
| 1491 | } |
| 1492 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1493 | static int mlx5e_rx_hash_fn(int hfunc) |
| 1494 | { |
| 1495 | return (hfunc == ETH_RSS_HASH_TOP) ? |
| 1496 | MLX5_RX_HASH_FN_TOEPLITZ : |
| 1497 | MLX5_RX_HASH_FN_INVERTED_XOR8; |
| 1498 | } |
| 1499 | |
| 1500 | static int mlx5e_bits_invert(unsigned long a, int size) |
| 1501 | { |
| 1502 | int inv = 0; |
| 1503 | int i; |
| 1504 | |
| 1505 | for (i = 0; i < size; i++) |
| 1506 | inv |= (test_bit(size - i - 1, &a) ? 1 : 0) << i; |
| 1507 | |
| 1508 | return inv; |
| 1509 | } |
| 1510 | |
Achiad Shochat | 936896e | 2015-08-16 16:04:46 +0300 | [diff] [blame] | 1511 | static void mlx5e_fill_indir_rqt_rqns(struct mlx5e_priv *priv, void *rqtc) |
| 1512 | { |
| 1513 | int i; |
| 1514 | |
| 1515 | for (i = 0; i < MLX5E_INDIR_RQT_SIZE; i++) { |
| 1516 | int ix = i; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1517 | u32 rqn; |
Achiad Shochat | 936896e | 2015-08-16 16:04:46 +0300 | [diff] [blame] | 1518 | |
| 1519 | if (priv->params.rss_hfunc == ETH_RSS_HASH_XOR) |
| 1520 | ix = mlx5e_bits_invert(i, MLX5E_LOG_INDIR_RQT_SIZE); |
| 1521 | |
Achiad Shochat | 2d75b2b | 2015-08-16 16:04:47 +0300 | [diff] [blame] | 1522 | ix = priv->params.indirection_rqt[ix]; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1523 | rqn = test_bit(MLX5E_STATE_OPENED, &priv->state) ? |
| 1524 | priv->channel[ix]->rq.rqn : |
| 1525 | priv->drop_rq.rqn; |
| 1526 | MLX5_SET(rqtc, rqtc, rq_num[i], rqn); |
Achiad Shochat | 936896e | 2015-08-16 16:04:46 +0300 | [diff] [blame] | 1527 | } |
| 1528 | } |
| 1529 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1530 | static void mlx5e_fill_direct_rqt_rqn(struct mlx5e_priv *priv, void *rqtc, |
| 1531 | int ix) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1532 | { |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1533 | u32 rqn = test_bit(MLX5E_STATE_OPENED, &priv->state) ? |
| 1534 | priv->channel[ix]->rq.rqn : |
| 1535 | priv->drop_rq.rqn; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1536 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1537 | MLX5_SET(rqtc, rqtc, rq_num[0], rqn); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1538 | } |
| 1539 | |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1540 | static int mlx5e_create_rqt(struct mlx5e_priv *priv, int sz, |
| 1541 | int ix, struct mlx5e_rqt *rqt) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1542 | { |
| 1543 | struct mlx5_core_dev *mdev = priv->mdev; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1544 | void *rqtc; |
| 1545 | int inlen; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1546 | int err; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1547 | u32 *in; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1548 | |
| 1549 | inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; |
| 1550 | in = mlx5_vzalloc(inlen); |
| 1551 | if (!in) |
| 1552 | return -ENOMEM; |
| 1553 | |
| 1554 | rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); |
| 1555 | |
| 1556 | MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); |
| 1557 | MLX5_SET(rqtc, rqtc, rqt_max_size, sz); |
| 1558 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1559 | if (sz > 1) /* RSS */ |
| 1560 | mlx5e_fill_indir_rqt_rqns(priv, rqtc); |
| 1561 | else |
| 1562 | mlx5e_fill_direct_rqt_rqn(priv, rqtc, ix); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1563 | |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1564 | err = mlx5_core_create_rqt(mdev, in, inlen, &rqt->rqtn); |
| 1565 | if (!err) |
| 1566 | rqt->enabled = true; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1567 | |
| 1568 | kvfree(in); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1569 | return err; |
| 1570 | } |
| 1571 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1572 | void mlx5e_destroy_rqt(struct mlx5e_priv *priv, struct mlx5e_rqt *rqt) |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1573 | { |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1574 | rqt->enabled = false; |
| 1575 | mlx5_core_destroy_rqt(priv->mdev, rqt->rqtn); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1576 | } |
| 1577 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 1578 | static int mlx5e_create_indirect_rqts(struct mlx5e_priv *priv) |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1579 | { |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 1580 | struct mlx5e_rqt *rqt = &priv->indir_rqt; |
| 1581 | |
| 1582 | return mlx5e_create_rqt(priv, MLX5E_INDIR_RQT_SIZE, 0, rqt); |
| 1583 | } |
| 1584 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1585 | int mlx5e_create_direct_rqts(struct mlx5e_priv *priv) |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 1586 | { |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1587 | struct mlx5e_rqt *rqt; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1588 | int err; |
| 1589 | int ix; |
| 1590 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 1591 | for (ix = 0; ix < priv->profile->max_nch(priv->mdev); ix++) { |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1592 | rqt = &priv->direct_tir[ix].rqt; |
| 1593 | err = mlx5e_create_rqt(priv, 1 /*size */, ix, rqt); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1594 | if (err) |
| 1595 | goto err_destroy_rqts; |
| 1596 | } |
| 1597 | |
| 1598 | return 0; |
| 1599 | |
| 1600 | err_destroy_rqts: |
| 1601 | for (ix--; ix >= 0; ix--) |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1602 | mlx5e_destroy_rqt(priv, &priv->direct_tir[ix].rqt); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1603 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1604 | return err; |
| 1605 | } |
| 1606 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1607 | int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int ix) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1608 | { |
| 1609 | struct mlx5_core_dev *mdev = priv->mdev; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1610 | void *rqtc; |
| 1611 | int inlen; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1612 | u32 *in; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1613 | int err; |
| 1614 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1615 | inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32) * sz; |
| 1616 | in = mlx5_vzalloc(inlen); |
| 1617 | if (!in) |
| 1618 | return -ENOMEM; |
| 1619 | |
| 1620 | rqtc = MLX5_ADDR_OF(modify_rqt_in, in, ctx); |
| 1621 | |
| 1622 | MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1623 | if (sz > 1) /* RSS */ |
| 1624 | mlx5e_fill_indir_rqt_rqns(priv, rqtc); |
| 1625 | else |
| 1626 | mlx5e_fill_direct_rqt_rqn(priv, rqtc, ix); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1627 | |
| 1628 | MLX5_SET(modify_rqt_in, in, bitmask.rqn_list, 1); |
| 1629 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1630 | err = mlx5_core_modify_rqt(mdev, rqtn, in, inlen); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1631 | |
| 1632 | kvfree(in); |
| 1633 | |
| 1634 | return err; |
| 1635 | } |
| 1636 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1637 | static void mlx5e_redirect_rqts(struct mlx5e_priv *priv) |
| 1638 | { |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1639 | u32 rqtn; |
| 1640 | int ix; |
| 1641 | |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1642 | if (priv->indir_rqt.enabled) { |
| 1643 | rqtn = priv->indir_rqt.rqtn; |
| 1644 | mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0); |
| 1645 | } |
| 1646 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1647 | for (ix = 0; ix < priv->params.num_channels; ix++) { |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 1648 | if (!priv->direct_tir[ix].rqt.enabled) |
| 1649 | continue; |
| 1650 | rqtn = priv->direct_tir[ix].rqt.rqtn; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1651 | mlx5e_redirect_rqt(priv, rqtn, 1, ix); |
| 1652 | } |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1653 | } |
| 1654 | |
| 1655 | static void mlx5e_build_tir_ctx_lro(void *tirc, struct mlx5e_priv *priv) |
| 1656 | { |
| 1657 | if (!priv->params.lro_en) |
| 1658 | return; |
| 1659 | |
| 1660 | #define ROUGH_MAX_L2_L3_HDR_SZ 256 |
| 1661 | |
| 1662 | MLX5_SET(tirc, tirc, lro_enable_mask, |
| 1663 | MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO | |
| 1664 | MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO); |
| 1665 | MLX5_SET(tirc, tirc, lro_max_ip_payload_size, |
| 1666 | (priv->params.lro_wqe_sz - |
| 1667 | ROUGH_MAX_L2_L3_HDR_SZ) >> 8); |
| 1668 | MLX5_SET(tirc, tirc, lro_timeout_period_usecs, |
| 1669 | MLX5_CAP_ETH(priv->mdev, |
Achiad Shochat | d9a4027 | 2015-08-16 16:04:49 +0300 | [diff] [blame] | 1670 | lro_timer_supported_periods[2])); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1671 | } |
| 1672 | |
Tariq Toukan | bdfc028 | 2016-02-29 21:17:12 +0200 | [diff] [blame] | 1673 | void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv) |
| 1674 | { |
| 1675 | MLX5_SET(tirc, tirc, rx_hash_fn, |
| 1676 | mlx5e_rx_hash_fn(priv->params.rss_hfunc)); |
| 1677 | if (priv->params.rss_hfunc == ETH_RSS_HASH_TOP) { |
| 1678 | void *rss_key = MLX5_ADDR_OF(tirc, tirc, |
| 1679 | rx_hash_toeplitz_key); |
| 1680 | size_t len = MLX5_FLD_SZ_BYTES(tirc, |
| 1681 | rx_hash_toeplitz_key); |
| 1682 | |
| 1683 | MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); |
| 1684 | memcpy(rss_key, priv->params.toeplitz_hash_key, len); |
| 1685 | } |
| 1686 | } |
| 1687 | |
Tariq Toukan | ab0394f | 2016-02-29 21:17:10 +0200 | [diff] [blame] | 1688 | static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1689 | { |
| 1690 | struct mlx5_core_dev *mdev = priv->mdev; |
| 1691 | |
| 1692 | void *in; |
| 1693 | void *tirc; |
| 1694 | int inlen; |
| 1695 | int err; |
Tariq Toukan | ab0394f | 2016-02-29 21:17:10 +0200 | [diff] [blame] | 1696 | int tt; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1697 | int ix; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1698 | |
| 1699 | inlen = MLX5_ST_SZ_BYTES(modify_tir_in); |
| 1700 | in = mlx5_vzalloc(inlen); |
| 1701 | if (!in) |
| 1702 | return -ENOMEM; |
| 1703 | |
| 1704 | MLX5_SET(modify_tir_in, in, bitmask.lro, 1); |
| 1705 | tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx); |
| 1706 | |
| 1707 | mlx5e_build_tir_ctx_lro(tirc, priv); |
| 1708 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1709 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 1710 | err = mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1711 | inlen); |
Tariq Toukan | ab0394f | 2016-02-29 21:17:10 +0200 | [diff] [blame] | 1712 | if (err) |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1713 | goto free_in; |
Tariq Toukan | ab0394f | 2016-02-29 21:17:10 +0200 | [diff] [blame] | 1714 | } |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1715 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 1716 | for (ix = 0; ix < priv->profile->max_nch(priv->mdev); ix++) { |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 1717 | err = mlx5_core_modify_tir(mdev, priv->direct_tir[ix].tirn, |
| 1718 | in, inlen); |
| 1719 | if (err) |
| 1720 | goto free_in; |
| 1721 | } |
| 1722 | |
| 1723 | free_in: |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1724 | kvfree(in); |
| 1725 | |
| 1726 | return err; |
| 1727 | } |
| 1728 | |
Saeed Mahameed | cd255ef | 2016-04-22 00:33:05 +0300 | [diff] [blame] | 1729 | static int mlx5e_set_mtu(struct mlx5e_priv *priv, u16 mtu) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1730 | { |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1731 | struct mlx5_core_dev *mdev = priv->mdev; |
Saeed Mahameed | cd255ef | 2016-04-22 00:33:05 +0300 | [diff] [blame] | 1732 | u16 hw_mtu = MLX5E_SW2HW_MTU(mtu); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1733 | int err; |
| 1734 | |
Saeed Mahameed | cd255ef | 2016-04-22 00:33:05 +0300 | [diff] [blame] | 1735 | err = mlx5_set_port_mtu(mdev, hw_mtu, 1); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1736 | if (err) |
| 1737 | return err; |
| 1738 | |
Saeed Mahameed | cd255ef | 2016-04-22 00:33:05 +0300 | [diff] [blame] | 1739 | /* Update vport context MTU */ |
| 1740 | mlx5_modify_nic_vport_mtu(mdev, hw_mtu); |
| 1741 | return 0; |
| 1742 | } |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1743 | |
Saeed Mahameed | cd255ef | 2016-04-22 00:33:05 +0300 | [diff] [blame] | 1744 | static void mlx5e_query_mtu(struct mlx5e_priv *priv, u16 *mtu) |
| 1745 | { |
| 1746 | struct mlx5_core_dev *mdev = priv->mdev; |
| 1747 | u16 hw_mtu = 0; |
| 1748 | int err; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1749 | |
Saeed Mahameed | cd255ef | 2016-04-22 00:33:05 +0300 | [diff] [blame] | 1750 | err = mlx5_query_nic_vport_mtu(mdev, &hw_mtu); |
| 1751 | if (err || !hw_mtu) /* fallback to port oper mtu */ |
| 1752 | mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1); |
| 1753 | |
| 1754 | *mtu = MLX5E_HW2SW_MTU(hw_mtu); |
| 1755 | } |
| 1756 | |
| 1757 | static int mlx5e_set_dev_port_mtu(struct net_device *netdev) |
| 1758 | { |
| 1759 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 1760 | u16 mtu; |
| 1761 | int err; |
| 1762 | |
| 1763 | err = mlx5e_set_mtu(priv, netdev->mtu); |
| 1764 | if (err) |
| 1765 | return err; |
| 1766 | |
| 1767 | mlx5e_query_mtu(priv, &mtu); |
| 1768 | if (mtu != netdev->mtu) |
| 1769 | netdev_warn(netdev, "%s: VPort MTU %d is different than netdev mtu %d\n", |
| 1770 | __func__, mtu, netdev->mtu); |
| 1771 | |
| 1772 | netdev->mtu = mtu; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1773 | return 0; |
| 1774 | } |
| 1775 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 1776 | static void mlx5e_netdev_set_tcs(struct net_device *netdev) |
| 1777 | { |
| 1778 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 1779 | int nch = priv->params.num_channels; |
| 1780 | int ntc = priv->params.num_tc; |
| 1781 | int tc; |
| 1782 | |
| 1783 | netdev_reset_tc(netdev); |
| 1784 | |
| 1785 | if (ntc == 1) |
| 1786 | return; |
| 1787 | |
| 1788 | netdev_set_num_tc(netdev, ntc); |
| 1789 | |
Rana Shahout | 7ccdd08 | 2016-06-30 17:34:48 +0300 | [diff] [blame] | 1790 | /* Map netdev TCs to offset 0 |
| 1791 | * We have our own UP to TXQ mapping for QoS |
| 1792 | */ |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 1793 | for (tc = 0; tc < ntc; tc++) |
Rana Shahout | 7ccdd08 | 2016-06-30 17:34:48 +0300 | [diff] [blame] | 1794 | netdev_set_tc_queue(netdev, tc, nch, 0); |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 1795 | } |
| 1796 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1797 | int mlx5e_open_locked(struct net_device *netdev) |
| 1798 | { |
| 1799 | struct mlx5e_priv *priv = netdev_priv(netdev); |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1800 | struct mlx5_core_dev *mdev = priv->mdev; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1801 | int num_txqs; |
| 1802 | int err; |
| 1803 | |
| 1804 | set_bit(MLX5E_STATE_OPENED, &priv->state); |
| 1805 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 1806 | mlx5e_netdev_set_tcs(netdev); |
| 1807 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1808 | num_txqs = priv->params.num_channels * priv->params.num_tc; |
| 1809 | netif_set_real_num_tx_queues(netdev, num_txqs); |
| 1810 | netif_set_real_num_rx_queues(netdev, priv->params.num_channels); |
| 1811 | |
| 1812 | err = mlx5e_set_dev_port_mtu(netdev); |
| 1813 | if (err) |
Achiad Shochat | 343b29f | 2015-09-25 10:49:09 +0300 | [diff] [blame] | 1814 | goto err_clear_state_opened_flag; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1815 | |
| 1816 | err = mlx5e_open_channels(priv); |
| 1817 | if (err) { |
| 1818 | netdev_err(netdev, "%s: mlx5e_open_channels failed, %d\n", |
| 1819 | __func__, err); |
Achiad Shochat | 343b29f | 2015-09-25 10:49:09 +0300 | [diff] [blame] | 1820 | goto err_clear_state_opened_flag; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1821 | } |
| 1822 | |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 1823 | err = mlx5e_refresh_tirs_self_loopback_enable(priv->mdev); |
Tariq Toukan | 6618996 | 2015-11-12 19:35:26 +0200 | [diff] [blame] | 1824 | if (err) { |
| 1825 | netdev_err(netdev, "%s: mlx5e_refresh_tirs_self_loopback_enable failed, %d\n", |
| 1826 | __func__, err); |
| 1827 | goto err_close_channels; |
| 1828 | } |
| 1829 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1830 | mlx5e_redirect_rqts(priv); |
Tariq Toukan | ce89ef3 | 2016-03-02 00:13:33 +0200 | [diff] [blame] | 1831 | mlx5e_update_carrier(priv); |
Eran Ben Elisha | ef9814d | 2015-12-29 14:58:31 +0200 | [diff] [blame] | 1832 | mlx5e_timestamp_init(priv); |
Maor Gottlieb | 5a7b27e | 2016-04-29 01:36:39 +0300 | [diff] [blame] | 1833 | #ifdef CONFIG_RFS_ACCEL |
| 1834 | priv->netdev->rx_cpu_rmap = priv->mdev->rmap; |
| 1835 | #endif |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1836 | if (priv->profile->update_stats) |
| 1837 | queue_delayed_work(priv->wq, &priv->update_stats_work, 0); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1838 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1839 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) { |
| 1840 | err = mlx5e_add_sqs_fwd_rules(priv); |
| 1841 | if (err) |
| 1842 | goto err_close_channels; |
| 1843 | } |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1844 | return 0; |
Achiad Shochat | 343b29f | 2015-09-25 10:49:09 +0300 | [diff] [blame] | 1845 | |
Tariq Toukan | 6618996 | 2015-11-12 19:35:26 +0200 | [diff] [blame] | 1846 | err_close_channels: |
| 1847 | mlx5e_close_channels(priv); |
Achiad Shochat | 343b29f | 2015-09-25 10:49:09 +0300 | [diff] [blame] | 1848 | err_clear_state_opened_flag: |
| 1849 | clear_bit(MLX5E_STATE_OPENED, &priv->state); |
| 1850 | return err; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1851 | } |
| 1852 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1853 | int mlx5e_open(struct net_device *netdev) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1854 | { |
| 1855 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 1856 | int err; |
| 1857 | |
| 1858 | mutex_lock(&priv->state_lock); |
| 1859 | err = mlx5e_open_locked(netdev); |
| 1860 | mutex_unlock(&priv->state_lock); |
| 1861 | |
| 1862 | return err; |
| 1863 | } |
| 1864 | |
| 1865 | int mlx5e_close_locked(struct net_device *netdev) |
| 1866 | { |
| 1867 | struct mlx5e_priv *priv = netdev_priv(netdev); |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1868 | struct mlx5_core_dev *mdev = priv->mdev; |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1869 | |
Achiad Shochat | a198574 | 2015-11-03 08:07:18 +0200 | [diff] [blame] | 1870 | /* May already be CLOSED in case a previous configuration operation |
| 1871 | * (e.g RX/TX queue size change) that involves close&open failed. |
| 1872 | */ |
| 1873 | if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) |
| 1874 | return 0; |
| 1875 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1876 | clear_bit(MLX5E_STATE_OPENED, &priv->state); |
| 1877 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1878 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) |
| 1879 | mlx5e_remove_sqs_fwd_rules(priv); |
| 1880 | |
Eran Ben Elisha | ef9814d | 2015-12-29 14:58:31 +0200 | [diff] [blame] | 1881 | mlx5e_timestamp_cleanup(priv); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1882 | netif_carrier_off(priv->netdev); |
Tariq Toukan | ce89ef3 | 2016-03-02 00:13:33 +0200 | [diff] [blame] | 1883 | mlx5e_redirect_rqts(priv); |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1884 | mlx5e_close_channels(priv); |
| 1885 | |
| 1886 | return 0; |
| 1887 | } |
| 1888 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 1889 | int mlx5e_close(struct net_device *netdev) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 1890 | { |
| 1891 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 1892 | int err; |
| 1893 | |
| 1894 | mutex_lock(&priv->state_lock); |
| 1895 | err = mlx5e_close_locked(netdev); |
| 1896 | mutex_unlock(&priv->state_lock); |
| 1897 | |
| 1898 | return err; |
| 1899 | } |
| 1900 | |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 1901 | static int mlx5e_create_drop_rq(struct mlx5e_priv *priv, |
| 1902 | struct mlx5e_rq *rq, |
| 1903 | struct mlx5e_rq_param *param) |
| 1904 | { |
| 1905 | struct mlx5_core_dev *mdev = priv->mdev; |
| 1906 | void *rqc = param->rqc; |
| 1907 | void *rqc_wq = MLX5_ADDR_OF(rqc, rqc, wq); |
| 1908 | int err; |
| 1909 | |
| 1910 | param->wq.db_numa_node = param->wq.buf_numa_node; |
| 1911 | |
| 1912 | err = mlx5_wq_ll_create(mdev, ¶m->wq, rqc_wq, &rq->wq, |
| 1913 | &rq->wq_ctrl); |
| 1914 | if (err) |
| 1915 | return err; |
| 1916 | |
| 1917 | rq->priv = priv; |
| 1918 | |
| 1919 | return 0; |
| 1920 | } |
| 1921 | |
| 1922 | static int mlx5e_create_drop_cq(struct mlx5e_priv *priv, |
| 1923 | struct mlx5e_cq *cq, |
| 1924 | struct mlx5e_cq_param *param) |
| 1925 | { |
| 1926 | struct mlx5_core_dev *mdev = priv->mdev; |
| 1927 | struct mlx5_core_cq *mcq = &cq->mcq; |
| 1928 | int eqn_not_used; |
Doron Tsur | 0b6e26c | 2016-01-17 11:25:47 +0200 | [diff] [blame] | 1929 | unsigned int irqn; |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 1930 | int err; |
| 1931 | |
| 1932 | err = mlx5_cqwq_create(mdev, ¶m->wq, param->cqc, &cq->wq, |
| 1933 | &cq->wq_ctrl); |
| 1934 | if (err) |
| 1935 | return err; |
| 1936 | |
| 1937 | mlx5_vector2eqn(mdev, param->eq_ix, &eqn_not_used, &irqn); |
| 1938 | |
| 1939 | mcq->cqe_sz = 64; |
| 1940 | mcq->set_ci_db = cq->wq_ctrl.db.db; |
| 1941 | mcq->arm_db = cq->wq_ctrl.db.db + 1; |
| 1942 | *mcq->set_ci_db = 0; |
| 1943 | *mcq->arm_db = 0; |
| 1944 | mcq->vector = param->eq_ix; |
| 1945 | mcq->comp = mlx5e_completion_event; |
| 1946 | mcq->event = mlx5e_cq_error_event; |
| 1947 | mcq->irqn = irqn; |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 1948 | mcq->uar = &mdev->mlx5e_res.cq_uar; |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 1949 | |
| 1950 | cq->priv = priv; |
| 1951 | |
| 1952 | return 0; |
| 1953 | } |
| 1954 | |
| 1955 | static int mlx5e_open_drop_rq(struct mlx5e_priv *priv) |
| 1956 | { |
| 1957 | struct mlx5e_cq_param cq_param; |
| 1958 | struct mlx5e_rq_param rq_param; |
| 1959 | struct mlx5e_rq *rq = &priv->drop_rq; |
| 1960 | struct mlx5e_cq *cq = &priv->drop_rq.cq; |
| 1961 | int err; |
| 1962 | |
| 1963 | memset(&cq_param, 0, sizeof(cq_param)); |
| 1964 | memset(&rq_param, 0, sizeof(rq_param)); |
Tariq Toukan | 556dd1b | 2016-03-02 00:13:36 +0200 | [diff] [blame] | 1965 | mlx5e_build_drop_rq_param(&rq_param); |
Achiad Shochat | 50cfa25 | 2015-08-04 14:05:41 +0300 | [diff] [blame] | 1966 | |
| 1967 | err = mlx5e_create_drop_cq(priv, cq, &cq_param); |
| 1968 | if (err) |
| 1969 | return err; |
| 1970 | |
| 1971 | err = mlx5e_enable_cq(cq, &cq_param); |
| 1972 | if (err) |
| 1973 | goto err_destroy_cq; |
| 1974 | |
| 1975 | err = mlx5e_create_drop_rq(priv, rq, &rq_param); |
| 1976 | if (err) |
| 1977 | goto err_disable_cq; |
| 1978 | |
| 1979 | err = mlx5e_enable_rq(rq, &rq_param); |
| 1980 | if (err) |
| 1981 | goto err_destroy_rq; |
| 1982 | |
| 1983 | return 0; |
| 1984 | |
| 1985 | err_destroy_rq: |
| 1986 | mlx5e_destroy_rq(&priv->drop_rq); |
| 1987 | |
| 1988 | err_disable_cq: |
| 1989 | mlx5e_disable_cq(&priv->drop_rq.cq); |
| 1990 | |
| 1991 | err_destroy_cq: |
| 1992 | mlx5e_destroy_cq(&priv->drop_rq.cq); |
| 1993 | |
| 1994 | return err; |
| 1995 | } |
| 1996 | |
| 1997 | static void mlx5e_close_drop_rq(struct mlx5e_priv *priv) |
| 1998 | { |
| 1999 | mlx5e_disable_rq(&priv->drop_rq); |
| 2000 | mlx5e_destroy_rq(&priv->drop_rq); |
| 2001 | mlx5e_disable_cq(&priv->drop_rq.cq); |
| 2002 | mlx5e_destroy_cq(&priv->drop_rq.cq); |
| 2003 | } |
| 2004 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 2005 | static int mlx5e_create_tis(struct mlx5e_priv *priv, int tc) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2006 | { |
| 2007 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2008 | u32 in[MLX5_ST_SZ_DW(create_tis_in)]; |
| 2009 | void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); |
| 2010 | |
| 2011 | memset(in, 0, sizeof(in)); |
| 2012 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 2013 | MLX5_SET(tisc, tisc, prio, tc << 1); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 2014 | MLX5_SET(tisc, tisc, transport_domain, mdev->mlx5e_res.td.tdn); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2015 | |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 2016 | return mlx5_core_create_tis(mdev, in, sizeof(in), &priv->tisn[tc]); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2017 | } |
| 2018 | |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 2019 | static void mlx5e_destroy_tis(struct mlx5e_priv *priv, int tc) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2020 | { |
Haggai Abramonvsky | 7db22ff | 2015-06-04 19:30:37 +0300 | [diff] [blame] | 2021 | mlx5_core_destroy_tis(priv->mdev, priv->tisn[tc]); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2022 | } |
| 2023 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 2024 | int mlx5e_create_tises(struct mlx5e_priv *priv) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2025 | { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2026 | int err; |
| 2027 | int tc; |
| 2028 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2029 | for (tc = 0; tc < priv->profile->max_tc; tc++) { |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 2030 | err = mlx5e_create_tis(priv, tc); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2031 | if (err) |
| 2032 | goto err_close_tises; |
| 2033 | } |
| 2034 | |
| 2035 | return 0; |
| 2036 | |
| 2037 | err_close_tises: |
| 2038 | for (tc--; tc >= 0; tc--) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 2039 | mlx5e_destroy_tis(priv, tc); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2040 | |
| 2041 | return err; |
| 2042 | } |
| 2043 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 2044 | void mlx5e_cleanup_nic_tx(struct mlx5e_priv *priv) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2045 | { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2046 | int tc; |
| 2047 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2048 | for (tc = 0; tc < priv->profile->max_tc; tc++) |
Achiad Shochat | 40ab6a6 | 2015-08-04 14:05:44 +0300 | [diff] [blame] | 2049 | mlx5e_destroy_tis(priv, tc); |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 2050 | } |
| 2051 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2052 | static void mlx5e_build_indir_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, |
| 2053 | enum mlx5e_traffic_types tt) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2054 | { |
| 2055 | void *hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); |
| 2056 | |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 2057 | MLX5_SET(tirc, tirc, transport_domain, priv->mdev->mlx5e_res.td.tdn); |
Achiad Shochat | 3191e05f | 2015-06-11 14:47:33 +0300 | [diff] [blame] | 2058 | |
Achiad Shochat | 5a6f8ae | 2015-07-23 23:36:00 +0300 | [diff] [blame] | 2059 | #define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\ |
| 2060 | MLX5_HASH_FIELD_SEL_DST_IP) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2061 | |
Achiad Shochat | 5a6f8ae | 2015-07-23 23:36:00 +0300 | [diff] [blame] | 2062 | #define MLX5_HASH_IP_L4PORTS (MLX5_HASH_FIELD_SEL_SRC_IP |\ |
| 2063 | MLX5_HASH_FIELD_SEL_DST_IP |\ |
| 2064 | MLX5_HASH_FIELD_SEL_L4_SPORT |\ |
| 2065 | MLX5_HASH_FIELD_SEL_L4_DPORT) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2066 | |
Achiad Shochat | a741749 | 2015-07-23 23:36:01 +0300 | [diff] [blame] | 2067 | #define MLX5_HASH_IP_IPSEC_SPI (MLX5_HASH_FIELD_SEL_SRC_IP |\ |
| 2068 | MLX5_HASH_FIELD_SEL_DST_IP |\ |
| 2069 | MLX5_HASH_FIELD_SEL_IPSEC_SPI) |
| 2070 | |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 2071 | mlx5e_build_tir_ctx_lro(tirc, priv); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2072 | |
Achiad Shochat | 4cbeaff | 2015-08-04 14:05:40 +0300 | [diff] [blame] | 2073 | MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 2074 | MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2075 | mlx5e_build_tir_ctx_hash(tirc, priv); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2076 | |
| 2077 | switch (tt) { |
| 2078 | case MLX5E_TT_IPV4_TCP: |
| 2079 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2080 | MLX5_L3_PROT_TYPE_IPV4); |
| 2081 | MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, |
| 2082 | MLX5_L4_PROT_TYPE_TCP); |
| 2083 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
Achiad Shochat | 5a6f8ae | 2015-07-23 23:36:00 +0300 | [diff] [blame] | 2084 | MLX5_HASH_IP_L4PORTS); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2085 | break; |
| 2086 | |
| 2087 | case MLX5E_TT_IPV6_TCP: |
| 2088 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2089 | MLX5_L3_PROT_TYPE_IPV6); |
| 2090 | MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, |
| 2091 | MLX5_L4_PROT_TYPE_TCP); |
| 2092 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
Achiad Shochat | 5a6f8ae | 2015-07-23 23:36:00 +0300 | [diff] [blame] | 2093 | MLX5_HASH_IP_L4PORTS); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2094 | break; |
| 2095 | |
| 2096 | case MLX5E_TT_IPV4_UDP: |
| 2097 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2098 | MLX5_L3_PROT_TYPE_IPV4); |
| 2099 | MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, |
| 2100 | MLX5_L4_PROT_TYPE_UDP); |
| 2101 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
Achiad Shochat | 5a6f8ae | 2015-07-23 23:36:00 +0300 | [diff] [blame] | 2102 | MLX5_HASH_IP_L4PORTS); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2103 | break; |
| 2104 | |
| 2105 | case MLX5E_TT_IPV6_UDP: |
| 2106 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2107 | MLX5_L3_PROT_TYPE_IPV6); |
| 2108 | MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, |
| 2109 | MLX5_L4_PROT_TYPE_UDP); |
| 2110 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
Achiad Shochat | 5a6f8ae | 2015-07-23 23:36:00 +0300 | [diff] [blame] | 2111 | MLX5_HASH_IP_L4PORTS); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2112 | break; |
| 2113 | |
Achiad Shochat | a741749 | 2015-07-23 23:36:01 +0300 | [diff] [blame] | 2114 | case MLX5E_TT_IPV4_IPSEC_AH: |
| 2115 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2116 | MLX5_L3_PROT_TYPE_IPV4); |
| 2117 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
| 2118 | MLX5_HASH_IP_IPSEC_SPI); |
| 2119 | break; |
| 2120 | |
| 2121 | case MLX5E_TT_IPV6_IPSEC_AH: |
| 2122 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2123 | MLX5_L3_PROT_TYPE_IPV6); |
| 2124 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
| 2125 | MLX5_HASH_IP_IPSEC_SPI); |
| 2126 | break; |
| 2127 | |
| 2128 | case MLX5E_TT_IPV4_IPSEC_ESP: |
| 2129 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2130 | MLX5_L3_PROT_TYPE_IPV4); |
| 2131 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
| 2132 | MLX5_HASH_IP_IPSEC_SPI); |
| 2133 | break; |
| 2134 | |
| 2135 | case MLX5E_TT_IPV6_IPSEC_ESP: |
| 2136 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2137 | MLX5_L3_PROT_TYPE_IPV6); |
| 2138 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
| 2139 | MLX5_HASH_IP_IPSEC_SPI); |
| 2140 | break; |
| 2141 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2142 | case MLX5E_TT_IPV4: |
| 2143 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2144 | MLX5_L3_PROT_TYPE_IPV4); |
| 2145 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
| 2146 | MLX5_HASH_IP); |
| 2147 | break; |
| 2148 | |
| 2149 | case MLX5E_TT_IPV6: |
| 2150 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
| 2151 | MLX5_L3_PROT_TYPE_IPV6); |
| 2152 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, |
| 2153 | MLX5_HASH_IP); |
| 2154 | break; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2155 | default: |
| 2156 | WARN_ONCE(true, |
| 2157 | "mlx5e_build_indir_tir_ctx: bad traffic type!\n"); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2158 | } |
| 2159 | } |
| 2160 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2161 | static void mlx5e_build_direct_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, |
| 2162 | u32 rqtn) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2163 | { |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 2164 | MLX5_SET(tirc, tirc, transport_domain, priv->mdev->mlx5e_res.td.tdn); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2165 | |
| 2166 | mlx5e_build_tir_ctx_lro(tirc, priv); |
| 2167 | |
| 2168 | MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); |
| 2169 | MLX5_SET(tirc, tirc, indirect_table, rqtn); |
| 2170 | MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_INVERTED_XOR8); |
| 2171 | } |
| 2172 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2173 | static int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv) |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2174 | { |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2175 | struct mlx5e_tir *tir; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2176 | void *tirc; |
| 2177 | int inlen; |
| 2178 | int err; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2179 | u32 *in; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2180 | int tt; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2181 | |
| 2182 | inlen = MLX5_ST_SZ_BYTES(create_tir_in); |
| 2183 | in = mlx5_vzalloc(inlen); |
| 2184 | if (!in) |
| 2185 | return -ENOMEM; |
| 2186 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2187 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { |
| 2188 | memset(in, 0, inlen); |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2189 | tir = &priv->indir_tir[tt]; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2190 | tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); |
| 2191 | mlx5e_build_indir_tir_ctx(priv, tirc, tt); |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2192 | err = mlx5e_create_tir(priv->mdev, tir, in, inlen); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2193 | if (err) |
| 2194 | goto err_destroy_tirs; |
| 2195 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2196 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2197 | kvfree(in); |
| 2198 | |
| 2199 | return 0; |
| 2200 | |
| 2201 | err_destroy_tirs: |
| 2202 | for (tt--; tt >= 0; tt--) |
| 2203 | mlx5e_destroy_tir(priv->mdev, &priv->indir_tir[tt]); |
| 2204 | |
| 2205 | kvfree(in); |
| 2206 | |
| 2207 | return err; |
| 2208 | } |
| 2209 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 2210 | int mlx5e_create_direct_tirs(struct mlx5e_priv *priv) |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2211 | { |
| 2212 | int nch = priv->profile->max_nch(priv->mdev); |
| 2213 | struct mlx5e_tir *tir; |
| 2214 | void *tirc; |
| 2215 | int inlen; |
| 2216 | int err; |
| 2217 | u32 *in; |
| 2218 | int ix; |
| 2219 | |
| 2220 | inlen = MLX5_ST_SZ_BYTES(create_tir_in); |
| 2221 | in = mlx5_vzalloc(inlen); |
| 2222 | if (!in) |
| 2223 | return -ENOMEM; |
| 2224 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2225 | for (ix = 0; ix < nch; ix++) { |
| 2226 | memset(in, 0, inlen); |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2227 | tir = &priv->direct_tir[ix]; |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2228 | tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); |
| 2229 | mlx5e_build_direct_tir_ctx(priv, tirc, |
Hadar Hen Zion | 398f335 | 2016-07-01 14:51:06 +0300 | [diff] [blame] | 2230 | priv->direct_tir[ix].rqt.rqtn); |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2231 | err = mlx5e_create_tir(priv->mdev, tir, in, inlen); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2232 | if (err) |
| 2233 | goto err_destroy_ch_tirs; |
| 2234 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2235 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2236 | kvfree(in); |
| 2237 | |
| 2238 | return 0; |
| 2239 | |
| 2240 | err_destroy_ch_tirs: |
| 2241 | for (ix--; ix >= 0; ix--) |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2242 | mlx5e_destroy_tir(priv->mdev, &priv->direct_tir[ix]); |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2243 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2244 | kvfree(in); |
| 2245 | |
| 2246 | return err; |
| 2247 | } |
| 2248 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2249 | static void mlx5e_destroy_indirect_tirs(struct mlx5e_priv *priv) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2250 | { |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2251 | int i; |
| 2252 | |
| 2253 | for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++) |
| 2254 | mlx5e_destroy_tir(priv->mdev, &priv->indir_tir[i]); |
| 2255 | } |
| 2256 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 2257 | void mlx5e_destroy_direct_tirs(struct mlx5e_priv *priv) |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2258 | { |
| 2259 | int nch = priv->profile->max_nch(priv->mdev); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2260 | int i; |
| 2261 | |
Tariq Toukan | 1da3669 | 2016-04-29 01:36:32 +0300 | [diff] [blame] | 2262 | for (i = 0; i < nch; i++) |
Hadar Hen Zion | 724b2aa | 2016-07-01 14:51:05 +0300 | [diff] [blame] | 2263 | mlx5e_destroy_tir(priv->mdev, &priv->direct_tir[i]); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2264 | } |
| 2265 | |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 2266 | int mlx5e_modify_rqs_vsd(struct mlx5e_priv *priv, bool vsd) |
| 2267 | { |
| 2268 | int err = 0; |
| 2269 | int i; |
| 2270 | |
| 2271 | if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) |
| 2272 | return 0; |
| 2273 | |
| 2274 | for (i = 0; i < priv->params.num_channels; i++) { |
| 2275 | err = mlx5e_modify_rq_vsd(&priv->channel[i]->rq, vsd); |
| 2276 | if (err) |
| 2277 | return err; |
| 2278 | } |
| 2279 | |
| 2280 | return 0; |
| 2281 | } |
| 2282 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 2283 | static int mlx5e_setup_tc(struct net_device *netdev, u8 tc) |
| 2284 | { |
| 2285 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2286 | bool was_opened; |
| 2287 | int err = 0; |
| 2288 | |
| 2289 | if (tc && tc != MLX5E_MAX_NUM_TC) |
| 2290 | return -EINVAL; |
| 2291 | |
| 2292 | mutex_lock(&priv->state_lock); |
| 2293 | |
| 2294 | was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); |
| 2295 | if (was_opened) |
| 2296 | mlx5e_close_locked(priv->netdev); |
| 2297 | |
| 2298 | priv->params.num_tc = tc ? tc : 1; |
| 2299 | |
| 2300 | if (was_opened) |
| 2301 | err = mlx5e_open_locked(priv->netdev); |
| 2302 | |
| 2303 | mutex_unlock(&priv->state_lock); |
| 2304 | |
| 2305 | return err; |
| 2306 | } |
| 2307 | |
| 2308 | static int mlx5e_ndo_setup_tc(struct net_device *dev, u32 handle, |
| 2309 | __be16 proto, struct tc_to_netdev *tc) |
| 2310 | { |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 2311 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2312 | |
| 2313 | if (TC_H_MAJ(handle) != TC_H_MAJ(TC_H_INGRESS)) |
| 2314 | goto mqprio; |
| 2315 | |
| 2316 | switch (tc->type) { |
Amir Vadai | e3a2b7e | 2016-03-08 12:42:37 +0200 | [diff] [blame] | 2317 | case TC_SETUP_CLSFLOWER: |
| 2318 | switch (tc->cls_flower->command) { |
| 2319 | case TC_CLSFLOWER_REPLACE: |
| 2320 | return mlx5e_configure_flower(priv, proto, tc->cls_flower); |
| 2321 | case TC_CLSFLOWER_DESTROY: |
| 2322 | return mlx5e_delete_flower(priv, tc->cls_flower); |
Amir Vadai | aad7e08 | 2016-05-13 12:55:42 +0000 | [diff] [blame] | 2323 | case TC_CLSFLOWER_STATS: |
| 2324 | return mlx5e_stats_flower(priv, tc->cls_flower); |
Amir Vadai | e3a2b7e | 2016-03-08 12:42:37 +0200 | [diff] [blame] | 2325 | } |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 2326 | default: |
| 2327 | return -EOPNOTSUPP; |
| 2328 | } |
| 2329 | |
| 2330 | mqprio: |
Amir Vadai | 67ba422 | 2016-03-08 12:42:34 +0200 | [diff] [blame] | 2331 | if (tc->type != TC_SETUP_MQPRIO) |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 2332 | return -EINVAL; |
| 2333 | |
| 2334 | return mlx5e_setup_tc(dev, tc->tc); |
| 2335 | } |
| 2336 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 2337 | struct rtnl_link_stats64 * |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2338 | mlx5e_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) |
| 2339 | { |
| 2340 | struct mlx5e_priv *priv = netdev_priv(dev); |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2341 | struct mlx5e_sw_stats *sstats = &priv->stats.sw; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2342 | struct mlx5e_vport_stats *vstats = &priv->stats.vport; |
Gal Pressman | 269e6b3 | 2016-04-24 22:51:46 +0300 | [diff] [blame] | 2343 | struct mlx5e_pport_stats *pstats = &priv->stats.pport; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2344 | |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2345 | stats->rx_packets = sstats->rx_packets; |
| 2346 | stats->rx_bytes = sstats->rx_bytes; |
| 2347 | stats->tx_packets = sstats->tx_packets; |
| 2348 | stats->tx_bytes = sstats->tx_bytes; |
Gal Pressman | 269e6b3 | 2016-04-24 22:51:46 +0300 | [diff] [blame] | 2349 | |
| 2350 | stats->rx_dropped = priv->stats.qcnt.rx_out_of_buffer; |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2351 | stats->tx_dropped = sstats->tx_queue_dropped; |
Gal Pressman | 269e6b3 | 2016-04-24 22:51:46 +0300 | [diff] [blame] | 2352 | |
| 2353 | stats->rx_length_errors = |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2354 | PPORT_802_3_GET(pstats, a_in_range_length_errors) + |
| 2355 | PPORT_802_3_GET(pstats, a_out_of_range_length_field) + |
| 2356 | PPORT_802_3_GET(pstats, a_frame_too_long_errors); |
Gal Pressman | 269e6b3 | 2016-04-24 22:51:46 +0300 | [diff] [blame] | 2357 | stats->rx_crc_errors = |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2358 | PPORT_802_3_GET(pstats, a_frame_check_sequence_errors); |
| 2359 | stats->rx_frame_errors = PPORT_802_3_GET(pstats, a_alignment_errors); |
| 2360 | stats->tx_aborted_errors = PPORT_2863_GET(pstats, if_out_discards); |
Gal Pressman | 269e6b3 | 2016-04-24 22:51:46 +0300 | [diff] [blame] | 2361 | stats->tx_carrier_errors = |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2362 | PPORT_802_3_GET(pstats, a_symbol_error_during_carrier); |
Gal Pressman | 269e6b3 | 2016-04-24 22:51:46 +0300 | [diff] [blame] | 2363 | stats->rx_errors = stats->rx_length_errors + stats->rx_crc_errors + |
| 2364 | stats->rx_frame_errors; |
| 2365 | stats->tx_errors = stats->tx_aborted_errors + stats->tx_carrier_errors; |
| 2366 | |
| 2367 | /* vport multicast also counts packets that are dropped due to steering |
| 2368 | * or rx out of buffer |
| 2369 | */ |
Gal Pressman | 9218b44 | 2016-04-24 22:51:47 +0300 | [diff] [blame] | 2370 | stats->multicast = |
| 2371 | VPORT_COUNTER_GET(vstats, received_eth_multicast.packets); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2372 | |
| 2373 | return stats; |
| 2374 | } |
| 2375 | |
| 2376 | static void mlx5e_set_rx_mode(struct net_device *dev) |
| 2377 | { |
| 2378 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2379 | |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 2380 | queue_work(priv->wq, &priv->set_rx_mode_work); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2381 | } |
| 2382 | |
| 2383 | static int mlx5e_set_mac(struct net_device *netdev, void *addr) |
| 2384 | { |
| 2385 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2386 | struct sockaddr *saddr = addr; |
| 2387 | |
| 2388 | if (!is_valid_ether_addr(saddr->sa_data)) |
| 2389 | return -EADDRNOTAVAIL; |
| 2390 | |
| 2391 | netif_addr_lock_bh(netdev); |
| 2392 | ether_addr_copy(netdev->dev_addr, saddr->sa_data); |
| 2393 | netif_addr_unlock_bh(netdev); |
| 2394 | |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 2395 | queue_work(priv->wq, &priv->set_rx_mode_work); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2396 | |
| 2397 | return 0; |
| 2398 | } |
| 2399 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2400 | #define MLX5E_SET_FEATURE(netdev, feature, enable) \ |
| 2401 | do { \ |
| 2402 | if (enable) \ |
| 2403 | netdev->features |= feature; \ |
| 2404 | else \ |
| 2405 | netdev->features &= ~feature; \ |
| 2406 | } while (0) |
| 2407 | |
| 2408 | typedef int (*mlx5e_feature_handler)(struct net_device *netdev, bool enable); |
| 2409 | |
| 2410 | static int set_feature_lro(struct net_device *netdev, bool enable) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2411 | { |
| 2412 | struct mlx5e_priv *priv = netdev_priv(netdev); |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2413 | bool was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); |
| 2414 | int err; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2415 | |
| 2416 | mutex_lock(&priv->state_lock); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2417 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2418 | if (was_opened && (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST)) |
| 2419 | mlx5e_close_locked(priv->netdev); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2420 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2421 | priv->params.lro_en = enable; |
| 2422 | err = mlx5e_modify_tirs_lro(priv); |
| 2423 | if (err) { |
| 2424 | netdev_err(netdev, "lro modify failed, %d\n", err); |
| 2425 | priv->params.lro_en = !enable; |
Achiad Shochat | 98e81b0 | 2015-07-29 15:05:46 +0300 | [diff] [blame] | 2426 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2427 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2428 | if (was_opened && (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST)) |
| 2429 | mlx5e_open_locked(priv->netdev); |
| 2430 | |
Achiad Shochat | 9b37b07 | 2015-08-04 14:05:46 +0300 | [diff] [blame] | 2431 | mutex_unlock(&priv->state_lock); |
| 2432 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2433 | return err; |
| 2434 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2435 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2436 | static int set_feature_vlan_filter(struct net_device *netdev, bool enable) |
| 2437 | { |
| 2438 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2439 | |
| 2440 | if (enable) |
| 2441 | mlx5e_enable_vlan_filter(priv); |
| 2442 | else |
| 2443 | mlx5e_disable_vlan_filter(priv); |
| 2444 | |
| 2445 | return 0; |
| 2446 | } |
| 2447 | |
| 2448 | static int set_feature_tc_num_filters(struct net_device *netdev, bool enable) |
| 2449 | { |
| 2450 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2451 | |
| 2452 | if (!enable && mlx5e_tc_num_filters(priv)) { |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 2453 | netdev_err(netdev, |
| 2454 | "Active offloaded tc filters, can't turn hw_tc_offload off\n"); |
| 2455 | return -EINVAL; |
| 2456 | } |
| 2457 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2458 | return 0; |
| 2459 | } |
| 2460 | |
Eran Ben Elisha | 94cb1eb | 2016-04-24 22:51:52 +0300 | [diff] [blame] | 2461 | static int set_feature_rx_all(struct net_device *netdev, bool enable) |
| 2462 | { |
| 2463 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2464 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2465 | |
| 2466 | return mlx5_set_port_fcs(mdev, !enable); |
| 2467 | } |
| 2468 | |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 2469 | static int set_feature_rx_vlan(struct net_device *netdev, bool enable) |
| 2470 | { |
| 2471 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2472 | int err; |
| 2473 | |
| 2474 | mutex_lock(&priv->state_lock); |
| 2475 | |
| 2476 | priv->params.vlan_strip_disable = !enable; |
| 2477 | err = mlx5e_modify_rqs_vsd(priv, !enable); |
| 2478 | if (err) |
| 2479 | priv->params.vlan_strip_disable = enable; |
| 2480 | |
| 2481 | mutex_unlock(&priv->state_lock); |
| 2482 | |
| 2483 | return err; |
| 2484 | } |
| 2485 | |
Maor Gottlieb | 45bf454a | 2016-04-29 01:36:42 +0300 | [diff] [blame] | 2486 | #ifdef CONFIG_RFS_ACCEL |
| 2487 | static int set_feature_arfs(struct net_device *netdev, bool enable) |
| 2488 | { |
| 2489 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2490 | int err; |
| 2491 | |
| 2492 | if (enable) |
| 2493 | err = mlx5e_arfs_enable(priv); |
| 2494 | else |
| 2495 | err = mlx5e_arfs_disable(priv); |
| 2496 | |
| 2497 | return err; |
| 2498 | } |
| 2499 | #endif |
| 2500 | |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2501 | static int mlx5e_handle_feature(struct net_device *netdev, |
| 2502 | netdev_features_t wanted_features, |
| 2503 | netdev_features_t feature, |
| 2504 | mlx5e_feature_handler feature_handler) |
| 2505 | { |
| 2506 | netdev_features_t changes = wanted_features ^ netdev->features; |
| 2507 | bool enable = !!(wanted_features & feature); |
| 2508 | int err; |
| 2509 | |
| 2510 | if (!(changes & feature)) |
| 2511 | return 0; |
| 2512 | |
| 2513 | err = feature_handler(netdev, enable); |
| 2514 | if (err) { |
| 2515 | netdev_err(netdev, "%s feature 0x%llx failed err %d\n", |
| 2516 | enable ? "Enable" : "Disable", feature, err); |
| 2517 | return err; |
| 2518 | } |
| 2519 | |
| 2520 | MLX5E_SET_FEATURE(netdev, feature, enable); |
| 2521 | return 0; |
| 2522 | } |
| 2523 | |
| 2524 | static int mlx5e_set_features(struct net_device *netdev, |
| 2525 | netdev_features_t features) |
| 2526 | { |
| 2527 | int err; |
| 2528 | |
| 2529 | err = mlx5e_handle_feature(netdev, features, NETIF_F_LRO, |
| 2530 | set_feature_lro); |
| 2531 | err |= mlx5e_handle_feature(netdev, features, |
| 2532 | NETIF_F_HW_VLAN_CTAG_FILTER, |
| 2533 | set_feature_vlan_filter); |
| 2534 | err |= mlx5e_handle_feature(netdev, features, NETIF_F_HW_TC, |
| 2535 | set_feature_tc_num_filters); |
Eran Ben Elisha | 94cb1eb | 2016-04-24 22:51:52 +0300 | [diff] [blame] | 2536 | err |= mlx5e_handle_feature(netdev, features, NETIF_F_RXALL, |
| 2537 | set_feature_rx_all); |
Gal Pressman | 3635011 | 2016-04-24 22:51:55 +0300 | [diff] [blame] | 2538 | err |= mlx5e_handle_feature(netdev, features, NETIF_F_HW_VLAN_CTAG_RX, |
| 2539 | set_feature_rx_vlan); |
Maor Gottlieb | 45bf454a | 2016-04-29 01:36:42 +0300 | [diff] [blame] | 2540 | #ifdef CONFIG_RFS_ACCEL |
| 2541 | err |= mlx5e_handle_feature(netdev, features, NETIF_F_NTUPLE, |
| 2542 | set_feature_arfs); |
| 2543 | #endif |
Gal Pressman | 0e40544 | 2016-04-24 22:51:51 +0300 | [diff] [blame] | 2544 | |
| 2545 | return err ? -EINVAL : 0; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2546 | } |
| 2547 | |
Saeed Mahameed | d8edd24 | 2016-04-22 00:33:04 +0300 | [diff] [blame] | 2548 | #define MXL5_HW_MIN_MTU 64 |
| 2549 | #define MXL5E_MIN_MTU (MXL5_HW_MIN_MTU + ETH_FCS_LEN) |
| 2550 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2551 | static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu) |
| 2552 | { |
| 2553 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2554 | struct mlx5_core_dev *mdev = priv->mdev; |
Achiad Shochat | 98e81b0 | 2015-07-29 15:05:46 +0300 | [diff] [blame] | 2555 | bool was_opened; |
Saeed Mahameed | 046339e | 2016-04-22 00:33:03 +0300 | [diff] [blame] | 2556 | u16 max_mtu; |
Saeed Mahameed | d8edd24 | 2016-04-22 00:33:04 +0300 | [diff] [blame] | 2557 | u16 min_mtu; |
Achiad Shochat | 98e81b0 | 2015-07-29 15:05:46 +0300 | [diff] [blame] | 2558 | int err = 0; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2559 | |
Saeed Mahameed | facc969 | 2015-06-11 14:47:27 +0300 | [diff] [blame] | 2560 | mlx5_query_port_max_mtu(mdev, &max_mtu, 1); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2561 | |
Doron Tsur | 50a9eea | 2015-11-12 19:35:27 +0200 | [diff] [blame] | 2562 | max_mtu = MLX5E_HW2SW_MTU(max_mtu); |
Saeed Mahameed | d8edd24 | 2016-04-22 00:33:04 +0300 | [diff] [blame] | 2563 | min_mtu = MLX5E_HW2SW_MTU(MXL5E_MIN_MTU); |
Doron Tsur | 50a9eea | 2015-11-12 19:35:27 +0200 | [diff] [blame] | 2564 | |
Saeed Mahameed | d8edd24 | 2016-04-22 00:33:04 +0300 | [diff] [blame] | 2565 | if (new_mtu > max_mtu || new_mtu < min_mtu) { |
Saeed Mahameed | facc969 | 2015-06-11 14:47:27 +0300 | [diff] [blame] | 2566 | netdev_err(netdev, |
Saeed Mahameed | d8edd24 | 2016-04-22 00:33:04 +0300 | [diff] [blame] | 2567 | "%s: Bad MTU (%d), valid range is: [%d..%d]\n", |
| 2568 | __func__, new_mtu, min_mtu, max_mtu); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2569 | return -EINVAL; |
| 2570 | } |
| 2571 | |
| 2572 | mutex_lock(&priv->state_lock); |
Achiad Shochat | 98e81b0 | 2015-07-29 15:05:46 +0300 | [diff] [blame] | 2573 | |
| 2574 | was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); |
| 2575 | if (was_opened) |
| 2576 | mlx5e_close_locked(netdev); |
| 2577 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2578 | netdev->mtu = new_mtu; |
Achiad Shochat | 98e81b0 | 2015-07-29 15:05:46 +0300 | [diff] [blame] | 2579 | |
| 2580 | if (was_opened) |
| 2581 | err = mlx5e_open_locked(netdev); |
| 2582 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2583 | mutex_unlock(&priv->state_lock); |
| 2584 | |
| 2585 | return err; |
| 2586 | } |
| 2587 | |
Eran Ben Elisha | ef9814d | 2015-12-29 14:58:31 +0200 | [diff] [blame] | 2588 | static int mlx5e_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) |
| 2589 | { |
| 2590 | switch (cmd) { |
| 2591 | case SIOCSHWTSTAMP: |
| 2592 | return mlx5e_hwstamp_set(dev, ifr); |
| 2593 | case SIOCGHWTSTAMP: |
| 2594 | return mlx5e_hwstamp_get(dev, ifr); |
| 2595 | default: |
| 2596 | return -EOPNOTSUPP; |
| 2597 | } |
| 2598 | } |
| 2599 | |
Saeed Mahameed | 66e49de | 2015-12-01 18:03:25 +0200 | [diff] [blame] | 2600 | static int mlx5e_set_vf_mac(struct net_device *dev, int vf, u8 *mac) |
| 2601 | { |
| 2602 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2603 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2604 | |
| 2605 | return mlx5_eswitch_set_vport_mac(mdev->priv.eswitch, vf + 1, mac); |
| 2606 | } |
| 2607 | |
| 2608 | static int mlx5e_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos) |
| 2609 | { |
| 2610 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2611 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2612 | |
| 2613 | return mlx5_eswitch_set_vport_vlan(mdev->priv.eswitch, vf + 1, |
| 2614 | vlan, qos); |
| 2615 | } |
| 2616 | |
Mohamad Haj Yahia | f942380 | 2016-05-03 17:13:59 +0300 | [diff] [blame] | 2617 | static int mlx5e_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) |
| 2618 | { |
| 2619 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2620 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2621 | |
| 2622 | return mlx5_eswitch_set_vport_spoofchk(mdev->priv.eswitch, vf + 1, setting); |
| 2623 | } |
| 2624 | |
Mohamad Haj Yahia | 1edc57e | 2016-05-03 17:14:04 +0300 | [diff] [blame] | 2625 | static int mlx5e_set_vf_trust(struct net_device *dev, int vf, bool setting) |
| 2626 | { |
| 2627 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2628 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2629 | |
| 2630 | return mlx5_eswitch_set_vport_trust(mdev->priv.eswitch, vf + 1, setting); |
| 2631 | } |
Saeed Mahameed | 66e49de | 2015-12-01 18:03:25 +0200 | [diff] [blame] | 2632 | static int mlx5_vport_link2ifla(u8 esw_link) |
| 2633 | { |
| 2634 | switch (esw_link) { |
| 2635 | case MLX5_ESW_VPORT_ADMIN_STATE_DOWN: |
| 2636 | return IFLA_VF_LINK_STATE_DISABLE; |
| 2637 | case MLX5_ESW_VPORT_ADMIN_STATE_UP: |
| 2638 | return IFLA_VF_LINK_STATE_ENABLE; |
| 2639 | } |
| 2640 | return IFLA_VF_LINK_STATE_AUTO; |
| 2641 | } |
| 2642 | |
| 2643 | static int mlx5_ifla_link2vport(u8 ifla_link) |
| 2644 | { |
| 2645 | switch (ifla_link) { |
| 2646 | case IFLA_VF_LINK_STATE_DISABLE: |
| 2647 | return MLX5_ESW_VPORT_ADMIN_STATE_DOWN; |
| 2648 | case IFLA_VF_LINK_STATE_ENABLE: |
| 2649 | return MLX5_ESW_VPORT_ADMIN_STATE_UP; |
| 2650 | } |
| 2651 | return MLX5_ESW_VPORT_ADMIN_STATE_AUTO; |
| 2652 | } |
| 2653 | |
| 2654 | static int mlx5e_set_vf_link_state(struct net_device *dev, int vf, |
| 2655 | int link_state) |
| 2656 | { |
| 2657 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2658 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2659 | |
| 2660 | return mlx5_eswitch_set_vport_state(mdev->priv.eswitch, vf + 1, |
| 2661 | mlx5_ifla_link2vport(link_state)); |
| 2662 | } |
| 2663 | |
| 2664 | static int mlx5e_get_vf_config(struct net_device *dev, |
| 2665 | int vf, struct ifla_vf_info *ivi) |
| 2666 | { |
| 2667 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2668 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2669 | int err; |
| 2670 | |
| 2671 | err = mlx5_eswitch_get_vport_config(mdev->priv.eswitch, vf + 1, ivi); |
| 2672 | if (err) |
| 2673 | return err; |
| 2674 | ivi->linkstate = mlx5_vport_link2ifla(ivi->linkstate); |
| 2675 | return 0; |
| 2676 | } |
| 2677 | |
| 2678 | static int mlx5e_get_vf_stats(struct net_device *dev, |
| 2679 | int vf, struct ifla_vf_stats *vf_stats) |
| 2680 | { |
| 2681 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2682 | struct mlx5_core_dev *mdev = priv->mdev; |
| 2683 | |
| 2684 | return mlx5_eswitch_get_vport_stats(mdev->priv.eswitch, vf + 1, |
| 2685 | vf_stats); |
| 2686 | } |
| 2687 | |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2688 | static void mlx5e_add_vxlan_port(struct net_device *netdev, |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2689 | struct udp_tunnel_info *ti) |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2690 | { |
| 2691 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2692 | |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2693 | if (ti->type != UDP_TUNNEL_TYPE_VXLAN) |
| 2694 | return; |
| 2695 | |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2696 | if (!mlx5e_vxlan_allowed(priv->mdev)) |
| 2697 | return; |
| 2698 | |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2699 | mlx5e_vxlan_queue_work(priv, ti->sa_family, be16_to_cpu(ti->port), 1); |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2700 | } |
| 2701 | |
| 2702 | static void mlx5e_del_vxlan_port(struct net_device *netdev, |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2703 | struct udp_tunnel_info *ti) |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2704 | { |
| 2705 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2706 | |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2707 | if (ti->type != UDP_TUNNEL_TYPE_VXLAN) |
| 2708 | return; |
| 2709 | |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2710 | if (!mlx5e_vxlan_allowed(priv->mdev)) |
| 2711 | return; |
| 2712 | |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2713 | mlx5e_vxlan_queue_work(priv, ti->sa_family, be16_to_cpu(ti->port), 0); |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2714 | } |
| 2715 | |
| 2716 | static netdev_features_t mlx5e_vxlan_features_check(struct mlx5e_priv *priv, |
| 2717 | struct sk_buff *skb, |
| 2718 | netdev_features_t features) |
| 2719 | { |
| 2720 | struct udphdr *udph; |
| 2721 | u16 proto; |
| 2722 | u16 port = 0; |
| 2723 | |
| 2724 | switch (vlan_get_protocol(skb)) { |
| 2725 | case htons(ETH_P_IP): |
| 2726 | proto = ip_hdr(skb)->protocol; |
| 2727 | break; |
| 2728 | case htons(ETH_P_IPV6): |
| 2729 | proto = ipv6_hdr(skb)->nexthdr; |
| 2730 | break; |
| 2731 | default: |
| 2732 | goto out; |
| 2733 | } |
| 2734 | |
| 2735 | if (proto == IPPROTO_UDP) { |
| 2736 | udph = udp_hdr(skb); |
| 2737 | port = be16_to_cpu(udph->dest); |
| 2738 | } |
| 2739 | |
| 2740 | /* Verify if UDP port is being offloaded by HW */ |
| 2741 | if (port && mlx5e_vxlan_lookup_port(priv, port)) |
| 2742 | return features; |
| 2743 | |
| 2744 | out: |
| 2745 | /* Disable CSUM and GSO if the udp dport is not offloaded by HW */ |
| 2746 | return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); |
| 2747 | } |
| 2748 | |
| 2749 | static netdev_features_t mlx5e_features_check(struct sk_buff *skb, |
| 2750 | struct net_device *netdev, |
| 2751 | netdev_features_t features) |
| 2752 | { |
| 2753 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 2754 | |
| 2755 | features = vlan_features_check(skb, features); |
| 2756 | features = vxlan_features_check(skb, features); |
| 2757 | |
| 2758 | /* Validate if the tunneled packet is being offloaded by HW */ |
| 2759 | if (skb->encapsulation && |
| 2760 | (features & NETIF_F_CSUM_MASK || features & NETIF_F_GSO_MASK)) |
| 2761 | return mlx5e_vxlan_features_check(priv, skb, features); |
| 2762 | |
| 2763 | return features; |
| 2764 | } |
| 2765 | |
Daniel Jurgens | 3947ca1 | 2016-06-30 17:34:45 +0300 | [diff] [blame] | 2766 | static void mlx5e_tx_timeout(struct net_device *dev) |
| 2767 | { |
| 2768 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 2769 | bool sched_work = false; |
| 2770 | int i; |
| 2771 | |
| 2772 | netdev_err(dev, "TX timeout detected\n"); |
| 2773 | |
| 2774 | for (i = 0; i < priv->params.num_channels * priv->params.num_tc; i++) { |
| 2775 | struct mlx5e_sq *sq = priv->txq_to_sq_map[i]; |
| 2776 | |
| 2777 | if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i))) |
| 2778 | continue; |
| 2779 | sched_work = true; |
| 2780 | set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state); |
| 2781 | netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n", |
| 2782 | i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc); |
| 2783 | } |
| 2784 | |
| 2785 | if (sched_work && test_bit(MLX5E_STATE_OPENED, &priv->state)) |
| 2786 | schedule_work(&priv->tx_timeout_work); |
| 2787 | } |
| 2788 | |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2789 | static const struct net_device_ops mlx5e_netdev_ops_basic = { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2790 | .ndo_open = mlx5e_open, |
| 2791 | .ndo_stop = mlx5e_close, |
| 2792 | .ndo_start_xmit = mlx5e_xmit, |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 2793 | .ndo_setup_tc = mlx5e_ndo_setup_tc, |
| 2794 | .ndo_select_queue = mlx5e_select_queue, |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2795 | .ndo_get_stats64 = mlx5e_get_stats, |
| 2796 | .ndo_set_rx_mode = mlx5e_set_rx_mode, |
| 2797 | .ndo_set_mac_address = mlx5e_set_mac, |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2798 | .ndo_vlan_rx_add_vid = mlx5e_vlan_rx_add_vid, |
| 2799 | .ndo_vlan_rx_kill_vid = mlx5e_vlan_rx_kill_vid, |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2800 | .ndo_set_features = mlx5e_set_features, |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2801 | .ndo_change_mtu = mlx5e_change_mtu, |
| 2802 | .ndo_do_ioctl = mlx5e_ioctl, |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 2803 | .ndo_set_tx_maxrate = mlx5e_set_tx_maxrate, |
Maor Gottlieb | 45bf454a | 2016-04-29 01:36:42 +0300 | [diff] [blame] | 2804 | #ifdef CONFIG_RFS_ACCEL |
| 2805 | .ndo_rx_flow_steer = mlx5e_rx_flow_steer, |
| 2806 | #endif |
Daniel Jurgens | 3947ca1 | 2016-06-30 17:34:45 +0300 | [diff] [blame] | 2807 | .ndo_tx_timeout = mlx5e_tx_timeout, |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2808 | }; |
| 2809 | |
| 2810 | static const struct net_device_ops mlx5e_netdev_ops_sriov = { |
| 2811 | .ndo_open = mlx5e_open, |
| 2812 | .ndo_stop = mlx5e_close, |
| 2813 | .ndo_start_xmit = mlx5e_xmit, |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 2814 | .ndo_setup_tc = mlx5e_ndo_setup_tc, |
| 2815 | .ndo_select_queue = mlx5e_select_queue, |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2816 | .ndo_get_stats64 = mlx5e_get_stats, |
| 2817 | .ndo_set_rx_mode = mlx5e_set_rx_mode, |
| 2818 | .ndo_set_mac_address = mlx5e_set_mac, |
| 2819 | .ndo_vlan_rx_add_vid = mlx5e_vlan_rx_add_vid, |
| 2820 | .ndo_vlan_rx_kill_vid = mlx5e_vlan_rx_kill_vid, |
| 2821 | .ndo_set_features = mlx5e_set_features, |
| 2822 | .ndo_change_mtu = mlx5e_change_mtu, |
| 2823 | .ndo_do_ioctl = mlx5e_ioctl, |
Alexander Duyck | 974c3f3 | 2016-06-16 12:22:38 -0700 | [diff] [blame] | 2824 | .ndo_udp_tunnel_add = mlx5e_add_vxlan_port, |
| 2825 | .ndo_udp_tunnel_del = mlx5e_del_vxlan_port, |
Yevgeny Petrilin | 507f0c8 | 2016-06-23 17:02:38 +0300 | [diff] [blame] | 2826 | .ndo_set_tx_maxrate = mlx5e_set_tx_maxrate, |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 2827 | .ndo_features_check = mlx5e_features_check, |
Maor Gottlieb | 45bf454a | 2016-04-29 01:36:42 +0300 | [diff] [blame] | 2828 | #ifdef CONFIG_RFS_ACCEL |
| 2829 | .ndo_rx_flow_steer = mlx5e_rx_flow_steer, |
| 2830 | #endif |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2831 | .ndo_set_vf_mac = mlx5e_set_vf_mac, |
| 2832 | .ndo_set_vf_vlan = mlx5e_set_vf_vlan, |
Mohamad Haj Yahia | f942380 | 2016-05-03 17:13:59 +0300 | [diff] [blame] | 2833 | .ndo_set_vf_spoofchk = mlx5e_set_vf_spoofchk, |
Mohamad Haj Yahia | 1edc57e | 2016-05-03 17:14:04 +0300 | [diff] [blame] | 2834 | .ndo_set_vf_trust = mlx5e_set_vf_trust, |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 2835 | .ndo_get_vf_config = mlx5e_get_vf_config, |
| 2836 | .ndo_set_vf_link_state = mlx5e_set_vf_link_state, |
| 2837 | .ndo_get_vf_stats = mlx5e_get_vf_stats, |
Daniel Jurgens | 3947ca1 | 2016-06-30 17:34:45 +0300 | [diff] [blame] | 2838 | .ndo_tx_timeout = mlx5e_tx_timeout, |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2839 | }; |
| 2840 | |
| 2841 | static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev) |
| 2842 | { |
| 2843 | if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) |
| 2844 | return -ENOTSUPP; |
| 2845 | if (!MLX5_CAP_GEN(mdev, eth_net_offloads) || |
| 2846 | !MLX5_CAP_GEN(mdev, nic_flow_table) || |
| 2847 | !MLX5_CAP_ETH(mdev, csum_cap) || |
| 2848 | !MLX5_CAP_ETH(mdev, max_lso_cap) || |
| 2849 | !MLX5_CAP_ETH(mdev, vlan_cap) || |
Gal Pressman | 796a27e | 2015-06-11 14:47:30 +0300 | [diff] [blame] | 2850 | !MLX5_CAP_ETH(mdev, rss_ind_tbl_cap) || |
| 2851 | MLX5_CAP_FLOWTABLE(mdev, |
| 2852 | flow_table_properties_nic_receive.max_ft_level) |
| 2853 | < 3) { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2854 | mlx5_core_warn(mdev, |
| 2855 | "Not creating net device, some required device capabilities are missing\n"); |
| 2856 | return -ENOTSUPP; |
| 2857 | } |
Tariq Toukan | 6618996 | 2015-11-12 19:35:26 +0200 | [diff] [blame] | 2858 | if (!MLX5_CAP_ETH(mdev, self_lb_en_modifiable)) |
| 2859 | mlx5_core_warn(mdev, "Self loop back prevention is not supported\n"); |
Gal Pressman | 7524a5d | 2016-03-02 00:13:37 +0200 | [diff] [blame] | 2860 | if (!MLX5_CAP_GEN(mdev, cq_moderation)) |
| 2861 | mlx5_core_warn(mdev, "CQ modiration is not supported\n"); |
Tariq Toukan | 6618996 | 2015-11-12 19:35:26 +0200 | [diff] [blame] | 2862 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2863 | return 0; |
| 2864 | } |
| 2865 | |
Achiad Shochat | 58d5229 | 2015-07-23 23:35:58 +0300 | [diff] [blame] | 2866 | u16 mlx5e_get_max_inline_cap(struct mlx5_core_dev *mdev) |
| 2867 | { |
| 2868 | int bf_buf_size = (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) / 2; |
| 2869 | |
| 2870 | return bf_buf_size - |
| 2871 | sizeof(struct mlx5e_tx_wqe) + |
| 2872 | 2 /*sizeof(mlx5e_tx_wqe.inline_hdr_start)*/; |
| 2873 | } |
| 2874 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 2875 | #ifdef CONFIG_MLX5_CORE_EN_DCB |
| 2876 | static void mlx5e_ets_init(struct mlx5e_priv *priv) |
| 2877 | { |
| 2878 | int i; |
| 2879 | |
| 2880 | priv->params.ets.ets_cap = mlx5_max_tc(priv->mdev) + 1; |
| 2881 | for (i = 0; i < priv->params.ets.ets_cap; i++) { |
| 2882 | priv->params.ets.tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC; |
| 2883 | priv->params.ets.tc_tsa[i] = IEEE_8021QAZ_TSA_VENDOR; |
| 2884 | priv->params.ets.prio_tc[i] = i; |
| 2885 | } |
| 2886 | |
| 2887 | /* tclass[prio=0]=1, tclass[prio=1]=0, tclass[prio=i]=i (for i>1) */ |
| 2888 | priv->params.ets.prio_tc[0] = 1; |
| 2889 | priv->params.ets.prio_tc[1] = 0; |
| 2890 | } |
| 2891 | #endif |
| 2892 | |
Tariq Toukan | d8c9660 | 2016-04-20 22:02:11 +0300 | [diff] [blame] | 2893 | void mlx5e_build_default_indir_rqt(struct mlx5_core_dev *mdev, |
| 2894 | u32 *indirection_rqt, int len, |
Tariq Toukan | 85082db | 2016-02-29 21:17:13 +0200 | [diff] [blame] | 2895 | int num_channels) |
| 2896 | { |
Tariq Toukan | d8c9660 | 2016-04-20 22:02:11 +0300 | [diff] [blame] | 2897 | int node = mdev->priv.numa_node; |
| 2898 | int node_num_of_cores; |
Tariq Toukan | 85082db | 2016-02-29 21:17:13 +0200 | [diff] [blame] | 2899 | int i; |
| 2900 | |
Tariq Toukan | d8c9660 | 2016-04-20 22:02:11 +0300 | [diff] [blame] | 2901 | if (node == -1) |
| 2902 | node = first_online_node; |
| 2903 | |
| 2904 | node_num_of_cores = cpumask_weight(cpumask_of_node(node)); |
| 2905 | |
| 2906 | if (node_num_of_cores) |
| 2907 | num_channels = min_t(int, num_channels, node_num_of_cores); |
| 2908 | |
Tariq Toukan | 85082db | 2016-02-29 21:17:13 +0200 | [diff] [blame] | 2909 | for (i = 0; i < len; i++) |
| 2910 | indirection_rqt[i] = i % num_channels; |
| 2911 | } |
| 2912 | |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 2913 | static bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev) |
| 2914 | { |
| 2915 | return MLX5_CAP_GEN(mdev, striding_rq) && |
| 2916 | MLX5_CAP_GEN(mdev, umr_ptr_rlky) && |
| 2917 | MLX5_CAP_ETH(mdev, reg_umr_sq); |
| 2918 | } |
| 2919 | |
Saeed Mahameed | b797a68 | 2016-05-11 00:29:16 +0300 | [diff] [blame] | 2920 | static int mlx5e_get_pci_bw(struct mlx5_core_dev *mdev, u32 *pci_bw) |
| 2921 | { |
| 2922 | enum pcie_link_width width; |
| 2923 | enum pci_bus_speed speed; |
| 2924 | int err = 0; |
| 2925 | |
| 2926 | err = pcie_get_minimum_link(mdev->pdev, &speed, &width); |
| 2927 | if (err) |
| 2928 | return err; |
| 2929 | |
| 2930 | if (speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) |
| 2931 | return -EINVAL; |
| 2932 | |
| 2933 | switch (speed) { |
| 2934 | case PCIE_SPEED_2_5GT: |
| 2935 | *pci_bw = 2500 * width; |
| 2936 | break; |
| 2937 | case PCIE_SPEED_5_0GT: |
| 2938 | *pci_bw = 5000 * width; |
| 2939 | break; |
| 2940 | case PCIE_SPEED_8_0GT: |
| 2941 | *pci_bw = 8000 * width; |
| 2942 | break; |
| 2943 | default: |
| 2944 | return -EINVAL; |
| 2945 | } |
| 2946 | |
| 2947 | return 0; |
| 2948 | } |
| 2949 | |
| 2950 | static bool cqe_compress_heuristic(u32 link_speed, u32 pci_bw) |
| 2951 | { |
| 2952 | return (link_speed && pci_bw && |
| 2953 | (pci_bw < 40000) && (pci_bw < link_speed)); |
| 2954 | } |
| 2955 | |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 2956 | void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode) |
| 2957 | { |
| 2958 | params->rx_cq_period_mode = cq_period_mode; |
| 2959 | |
| 2960 | params->rx_cq_moderation.pkts = |
| 2961 | MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_PKTS; |
| 2962 | params->rx_cq_moderation.usec = |
| 2963 | MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC; |
| 2964 | |
| 2965 | if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE) |
| 2966 | params->rx_cq_moderation.usec = |
| 2967 | MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE; |
| 2968 | } |
| 2969 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 2970 | static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev, |
| 2971 | struct net_device *netdev, |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 2972 | const struct mlx5e_profile *profile, |
| 2973 | void *ppriv) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2974 | { |
| 2975 | struct mlx5e_priv *priv = netdev_priv(netdev); |
Saeed Mahameed | b797a68 | 2016-05-11 00:29:16 +0300 | [diff] [blame] | 2976 | u32 link_speed = 0; |
| 2977 | u32 pci_bw = 0; |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 2978 | u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? |
| 2979 | MLX5_CQ_PERIOD_MODE_START_FROM_CQE : |
| 2980 | MLX5_CQ_PERIOD_MODE_START_FROM_EQE; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 2981 | |
| 2982 | priv->params.log_sq_size = |
| 2983 | MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE; |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 2984 | priv->params.rq_wq_type = mlx5e_check_fragmented_striding_rq_cap(mdev) ? |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 2985 | MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ : |
| 2986 | MLX5_WQ_TYPE_LINKED_LIST; |
| 2987 | |
Saeed Mahameed | b797a68 | 2016-05-11 00:29:16 +0300 | [diff] [blame] | 2988 | /* set CQE compression */ |
| 2989 | priv->params.rx_cqe_compress_admin = false; |
| 2990 | if (MLX5_CAP_GEN(mdev, cqe_compression) && |
| 2991 | MLX5_CAP_GEN(mdev, vport_group_manager)) { |
| 2992 | mlx5e_get_max_linkspeed(mdev, &link_speed); |
| 2993 | mlx5e_get_pci_bw(mdev, &pci_bw); |
| 2994 | mlx5_core_dbg(mdev, "Max link speed = %d, PCI BW = %d\n", |
| 2995 | link_speed, pci_bw); |
| 2996 | priv->params.rx_cqe_compress_admin = |
| 2997 | cqe_compress_heuristic(link_speed, pci_bw); |
| 2998 | } |
| 2999 | |
| 3000 | priv->params.rx_cqe_compress = priv->params.rx_cqe_compress_admin; |
| 3001 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 3002 | switch (priv->params.rq_wq_type) { |
| 3003 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
| 3004 | priv->params.log_rq_size = MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE_MPW; |
Tariq Toukan | d9d9f15 | 2016-05-11 00:29:15 +0300 | [diff] [blame] | 3005 | priv->params.mpwqe_log_stride_sz = |
| 3006 | priv->params.rx_cqe_compress ? |
| 3007 | MLX5_MPWRQ_LOG_STRIDE_SIZE_CQE_COMPRESS : |
| 3008 | MLX5_MPWRQ_LOG_STRIDE_SIZE; |
| 3009 | priv->params.mpwqe_log_num_strides = MLX5_MPWRQ_LOG_WQE_SZ - |
| 3010 | priv->params.mpwqe_log_stride_sz; |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 3011 | priv->params.lro_en = true; |
| 3012 | break; |
| 3013 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
| 3014 | priv->params.log_rq_size = MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE; |
| 3015 | } |
| 3016 | |
Tariq Toukan | d9d9f15 | 2016-05-11 00:29:15 +0300 | [diff] [blame] | 3017 | mlx5_core_info(mdev, |
| 3018 | "MLX5E: StrdRq(%d) RqSz(%ld) StrdSz(%ld) RxCqeCmprss(%d)\n", |
| 3019 | priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ, |
| 3020 | BIT(priv->params.log_rq_size), |
| 3021 | BIT(priv->params.mpwqe_log_stride_sz), |
| 3022 | priv->params.rx_cqe_compress_admin); |
| 3023 | |
Tariq Toukan | 461017c | 2016-04-20 22:02:13 +0300 | [diff] [blame] | 3024 | priv->params.min_rx_wqes = mlx5_min_rx_wqes(priv->params.rq_wq_type, |
| 3025 | BIT(priv->params.log_rq_size)); |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 3026 | |
Gil Rockah | cb3c7fd | 2016-06-23 17:02:41 +0300 | [diff] [blame] | 3027 | priv->params.rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation); |
| 3028 | mlx5e_set_rx_cq_mode_params(&priv->params, cq_period_mode); |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 3029 | |
| 3030 | priv->params.tx_cq_moderation.usec = |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3031 | MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC; |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 3032 | priv->params.tx_cq_moderation.pkts = |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3033 | MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_PKTS; |
Achiad Shochat | 58d5229 | 2015-07-23 23:35:58 +0300 | [diff] [blame] | 3034 | priv->params.tx_max_inline = mlx5e_get_max_inline_cap(mdev); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3035 | priv->params.num_tc = 1; |
Saeed Mahameed | 2be6967 | 2015-07-23 23:35:56 +0300 | [diff] [blame] | 3036 | priv->params.rss_hfunc = ETH_RSS_HASH_XOR; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3037 | |
Achiad Shochat | 57afead | 2015-08-16 16:04:45 +0300 | [diff] [blame] | 3038 | netdev_rss_key_fill(priv->params.toeplitz_hash_key, |
| 3039 | sizeof(priv->params.toeplitz_hash_key)); |
| 3040 | |
Tariq Toukan | d8c9660 | 2016-04-20 22:02:11 +0300 | [diff] [blame] | 3041 | mlx5e_build_default_indir_rqt(mdev, priv->params.indirection_rqt, |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3042 | MLX5E_INDIR_RQT_SIZE, profile->max_nch(mdev)); |
Achiad Shochat | 2d75b2b | 2015-08-16 16:04:47 +0300 | [diff] [blame] | 3043 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3044 | priv->params.lro_wqe_sz = |
| 3045 | MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; |
| 3046 | |
Tariq Toukan | 9908aa2 | 2016-06-23 17:02:40 +0300 | [diff] [blame] | 3047 | /* Initialize pflags */ |
| 3048 | MLX5E_SET_PRIV_FLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER, |
| 3049 | priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE); |
| 3050 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3051 | priv->mdev = mdev; |
| 3052 | priv->netdev = netdev; |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3053 | priv->params.num_channels = profile->max_nch(mdev); |
| 3054 | priv->profile = profile; |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3055 | priv->ppriv = ppriv; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3056 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 3057 | #ifdef CONFIG_MLX5_CORE_EN_DCB |
| 3058 | mlx5e_ets_init(priv); |
| 3059 | #endif |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3060 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3061 | mutex_init(&priv->state_lock); |
| 3062 | |
| 3063 | INIT_WORK(&priv->update_carrier_work, mlx5e_update_carrier_work); |
| 3064 | INIT_WORK(&priv->set_rx_mode_work, mlx5e_set_rx_mode_work); |
Daniel Jurgens | 3947ca1 | 2016-06-30 17:34:45 +0300 | [diff] [blame] | 3065 | INIT_WORK(&priv->tx_timeout_work, mlx5e_tx_timeout_work); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3066 | INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work); |
| 3067 | } |
| 3068 | |
| 3069 | static void mlx5e_set_netdev_dev_addr(struct net_device *netdev) |
| 3070 | { |
| 3071 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 3072 | |
Saeed Mahameed | e1d7d34 | 2015-12-01 18:03:11 +0200 | [diff] [blame] | 3073 | mlx5_query_nic_vport_mac_address(priv->mdev, 0, netdev->dev_addr); |
Saeed Mahameed | 108805f | 2015-12-10 17:12:38 +0200 | [diff] [blame] | 3074 | if (is_zero_ether_addr(netdev->dev_addr) && |
| 3075 | !MLX5_CAP_GEN(priv->mdev, vport_group_manager)) { |
| 3076 | eth_hw_addr_random(netdev); |
| 3077 | mlx5_core_info(priv->mdev, "Assigned random MAC address %pM\n", netdev->dev_addr); |
| 3078 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3079 | } |
| 3080 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 3081 | static const struct switchdev_ops mlx5e_switchdev_ops = { |
| 3082 | .switchdev_port_attr_get = mlx5e_attr_get, |
| 3083 | }; |
| 3084 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3085 | static void mlx5e_build_nic_netdev(struct net_device *netdev) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3086 | { |
| 3087 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 3088 | struct mlx5_core_dev *mdev = priv->mdev; |
Eran Ben Elisha | 94cb1eb | 2016-04-24 22:51:52 +0300 | [diff] [blame] | 3089 | bool fcs_supported; |
| 3090 | bool fcs_enabled; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3091 | |
| 3092 | SET_NETDEV_DEV(netdev, &mdev->pdev->dev); |
| 3093 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 3094 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) { |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 3095 | netdev->netdev_ops = &mlx5e_netdev_ops_sriov; |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 3096 | #ifdef CONFIG_MLX5_CORE_EN_DCB |
| 3097 | netdev->dcbnl_ops = &mlx5e_dcbnl_ops; |
| 3098 | #endif |
| 3099 | } else { |
Saeed Mahameed | b0eed40 | 2016-02-09 14:57:44 +0200 | [diff] [blame] | 3100 | netdev->netdev_ops = &mlx5e_netdev_ops_basic; |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 3101 | } |
Saeed Mahameed | 66e49de | 2015-12-01 18:03:25 +0200 | [diff] [blame] | 3102 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3103 | netdev->watchdog_timeo = 15 * HZ; |
| 3104 | |
| 3105 | netdev->ethtool_ops = &mlx5e_ethtool_ops; |
| 3106 | |
Saeed Mahameed | 12be4b2 | 2015-06-11 14:47:31 +0300 | [diff] [blame] | 3107 | netdev->vlan_features |= NETIF_F_SG; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3108 | netdev->vlan_features |= NETIF_F_IP_CSUM; |
| 3109 | netdev->vlan_features |= NETIF_F_IPV6_CSUM; |
| 3110 | netdev->vlan_features |= NETIF_F_GRO; |
| 3111 | netdev->vlan_features |= NETIF_F_TSO; |
| 3112 | netdev->vlan_features |= NETIF_F_TSO6; |
| 3113 | netdev->vlan_features |= NETIF_F_RXCSUM; |
| 3114 | netdev->vlan_features |= NETIF_F_RXHASH; |
| 3115 | |
| 3116 | if (!!MLX5_CAP_ETH(mdev, lro_cap)) |
| 3117 | netdev->vlan_features |= NETIF_F_LRO; |
| 3118 | |
| 3119 | netdev->hw_features = netdev->vlan_features; |
Achiad Shochat | e4cf27b | 2015-11-03 08:07:23 +0200 | [diff] [blame] | 3120 | netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3121 | netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_RX; |
| 3122 | netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; |
| 3123 | |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 3124 | if (mlx5e_vxlan_allowed(mdev)) { |
Alexander Duyck | b49663c | 2016-05-02 09:38:43 -0700 | [diff] [blame] | 3125 | netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | |
| 3126 | NETIF_F_GSO_UDP_TUNNEL_CSUM | |
| 3127 | NETIF_F_GSO_PARTIAL; |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 3128 | netdev->hw_enc_features |= NETIF_F_IP_CSUM; |
Alexander Duyck | f3ed653 | 2016-05-02 09:38:49 -0700 | [diff] [blame] | 3129 | netdev->hw_enc_features |= NETIF_F_IPV6_CSUM; |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 3130 | netdev->hw_enc_features |= NETIF_F_TSO; |
| 3131 | netdev->hw_enc_features |= NETIF_F_TSO6; |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 3132 | netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL; |
Alexander Duyck | b49663c | 2016-05-02 09:38:43 -0700 | [diff] [blame] | 3133 | netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM | |
| 3134 | NETIF_F_GSO_PARTIAL; |
| 3135 | netdev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; |
Matthew Finlay | b3f63c3 | 2016-02-22 18:17:32 +0200 | [diff] [blame] | 3136 | } |
| 3137 | |
Eran Ben Elisha | 94cb1eb | 2016-04-24 22:51:52 +0300 | [diff] [blame] | 3138 | mlx5_query_port_fcs(mdev, &fcs_supported, &fcs_enabled); |
| 3139 | |
| 3140 | if (fcs_supported) |
| 3141 | netdev->hw_features |= NETIF_F_RXALL; |
| 3142 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3143 | netdev->features = netdev->hw_features; |
| 3144 | if (!priv->params.lro_en) |
| 3145 | netdev->features &= ~NETIF_F_LRO; |
| 3146 | |
Eran Ben Elisha | 94cb1eb | 2016-04-24 22:51:52 +0300 | [diff] [blame] | 3147 | if (fcs_enabled) |
| 3148 | netdev->features &= ~NETIF_F_RXALL; |
| 3149 | |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 3150 | #define FT_CAP(f) MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_receive.f) |
| 3151 | if (FT_CAP(flow_modify_en) && |
| 3152 | FT_CAP(modify_root) && |
| 3153 | FT_CAP(identified_miss_table_mode) && |
Maor Gottlieb | 1cabe6b | 2016-04-29 01:36:40 +0300 | [diff] [blame] | 3154 | FT_CAP(flow_table_modify)) { |
| 3155 | netdev->hw_features |= NETIF_F_HW_TC; |
| 3156 | #ifdef CONFIG_RFS_ACCEL |
| 3157 | netdev->hw_features |= NETIF_F_NTUPLE; |
| 3158 | #endif |
| 3159 | } |
Amir Vadai | e8f887a | 2016-03-08 12:42:36 +0200 | [diff] [blame] | 3160 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3161 | netdev->features |= NETIF_F_HIGHDMA; |
| 3162 | |
| 3163 | netdev->priv_flags |= IFF_UNICAST_FLT; |
| 3164 | |
| 3165 | mlx5e_set_netdev_dev_addr(netdev); |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 3166 | |
| 3167 | #ifdef CONFIG_NET_SWITCHDEV |
| 3168 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) |
| 3169 | netdev->switchdev_ops = &mlx5e_switchdev_ops; |
| 3170 | #endif |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3171 | } |
| 3172 | |
Rana Shahout | 593cf33 | 2016-04-20 22:02:10 +0300 | [diff] [blame] | 3173 | static void mlx5e_create_q_counter(struct mlx5e_priv *priv) |
| 3174 | { |
| 3175 | struct mlx5_core_dev *mdev = priv->mdev; |
| 3176 | int err; |
| 3177 | |
| 3178 | err = mlx5_core_alloc_q_counter(mdev, &priv->q_counter); |
| 3179 | if (err) { |
| 3180 | mlx5_core_warn(mdev, "alloc queue counter failed, %d\n", err); |
| 3181 | priv->q_counter = 0; |
| 3182 | } |
| 3183 | } |
| 3184 | |
| 3185 | static void mlx5e_destroy_q_counter(struct mlx5e_priv *priv) |
| 3186 | { |
| 3187 | if (!priv->q_counter) |
| 3188 | return; |
| 3189 | |
| 3190 | mlx5_core_dealloc_q_counter(priv->mdev, priv->q_counter); |
| 3191 | } |
| 3192 | |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3193 | static int mlx5e_create_umr_mkey(struct mlx5e_priv *priv) |
| 3194 | { |
| 3195 | struct mlx5_core_dev *mdev = priv->mdev; |
| 3196 | struct mlx5_create_mkey_mbox_in *in; |
| 3197 | struct mlx5_mkey_seg *mkc; |
| 3198 | int inlen = sizeof(*in); |
| 3199 | u64 npages = |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3200 | priv->profile->max_nch(mdev) * MLX5_CHANNEL_MAX_NUM_MTTS; |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3201 | int err; |
| 3202 | |
| 3203 | in = mlx5_vzalloc(inlen); |
| 3204 | if (!in) |
| 3205 | return -ENOMEM; |
| 3206 | |
| 3207 | mkc = &in->seg; |
| 3208 | mkc->status = MLX5_MKEY_STATUS_FREE; |
| 3209 | mkc->flags = MLX5_PERM_UMR_EN | |
| 3210 | MLX5_PERM_LOCAL_READ | |
| 3211 | MLX5_PERM_LOCAL_WRITE | |
| 3212 | MLX5_ACCESS_MODE_MTT; |
| 3213 | |
| 3214 | mkc->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3215 | mkc->flags_pd = cpu_to_be32(mdev->mlx5e_res.pdn); |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3216 | mkc->len = cpu_to_be64(npages << PAGE_SHIFT); |
| 3217 | mkc->xlt_oct_size = cpu_to_be32(mlx5e_get_mtt_octw(npages)); |
| 3218 | mkc->log2_page_size = PAGE_SHIFT; |
| 3219 | |
| 3220 | err = mlx5_core_create_mkey(mdev, &priv->umr_mkey, in, inlen, NULL, |
| 3221 | NULL, NULL); |
| 3222 | |
| 3223 | kvfree(in); |
| 3224 | |
| 3225 | return err; |
| 3226 | } |
| 3227 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3228 | static void mlx5e_nic_init(struct mlx5_core_dev *mdev, |
| 3229 | struct net_device *netdev, |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3230 | const struct mlx5e_profile *profile, |
| 3231 | void *ppriv) |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3232 | { |
| 3233 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 3234 | |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3235 | mlx5e_build_nic_netdev_priv(mdev, netdev, profile, ppriv); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3236 | mlx5e_build_nic_netdev(netdev); |
| 3237 | mlx5e_vxlan_init(priv); |
| 3238 | } |
| 3239 | |
| 3240 | static void mlx5e_nic_cleanup(struct mlx5e_priv *priv) |
| 3241 | { |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3242 | struct mlx5_core_dev *mdev = priv->mdev; |
| 3243 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
| 3244 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3245 | mlx5e_vxlan_cleanup(priv); |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3246 | |
| 3247 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) |
| 3248 | mlx5_eswitch_unregister_vport_rep(esw, 0); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3249 | } |
| 3250 | |
| 3251 | static int mlx5e_init_nic_rx(struct mlx5e_priv *priv) |
| 3252 | { |
| 3253 | struct mlx5_core_dev *mdev = priv->mdev; |
| 3254 | int err; |
| 3255 | int i; |
| 3256 | |
| 3257 | err = mlx5e_create_indirect_rqts(priv); |
| 3258 | if (err) { |
| 3259 | mlx5_core_warn(mdev, "create indirect rqts failed, %d\n", err); |
| 3260 | return err; |
| 3261 | } |
| 3262 | |
| 3263 | err = mlx5e_create_direct_rqts(priv); |
| 3264 | if (err) { |
| 3265 | mlx5_core_warn(mdev, "create direct rqts failed, %d\n", err); |
| 3266 | goto err_destroy_indirect_rqts; |
| 3267 | } |
| 3268 | |
| 3269 | err = mlx5e_create_indirect_tirs(priv); |
| 3270 | if (err) { |
| 3271 | mlx5_core_warn(mdev, "create indirect tirs failed, %d\n", err); |
| 3272 | goto err_destroy_direct_rqts; |
| 3273 | } |
| 3274 | |
| 3275 | err = mlx5e_create_direct_tirs(priv); |
| 3276 | if (err) { |
| 3277 | mlx5_core_warn(mdev, "create direct tirs failed, %d\n", err); |
| 3278 | goto err_destroy_indirect_tirs; |
| 3279 | } |
| 3280 | |
| 3281 | err = mlx5e_create_flow_steering(priv); |
| 3282 | if (err) { |
| 3283 | mlx5_core_warn(mdev, "create flow steering failed, %d\n", err); |
| 3284 | goto err_destroy_direct_tirs; |
| 3285 | } |
| 3286 | |
| 3287 | err = mlx5e_tc_init(priv); |
| 3288 | if (err) |
| 3289 | goto err_destroy_flow_steering; |
| 3290 | |
| 3291 | return 0; |
| 3292 | |
| 3293 | err_destroy_flow_steering: |
| 3294 | mlx5e_destroy_flow_steering(priv); |
| 3295 | err_destroy_direct_tirs: |
| 3296 | mlx5e_destroy_direct_tirs(priv); |
| 3297 | err_destroy_indirect_tirs: |
| 3298 | mlx5e_destroy_indirect_tirs(priv); |
| 3299 | err_destroy_direct_rqts: |
| 3300 | for (i = 0; i < priv->profile->max_nch(mdev); i++) |
| 3301 | mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt); |
| 3302 | err_destroy_indirect_rqts: |
| 3303 | mlx5e_destroy_rqt(priv, &priv->indir_rqt); |
| 3304 | return err; |
| 3305 | } |
| 3306 | |
| 3307 | static void mlx5e_cleanup_nic_rx(struct mlx5e_priv *priv) |
| 3308 | { |
| 3309 | int i; |
| 3310 | |
| 3311 | mlx5e_tc_cleanup(priv); |
| 3312 | mlx5e_destroy_flow_steering(priv); |
| 3313 | mlx5e_destroy_direct_tirs(priv); |
| 3314 | mlx5e_destroy_indirect_tirs(priv); |
| 3315 | for (i = 0; i < priv->profile->max_nch(priv->mdev); i++) |
| 3316 | mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt); |
| 3317 | mlx5e_destroy_rqt(priv, &priv->indir_rqt); |
| 3318 | } |
| 3319 | |
| 3320 | static int mlx5e_init_nic_tx(struct mlx5e_priv *priv) |
| 3321 | { |
| 3322 | int err; |
| 3323 | |
| 3324 | err = mlx5e_create_tises(priv); |
| 3325 | if (err) { |
| 3326 | mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err); |
| 3327 | return err; |
| 3328 | } |
| 3329 | |
| 3330 | #ifdef CONFIG_MLX5_CORE_EN_DCB |
| 3331 | mlx5e_dcbnl_ieee_setets_core(priv, &priv->params.ets); |
| 3332 | #endif |
| 3333 | return 0; |
| 3334 | } |
| 3335 | |
| 3336 | static void mlx5e_nic_enable(struct mlx5e_priv *priv) |
| 3337 | { |
| 3338 | struct net_device *netdev = priv->netdev; |
| 3339 | struct mlx5_core_dev *mdev = priv->mdev; |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3340 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
| 3341 | struct mlx5_eswitch_rep rep; |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3342 | |
| 3343 | if (mlx5e_vxlan_allowed(mdev)) { |
| 3344 | rtnl_lock(); |
| 3345 | udp_tunnel_get_rx_info(netdev); |
| 3346 | rtnl_unlock(); |
| 3347 | } |
| 3348 | |
| 3349 | mlx5e_enable_async_events(priv); |
| 3350 | queue_work(priv->wq, &priv->set_rx_mode_work); |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3351 | |
| 3352 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) { |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 3353 | rep.load = mlx5e_nic_rep_load; |
| 3354 | rep.unload = mlx5e_nic_rep_unload; |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3355 | rep.vport = 0; |
| 3356 | rep.priv_data = priv; |
| 3357 | mlx5_eswitch_register_vport_rep(esw, &rep); |
| 3358 | } |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3359 | } |
| 3360 | |
| 3361 | static void mlx5e_nic_disable(struct mlx5e_priv *priv) |
| 3362 | { |
| 3363 | queue_work(priv->wq, &priv->set_rx_mode_work); |
| 3364 | mlx5e_disable_async_events(priv); |
| 3365 | } |
| 3366 | |
| 3367 | static const struct mlx5e_profile mlx5e_nic_profile = { |
| 3368 | .init = mlx5e_nic_init, |
| 3369 | .cleanup = mlx5e_nic_cleanup, |
| 3370 | .init_rx = mlx5e_init_nic_rx, |
| 3371 | .cleanup_rx = mlx5e_cleanup_nic_rx, |
| 3372 | .init_tx = mlx5e_init_nic_tx, |
| 3373 | .cleanup_tx = mlx5e_cleanup_nic_tx, |
| 3374 | .enable = mlx5e_nic_enable, |
| 3375 | .disable = mlx5e_nic_disable, |
| 3376 | .update_stats = mlx5e_update_stats, |
| 3377 | .max_nch = mlx5e_get_max_num_channels, |
| 3378 | .max_tc = MLX5E_MAX_NUM_TC, |
| 3379 | }; |
| 3380 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 3381 | void *mlx5e_create_netdev(struct mlx5_core_dev *mdev, |
| 3382 | const struct mlx5e_profile *profile, void *ppriv) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3383 | { |
| 3384 | struct net_device *netdev; |
| 3385 | struct mlx5e_priv *priv; |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3386 | int nch = profile->max_nch(mdev); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3387 | int err; |
| 3388 | |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 3389 | netdev = alloc_etherdev_mqs(sizeof(struct mlx5e_priv), |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3390 | nch * profile->max_tc, |
Saeed Mahameed | 08fb1da | 2016-02-22 18:17:26 +0200 | [diff] [blame] | 3391 | nch); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3392 | if (!netdev) { |
| 3393 | mlx5_core_err(mdev, "alloc_etherdev_mqs() failed\n"); |
| 3394 | return NULL; |
| 3395 | } |
| 3396 | |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3397 | profile->init(mdev, netdev, profile, ppriv); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3398 | |
| 3399 | netif_carrier_off(netdev); |
| 3400 | |
| 3401 | priv = netdev_priv(netdev); |
| 3402 | |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 3403 | priv->wq = create_singlethread_workqueue("mlx5e"); |
| 3404 | if (!priv->wq) |
| 3405 | goto err_free_netdev; |
| 3406 | |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3407 | err = mlx5e_create_umr_mkey(priv); |
| 3408 | if (err) { |
| 3409 | mlx5_core_err(mdev, "create umr mkey failed, %d\n", err); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3410 | goto err_destroy_wq; |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3411 | } |
| 3412 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3413 | err = profile->init_tx(priv); |
| 3414 | if (err) |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3415 | goto err_destroy_umr_mkey; |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3416 | |
| 3417 | err = mlx5e_open_drop_rq(priv); |
| 3418 | if (err) { |
| 3419 | mlx5_core_err(mdev, "open drop rq failed, %d\n", err); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3420 | goto err_cleanup_tx; |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3421 | } |
| 3422 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3423 | err = profile->init_rx(priv); |
| 3424 | if (err) |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3425 | goto err_close_drop_rq; |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3426 | |
Rana Shahout | 593cf33 | 2016-04-20 22:02:10 +0300 | [diff] [blame] | 3427 | mlx5e_create_q_counter(priv); |
| 3428 | |
Maor Gottlieb | 33cfaaa | 2016-04-29 01:36:38 +0300 | [diff] [blame] | 3429 | mlx5e_init_l2_addr(priv); |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3430 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3431 | err = register_netdev(netdev); |
| 3432 | if (err) { |
Achiad Shochat | 1f2a300 | 2015-07-29 15:05:44 +0300 | [diff] [blame] | 3433 | mlx5_core_err(mdev, "register_netdev failed, %d\n", err); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3434 | goto err_dealloc_q_counters; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3435 | } |
| 3436 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3437 | if (profile->enable) |
| 3438 | profile->enable(priv); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3439 | |
| 3440 | return priv; |
| 3441 | |
Rana Shahout | 593cf33 | 2016-04-20 22:02:10 +0300 | [diff] [blame] | 3442 | err_dealloc_q_counters: |
| 3443 | mlx5e_destroy_q_counter(priv); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3444 | profile->cleanup_rx(priv); |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3445 | |
| 3446 | err_close_drop_rq: |
| 3447 | mlx5e_close_drop_rq(priv); |
| 3448 | |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3449 | err_cleanup_tx: |
| 3450 | profile->cleanup_tx(priv); |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3451 | |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3452 | err_destroy_umr_mkey: |
| 3453 | mlx5_core_destroy_mkey(mdev, &priv->umr_mkey); |
| 3454 | |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 3455 | err_destroy_wq: |
| 3456 | destroy_workqueue(priv->wq); |
| 3457 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3458 | err_free_netdev: |
| 3459 | free_netdev(netdev); |
| 3460 | |
| 3461 | return NULL; |
| 3462 | } |
| 3463 | |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3464 | static void mlx5e_register_vport_rep(struct mlx5_core_dev *mdev) |
| 3465 | { |
| 3466 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
| 3467 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); |
| 3468 | int vport; |
| 3469 | |
| 3470 | if (!MLX5_CAP_GEN(mdev, vport_group_manager)) |
| 3471 | return; |
| 3472 | |
| 3473 | for (vport = 1; vport < total_vfs; vport++) { |
| 3474 | struct mlx5_eswitch_rep rep; |
| 3475 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 3476 | rep.load = mlx5e_vport_rep_load; |
| 3477 | rep.unload = mlx5e_vport_rep_unload; |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3478 | rep.vport = vport; |
| 3479 | mlx5_eswitch_register_vport_rep(esw, &rep); |
| 3480 | } |
| 3481 | } |
| 3482 | |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3483 | static void *mlx5e_add(struct mlx5_core_dev *mdev) |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3484 | { |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3485 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
| 3486 | void *ppriv = NULL; |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3487 | void *ret; |
| 3488 | |
| 3489 | if (mlx5e_check_required_hca_cap(mdev)) |
| 3490 | return NULL; |
| 3491 | |
| 3492 | if (mlx5e_create_mdev_resources(mdev)) |
| 3493 | return NULL; |
| 3494 | |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3495 | mlx5e_register_vport_rep(mdev); |
| 3496 | |
| 3497 | if (MLX5_CAP_GEN(mdev, vport_group_manager)) |
| 3498 | ppriv = &esw->offloads.vport_reps[0]; |
| 3499 | |
| 3500 | ret = mlx5e_create_netdev(mdev, &mlx5e_nic_profile, ppriv); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3501 | if (!ret) { |
| 3502 | mlx5e_destroy_mdev_resources(mdev); |
| 3503 | return NULL; |
| 3504 | } |
| 3505 | return ret; |
| 3506 | } |
| 3507 | |
Hadar Hen Zion | cb67b83 | 2016-07-01 14:51:09 +0300 | [diff] [blame] | 3508 | void mlx5e_destroy_netdev(struct mlx5_core_dev *mdev, struct mlx5e_priv *priv) |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3509 | { |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3510 | const struct mlx5e_profile *profile = priv->profile; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3511 | struct net_device *netdev = priv->netdev; |
| 3512 | |
Achiad Shochat | 9b37b07 | 2015-08-04 14:05:46 +0300 | [diff] [blame] | 3513 | set_bit(MLX5E_STATE_DESTROYING, &priv->state); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3514 | if (profile->disable) |
| 3515 | profile->disable(priv); |
Achiad Shochat | 9b37b07 | 2015-08-04 14:05:46 +0300 | [diff] [blame] | 3516 | |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 3517 | flush_workqueue(priv->wq); |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 3518 | if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) { |
| 3519 | netif_device_detach(netdev); |
Eran Ben Elisha | 811afea | 2016-06-10 00:07:39 +0300 | [diff] [blame] | 3520 | mlx5e_close(netdev); |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 3521 | } else { |
| 3522 | unregister_netdev(netdev); |
| 3523 | } |
| 3524 | |
Rana Shahout | 593cf33 | 2016-04-20 22:02:10 +0300 | [diff] [blame] | 3525 | mlx5e_destroy_q_counter(priv); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3526 | profile->cleanup_rx(priv); |
Achiad Shochat | 5c50368 | 2015-08-04 14:05:43 +0300 | [diff] [blame] | 3527 | mlx5e_close_drop_rq(priv); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3528 | profile->cleanup_tx(priv); |
Tariq Toukan | bc77b24 | 2016-04-20 22:02:15 +0300 | [diff] [blame] | 3529 | mlx5_core_destroy_mkey(priv->mdev, &priv->umr_mkey); |
Matthew Finlay | 7bb2975 | 2016-05-01 22:59:56 +0300 | [diff] [blame] | 3530 | cancel_delayed_work_sync(&priv->update_stats_work); |
| 3531 | destroy_workqueue(priv->wq); |
Hadar Hen Zion | 6bfd390 | 2016-07-01 14:51:07 +0300 | [diff] [blame] | 3532 | if (profile->cleanup) |
| 3533 | profile->cleanup(priv); |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 3534 | |
| 3535 | if (!test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) |
| 3536 | free_netdev(netdev); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3537 | } |
| 3538 | |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3539 | static void mlx5e_remove(struct mlx5_core_dev *mdev, void *vpriv) |
| 3540 | { |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3541 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
| 3542 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3543 | struct mlx5e_priv *priv = vpriv; |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3544 | int vport; |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3545 | |
| 3546 | mlx5e_destroy_netdev(mdev, priv); |
Hadar Hen Zion | 127ea38 | 2016-07-01 14:51:08 +0300 | [diff] [blame] | 3547 | |
| 3548 | for (vport = 1; vport < total_vfs; vport++) |
| 3549 | mlx5_eswitch_unregister_vport_rep(esw, vport); |
| 3550 | |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3551 | mlx5e_destroy_mdev_resources(mdev); |
| 3552 | } |
| 3553 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3554 | static void *mlx5e_get_netdev(void *vpriv) |
| 3555 | { |
| 3556 | struct mlx5e_priv *priv = vpriv; |
| 3557 | |
| 3558 | return priv->netdev; |
| 3559 | } |
| 3560 | |
| 3561 | static struct mlx5_interface mlx5e_interface = { |
Hadar Hen Zion | b50d292 | 2016-07-01 14:51:04 +0300 | [diff] [blame] | 3562 | .add = mlx5e_add, |
| 3563 | .remove = mlx5e_remove, |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3564 | .event = mlx5e_async_event, |
| 3565 | .protocol = MLX5_INTERFACE_PROTOCOL_ETH, |
| 3566 | .get_dev = mlx5e_get_netdev, |
| 3567 | }; |
| 3568 | |
| 3569 | void mlx5e_init(void) |
| 3570 | { |
Gal Pressman | 665bc53 | 2016-06-23 17:02:45 +0300 | [diff] [blame] | 3571 | mlx5e_build_ptys2ethtool_map(); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 3572 | mlx5_register_interface(&mlx5e_interface); |
| 3573 | } |
| 3574 | |
| 3575 | void mlx5e_cleanup(void) |
| 3576 | { |
| 3577 | mlx5_unregister_interface(&mlx5e_interface); |
| 3578 | } |