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Paul Mackerrasf8ef2702005-11-19 20:46:04 +11001#ifndef __ASM_POWERPC_PCI_H
2#define __ASM_POWERPC_PCI_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003#ifdef __KERNEL__
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/types.h>
13#include <linux/slab.h>
14#include <linux/string.h>
15#include <linux/dma-mapping.h>
16
17#include <asm/machdep.h>
18#include <asm/scatterlist.h>
19#include <asm/io.h>
20#include <asm/prom.h>
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110021#include <asm/pci-bridge.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#include <asm-generic/pci-dma-compat.h>
24
25#define PCIBIOS_MIN_IO 0x1000
26#define PCIBIOS_MIN_MEM 0x10000000
27
28struct pci_dev;
29
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110030/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
31#define IOBASE_BRIDGE_NUMBER 0
32#define IOBASE_MEMORY 1
33#define IOBASE_IO 2
34#define IOBASE_ISA_IO 3
35#define IOBASE_ISA_MEM 4
36
37/*
38 * Set this to 1 if you want the kernel to re-assign all PCI
39 * bus numbers
40 */
41extern int pci_assign_all_buses;
42#define pcibios_assign_all_busses() (pci_assign_all_buses)
43
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#define pcibios_scan_all_fns(a, b) 0
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
46static inline void pcibios_set_master(struct pci_dev *dev)
47{
48 /* No special bus mastering setup handling */
49}
50
David Shaohua Lic9c3e452005-04-01 00:07:31 -050051static inline void pcibios_penalize_isa_irq(int irq, int active)
Linus Torvalds1da177e2005-04-16 15:20:36 -070052{
53 /* We don't do dynamic PCI IRQ allocation */
54}
55
56#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
57static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
58{
59 if (ppc_md.pci_get_legacy_ide_irq)
60 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
61 return channel ? 15 : 14;
62}
63
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110064#ifdef CONFIG_PPC64
Linus Torvalds1da177e2005-04-16 15:20:36 -070065#define HAVE_ARCH_PCI_MWI 1
66static inline int pcibios_prep_mwi(struct pci_dev *dev)
67{
68 /*
69 * We would like to avoid touching the cacheline size or MWI bit
70 * but we cant do that with the current pcibios_prep_mwi
71 * interface. pSeries firmware sets the cacheline size (which is not
72 * the cpu cacheline size in all cases) and hardware treats MWI
73 * the same as memory write. So we dont touch the cacheline size
74 * here and allow the generic code to set the MWI bit.
75 */
76 return 0;
77}
78
Linus Torvalds1da177e2005-04-16 15:20:36 -070079extern struct dma_mapping_ops pci_dma_ops;
80
81/* For DAC DMA, we currently don't support it by default, but
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110082 * we let 64-bit platforms override this.
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 */
84static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
85{
86 if (pci_dma_ops.dac_dma_supported)
87 return pci_dma_ops.dac_dma_supported(&hwdev->dev, mask);
88 return 0;
89}
90
Andrew Mortonbb4a61b2005-06-06 23:07:46 -070091#ifdef CONFIG_PCI
David S. Millere24c2d92005-06-02 12:55:50 -070092static inline void pci_dma_burst_advice(struct pci_dev *pdev,
93 enum pci_dma_burst_strategy *strat,
94 unsigned long *strategy_parameter)
95{
96 unsigned long cacheline_size;
97 u8 byte;
98
99 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
100 if (byte == 0)
101 cacheline_size = 1024;
102 else
103 cacheline_size = (int) byte * 4;
104
105 *strat = PCI_DMA_BURST_MULTIPLE;
106 *strategy_parameter = cacheline_size;
107}
Andrew Mortonbb4a61b2005-06-06 23:07:46 -0700108#endif
David S. Millere24c2d92005-06-02 12:55:50 -0700109
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110extern int pci_domain_nr(struct pci_bus *bus);
111
112/* Decide whether to display the domain number in /proc */
113extern int pci_proc_domain(struct pci_bus *bus);
114
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100115#else /* 32-bit */
116
117#ifdef CONFIG_PCI
118static inline void pci_dma_burst_advice(struct pci_dev *pdev,
119 enum pci_dma_burst_strategy *strat,
120 unsigned long *strategy_parameter)
121{
122 *strat = PCI_DMA_BURST_INFINITY;
123 *strategy_parameter = ~0UL;
124}
125#endif
126
127/*
128 * At present there are very few 32-bit PPC machines that can have
129 * memory above the 4GB point, and we don't support that.
130 */
131#define pci_dac_dma_supported(pci_dev, mask) (0)
132
133/* Return the index of the PCI controller for device PDEV. */
134#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
135
136/* Set the name of the bus as it appears in /proc/bus/pci */
137static inline int pci_proc_domain(struct pci_bus *bus)
138{
139 return 0;
140}
141
142#endif /* CONFIG_PPC64 */
143
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144struct vm_area_struct;
145/* Map a range of PCI memory or I/O space for a device into user space */
146int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
147 enum pci_mmap_state mmap_state, int write_combine);
148
149/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
150#define HAVE_PCI_MMAP 1
151
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100152#ifdef CONFIG_PPC64
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153/* pci_unmap_{single,page} is not a nop, thus... */
154#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
155 dma_addr_t ADDR_NAME;
156#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
157 __u32 LEN_NAME;
158#define pci_unmap_addr(PTR, ADDR_NAME) \
159 ((PTR)->ADDR_NAME)
160#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
161 (((PTR)->ADDR_NAME) = (VAL))
162#define pci_unmap_len(PTR, LEN_NAME) \
163 ((PTR)->LEN_NAME)
164#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
165 (((PTR)->LEN_NAME) = (VAL))
166
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100167/* The PCI address space does not equal the physical memory address
168 * space (we have an IOMMU). The IDE and SCSI device layers use
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 * this boolean for bounce buffer decisions.
170 */
171#define PCI_DMA_BUS_IS_PHYS (0)
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100172
173#else /* 32-bit */
174
175/* The PCI address space does equal the physical memory
176 * address space (no IOMMU). The IDE and SCSI device layers use
177 * this boolean for bounce buffer decisions.
178 */
179#define PCI_DMA_BUS_IS_PHYS (1)
180
181/* pci_unmap_{page,single} is a nop so... */
182#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
183#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
184#define pci_unmap_addr(PTR, ADDR_NAME) (0)
185#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
186#define pci_unmap_len(PTR, LEN_NAME) (0)
187#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
188
189#endif /* CONFIG_PPC64 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100191extern void pcibios_resource_to_bus(struct pci_dev *dev,
192 struct pci_bus_region *region,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 struct resource *res);
194
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100195extern void pcibios_bus_to_resource(struct pci_dev *dev,
196 struct resource *res,
Dominik Brodowski43c34732005-08-04 18:06:21 -0700197 struct pci_bus_region *region);
198
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100199static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
200 struct resource *res)
David S. Miller085ae412005-08-08 13:19:08 -0700201{
202 struct resource *root = NULL;
203
204 if (res->flags & IORESOURCE_IO)
205 root = &ioport_resource;
206 if (res->flags & IORESOURCE_MEM)
207 root = &iomem_resource;
208
209 return root;
210}
211
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100212extern int unmap_bus_range(struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100214extern int remap_bus_range(struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100216extern void pcibios_fixup_device_resources(struct pci_dev *dev,
217 struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218
Linas Vepstasfacf0782005-11-03 18:52:01 -0600219extern void pcibios_claim_one_bus(struct pci_bus *b);
220
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
222
John Roseead83712005-11-04 15:30:56 -0600223extern struct pci_dev *of_create_pci_dev(struct device_node *node,
224 struct pci_bus *bus, int devfn);
225
226extern void of_scan_pci_bridge(struct device_node *node,
227 struct pci_dev *dev);
228
229extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
230
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231extern int pci_read_irq_line(struct pci_dev *dev);
232
233extern void pcibios_add_platform_entries(struct pci_dev *dev);
234
235struct file;
236extern pgprot_t pci_phys_mem_access_prot(struct file *file,
Roland Dreier8b150472005-10-28 17:46:18 -0700237 unsigned long pfn,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 unsigned long size,
239 pgprot_t prot);
240
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100241#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32)
Michael Ellerman2311b1f2005-05-13 17:44:10 +1000242#define HAVE_ARCH_PCI_RESOURCE_TO_USER
243extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
244 const struct resource *rsrc,
Greg Kroah-Hartmane31dd6e2006-06-12 17:06:02 -0700245 resource_size_t *start, resource_size_t *end);
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100246#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247
248#endif /* __KERNEL__ */
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100249#endif /* __ASM_POWERPC_PCI_H */