blob: 87b8c7439af028138e87a0ec0eef75156aaccb2c [file] [log] [blame]
Maria Yu6451c372017-09-28 17:04:28 +08001/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14&blsp1_uart0 {
15 status = "ok";
16 pinctrl-names = "default";
17 pinctrl-0 = <&uart_console_active>;
18};
Sayali Lokhande31299932017-12-06 09:41:17 +053019
20&sdhc_1 {
21 /* device core power supply */
22 vdd-supply = <&pm8953_l8>;
23 qcom,vdd-voltage-level = <2900000 2900000>;
24 qcom,vdd-current-level = <200 570000>;
25
26 /* device communication power supply */
27 vdd-io-supply = <&pm8953_l5>;
28 qcom,vdd-io-always-on;
29 qcom,vdd-io-lpm-sup;
30 qcom,vdd-io-voltage-level = <1800000 1800000>;
31 qcom,vdd-io-current-level = <200 325000>;
32
33 pinctrl-names = "active", "sleep";
34 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
35 pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
36
37 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
38 384000000>;
39 qcom,nonremovable;
40 qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
41
42 status = "ok";
43};
44
45&sdhc_2 {
46 /* device core power supply */
47 vdd-supply = <&pm8953_l11>;
48 qcom,vdd-voltage-level = <2950000 2950000>;
49 qcom,vdd-current-level = <15000 800000>;
50
51 /* device communication power supply */
52 vdd-io-supply = <&pm8953_l12>;
53 qcom,vdd-io-voltage-level = <1800000 2950000>;
54 qcom,vdd-io-current-level = <200 22000>;
55
56 pinctrl-names = "active", "sleep";
57 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
58 pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
59
60 #address-cells = <0>;
61 interrupt-parent = <&sdhc_2>;
62 interrupts = <0 1 2>;
63 #interrupt-cells = <1>;
64 interrupt-map-mask = <0xffffffff>;
65 interrupt-map = <0 &intc 0 125 0
66 1 &intc 0 221 0
67 2 &tlmm 133 0>;
68 interrupt-names = "hc_irq", "pwr_irq", "status_irq";
69 cd-gpios = <&tlmm 133 0x1>;
70
71 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
72 200000000>;
73 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
74
75 status = "ok";
76};