Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. |
| 3 | * All rights reserved. |
| 4 | * Authors: Carsten Langgaard <carstenl@mips.com> |
| 5 | * Maciej W. Rozycki <macro@mips.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can distribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License (Version 2) as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 14 | * for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along |
| 17 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 19 | * |
| 20 | * PROM library initialisation code. |
| 21 | */ |
| 22 | #include <linux/config.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/string.h> |
| 25 | #include <linux/kernel.h> |
| 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <asm/bootinfo.h> |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 28 | #include <asm/gt64120.h> |
| 29 | #include <asm/io.h> |
| 30 | #include <asm/system.h> |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 31 | #include <asm/cacheflush.h> |
| 32 | #include <asm/traps.h> |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 33 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/mips-boards/prom.h> |
| 35 | #include <asm/mips-boards/generic.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <asm/mips-boards/bonito64.h> |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 37 | #include <asm/mips-boards/msc01_pci.h> |
| 38 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #include <asm/mips-boards/malta.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | #ifdef CONFIG_KGDB |
| 42 | extern int rs_kgdb_hook(int, int); |
| 43 | extern int rs_putDebugChar(char); |
| 44 | extern char rs_getDebugChar(void); |
| 45 | extern int saa9730_kgdb_hook(int); |
| 46 | extern int saa9730_putDebugChar(char); |
| 47 | extern char saa9730_getDebugChar(void); |
| 48 | #endif |
| 49 | |
| 50 | int prom_argc; |
| 51 | int *_prom_argv, *_prom_envp; |
| 52 | |
| 53 | /* |
| 54 | * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer. |
| 55 | * This macro take care of sign extension, if running in 64-bit mode. |
| 56 | */ |
| 57 | #define prom_envp(index) ((char *)(long)_prom_envp[(index)]) |
| 58 | |
| 59 | int init_debug = 0; |
| 60 | |
| 61 | unsigned int mips_revision_corid; |
| 62 | |
| 63 | /* Bonito64 system controller register base. */ |
| 64 | unsigned long _pcictrl_bonito; |
| 65 | unsigned long _pcictrl_bonito_pcicfg; |
| 66 | |
| 67 | /* GT64120 system controller register base */ |
| 68 | unsigned long _pcictrl_gt64120; |
| 69 | |
| 70 | /* MIPS System controller register base */ |
| 71 | unsigned long _pcictrl_msc; |
| 72 | |
| 73 | char *prom_getenv(char *envname) |
| 74 | { |
| 75 | /* |
| 76 | * Return a pointer to the given environment variable. |
| 77 | * In 64-bit mode: we're using 64-bit pointers, but all pointers |
| 78 | * in the PROM structures are only 32-bit, so we need some |
| 79 | * workarounds, if we are running in 64-bit mode. |
| 80 | */ |
| 81 | int i, index=0; |
| 82 | |
| 83 | i = strlen(envname); |
| 84 | |
| 85 | while (prom_envp(index)) { |
| 86 | if(strncmp(envname, prom_envp(index), i) == 0) { |
| 87 | return(prom_envp(index+1)); |
| 88 | } |
| 89 | index += 2; |
| 90 | } |
| 91 | |
| 92 | return NULL; |
| 93 | } |
| 94 | |
| 95 | static inline unsigned char str2hexnum(unsigned char c) |
| 96 | { |
| 97 | if (c >= '0' && c <= '9') |
| 98 | return c - '0'; |
| 99 | if (c >= 'a' && c <= 'f') |
| 100 | return c - 'a' + 10; |
| 101 | return 0; /* foo */ |
| 102 | } |
| 103 | |
| 104 | static inline void str2eaddr(unsigned char *ea, unsigned char *str) |
| 105 | { |
| 106 | int i; |
| 107 | |
| 108 | for (i = 0; i < 6; i++) { |
| 109 | unsigned char num; |
| 110 | |
| 111 | if((*str == '.') || (*str == ':')) |
| 112 | str++; |
| 113 | num = str2hexnum(*str++) << 4; |
| 114 | num |= (str2hexnum(*str++)); |
| 115 | ea[i] = num; |
| 116 | } |
| 117 | } |
| 118 | |
| 119 | int get_ethernet_addr(char *ethernet_addr) |
| 120 | { |
| 121 | char *ethaddr_str; |
| 122 | |
| 123 | ethaddr_str = prom_getenv("ethaddr"); |
| 124 | if (!ethaddr_str) { |
| 125 | printk("ethaddr not set in boot prom\n"); |
| 126 | return -1; |
| 127 | } |
| 128 | str2eaddr(ethernet_addr, ethaddr_str); |
| 129 | |
| 130 | if (init_debug > 1) { |
| 131 | int i; |
| 132 | printk("get_ethernet_addr: "); |
| 133 | for (i=0; i<5; i++) |
| 134 | printk("%02x:", (unsigned char)*(ethernet_addr+i)); |
| 135 | printk("%02x\n", *(ethernet_addr+i)); |
| 136 | } |
| 137 | |
| 138 | return 0; |
| 139 | } |
| 140 | |
| 141 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
| 142 | static void __init console_config(void) |
| 143 | { |
| 144 | char console_string[40]; |
| 145 | int baud = 0; |
| 146 | char parity = '\0', bits = '\0', flow = '\0'; |
| 147 | char *s; |
| 148 | |
| 149 | if ((strstr(prom_getcmdline(), "console=ttyS")) == NULL) { |
| 150 | s = prom_getenv("modetty0"); |
| 151 | if (s) { |
| 152 | while (*s >= '0' && *s <= '9') |
| 153 | baud = baud*10 + *s++ - '0'; |
| 154 | if (*s == ',') s++; |
| 155 | if (*s) parity = *s++; |
| 156 | if (*s == ',') s++; |
| 157 | if (*s) bits = *s++; |
| 158 | if (*s == ',') s++; |
| 159 | if (*s == 'h') flow = 'r'; |
| 160 | } |
| 161 | if (baud == 0) |
| 162 | baud = 38400; |
| 163 | if (parity != 'n' && parity != 'o' && parity != 'e') |
| 164 | parity = 'n'; |
| 165 | if (bits != '7' && bits != '8') |
| 166 | bits = '8'; |
| 167 | if (flow == '\0') |
| 168 | flow = 'r'; |
| 169 | sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow); |
| 170 | strcat (prom_getcmdline(), console_string); |
| 171 | prom_printf("Config serial console:%s\n", console_string); |
| 172 | } |
| 173 | } |
| 174 | #endif |
| 175 | |
| 176 | #ifdef CONFIG_KGDB |
| 177 | void __init kgdb_config (void) |
| 178 | { |
| 179 | extern int (*generic_putDebugChar)(char); |
| 180 | extern char (*generic_getDebugChar)(void); |
| 181 | char *argptr; |
| 182 | int line, speed; |
| 183 | |
| 184 | argptr = prom_getcmdline(); |
| 185 | if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) { |
| 186 | argptr += strlen("kgdb=ttyS"); |
| 187 | if (*argptr != '0' && *argptr != '1') |
| 188 | printk("KGDB: Unknown serial line /dev/ttyS%c, " |
| 189 | "falling back to /dev/ttyS1\n", *argptr); |
| 190 | line = *argptr == '0' ? 0 : 1; |
| 191 | printk("KGDB: Using serial line /dev/ttyS%d for session\n", line); |
| 192 | |
| 193 | speed = 0; |
| 194 | if (*++argptr == ',') |
| 195 | { |
| 196 | int c; |
| 197 | while ((c = *++argptr) && ('0' <= c && c <= '9')) |
| 198 | speed = speed * 10 + c - '0'; |
| 199 | } |
| 200 | #ifdef CONFIG_MIPS_ATLAS |
| 201 | if (line == 1) { |
| 202 | speed = saa9730_kgdb_hook(speed); |
| 203 | generic_putDebugChar = saa9730_putDebugChar; |
| 204 | generic_getDebugChar = saa9730_getDebugChar; |
| 205 | } |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 206 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | #endif |
| 208 | { |
| 209 | speed = rs_kgdb_hook(line, speed); |
| 210 | generic_putDebugChar = rs_putDebugChar; |
| 211 | generic_getDebugChar = rs_getDebugChar; |
| 212 | } |
| 213 | |
| 214 | prom_printf("KGDB: Using serial line /dev/ttyS%d at %d for session, " |
| 215 | "please connect your debugger\n", line ? 1 : 0, speed); |
| 216 | |
| 217 | { |
| 218 | char *s; |
| 219 | for (s = "Please connect GDB to this port\r\n"; *s; ) |
| 220 | generic_putDebugChar (*s++); |
| 221 | } |
| 222 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | /* Breakpoint is invoked after interrupts are initialised */ |
| 224 | } |
| 225 | } |
| 226 | #endif |
| 227 | |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 228 | void __init mips_nmi_setup (void) |
| 229 | { |
| 230 | void *base; |
| 231 | extern char except_vec_nmi; |
| 232 | |
| 233 | base = cpu_has_veic ? |
| 234 | (void *)(CAC_BASE + 0xa80) : |
| 235 | (void *)(CAC_BASE + 0x380); |
| 236 | memcpy(base, &except_vec_nmi, 0x80); |
| 237 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| 238 | } |
| 239 | |
| 240 | void __init mips_ejtag_setup (void) |
| 241 | { |
| 242 | void *base; |
| 243 | extern char except_vec_ejtag_debug; |
| 244 | |
| 245 | base = cpu_has_veic ? |
| 246 | (void *)(CAC_BASE + 0xa00) : |
| 247 | (void *)(CAC_BASE + 0x300); |
| 248 | memcpy(base, &except_vec_ejtag_debug, 0x80); |
| 249 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| 250 | } |
| 251 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | void __init prom_init(void) |
| 253 | { |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 254 | u32 start, map, mask, data; |
| 255 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | prom_argc = fw_arg0; |
| 257 | _prom_argv = (int *) fw_arg1; |
| 258 | _prom_envp = (int *) fw_arg2; |
| 259 | |
| 260 | mips_display_message("LINUX"); |
| 261 | |
| 262 | #ifdef CONFIG_MIPS_SEAD |
| 263 | set_io_port_base(KSEG1); |
| 264 | #else |
| 265 | /* |
| 266 | * early setup of _pcictrl_bonito so that we can determine |
| 267 | * the system controller on a CORE_EMUL board |
| 268 | */ |
| 269 | _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE); |
| 270 | |
| 271 | mips_revision_corid = MIPS_REVISION_CORID; |
| 272 | |
| 273 | if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) { |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 274 | if (BONITO_PCIDID == 0x0001df53 || |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | BONITO_PCIDID == 0x0003df53) |
| 276 | mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON; |
| 277 | else |
| 278 | mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC; |
| 279 | } |
| 280 | switch(mips_revision_corid) { |
| 281 | case MIPS_REVISION_CORID_QED_RM5261: |
| 282 | case MIPS_REVISION_CORID_CORE_LV: |
| 283 | case MIPS_REVISION_CORID_CORE_FPGA: |
| 284 | case MIPS_REVISION_CORID_CORE_FPGAR2: |
| 285 | /* |
| 286 | * Setup the North bridge to do Master byte-lane swapping |
| 287 | * when running in bigendian. |
| 288 | */ |
| 289 | _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000); |
| 290 | |
| 291 | #ifdef CONFIG_CPU_LITTLE_ENDIAN |
| 292 | GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT | |
| 293 | GT_PCI0_CMD_SBYTESWAP_BIT); |
| 294 | #else |
| 295 | GT_WRITE(GT_PCI0_CMD_OFS, 0); |
| 296 | #endif |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 297 | /* Fix up PCI I/O mapping if necessary (for Atlas). */ |
| 298 | start = GT_READ(GT_PCI0IOLD_OFS); |
| 299 | map = GT_READ(GT_PCI0IOREMAP_OFS); |
| 300 | if ((start & map) != 0) { |
| 301 | map &= ~start; |
| 302 | GT_WRITE(GT_PCI0IOREMAP_OFS, map); |
| 303 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | set_io_port_base(MALTA_GT_PORT_BASE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | break; |
| 307 | |
| 308 | case MIPS_REVISION_CORID_CORE_EMUL_BON: |
| 309 | case MIPS_REVISION_CORID_BONITO64: |
| 310 | case MIPS_REVISION_CORID_CORE_20K: |
| 311 | _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE); |
| 312 | |
| 313 | /* |
| 314 | * Disable Bonito IOBC. |
| 315 | */ |
| 316 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & |
| 317 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
| 318 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
| 319 | |
| 320 | /* |
| 321 | * Setup the North bridge to do Master byte-lane swapping |
| 322 | * when running in bigendian. |
| 323 | */ |
| 324 | #ifdef CONFIG_CPU_LITTLE_ENDIAN |
| 325 | BONITO_BONGENCFG = BONITO_BONGENCFG & |
| 326 | ~(BONITO_BONGENCFG_MSTRBYTESWAP | |
| 327 | BONITO_BONGENCFG_BYTESWAP); |
| 328 | #else |
| 329 | BONITO_BONGENCFG = BONITO_BONGENCFG | |
| 330 | BONITO_BONGENCFG_MSTRBYTESWAP | |
| 331 | BONITO_BONGENCFG_BYTESWAP; |
| 332 | #endif |
| 333 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | set_io_port_base(MALTA_BONITO_PORT_BASE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | break; |
| 336 | |
| 337 | case MIPS_REVISION_CORID_CORE_MSC: |
| 338 | case MIPS_REVISION_CORID_CORE_FPGA2: |
Ralf Baechle | 479a0e3 | 2005-08-16 15:44:06 +0000 | [diff] [blame] | 339 | case MIPS_REVISION_CORID_CORE_FPGA3: |
Chris Dearman | 7a83419 | 2006-04-15 00:31:16 +0100 | [diff] [blame] | 340 | case MIPS_REVISION_CORID_CORE_24K: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | case MIPS_REVISION_CORID_CORE_EMUL_MSC: |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 342 | _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 344 | mb(); |
| 345 | MSC_READ(MSC01_PCI_CFG, data); |
| 346 | MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT); |
| 347 | wmb(); |
| 348 | |
| 349 | /* Fix up lane swapping. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | #ifdef CONFIG_CPU_LITTLE_ENDIAN |
| 351 | MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP); |
| 352 | #else |
| 353 | MSC_WRITE(MSC01_PCI_SWAP, |
| 354 | MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF | |
| 355 | MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF | |
| 356 | MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF); |
| 357 | #endif |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 358 | /* Fix up target memory mapping. */ |
| 359 | MSC_READ(MSC01_PCI_BAR0, mask); |
| 360 | MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | |
Maciej W. Rozycki | aa0980b8 | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 362 | /* Don't handle target retries indefinitely. */ |
| 363 | if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) == |
| 364 | MSC01_PCI_CFG_MAXRTRY_MSK) |
| 365 | data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK << |
| 366 | MSC01_PCI_CFG_MAXRTRY_SHF)) | |
| 367 | ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) << |
| 368 | MSC01_PCI_CFG_MAXRTRY_SHF); |
| 369 | |
| 370 | wmb(); |
| 371 | MSC_WRITE(MSC01_PCI_CFG, data); |
| 372 | mb(); |
| 373 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | set_io_port_base(MALTA_MSC_PORT_BASE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | break; |
| 376 | |
| 377 | default: |
| 378 | /* Unknown Core card */ |
| 379 | mips_display_message("CC Error"); |
| 380 | while(1); /* We die here... */ |
| 381 | } |
| 382 | #endif |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 383 | board_nmi_handler_setup = mips_nmi_setup; |
| 384 | board_ejtag_handler_setup = mips_ejtag_setup; |
| 385 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | prom_printf("\nLINUX started...\n"); |
| 387 | prom_init_cmdline(); |
| 388 | prom_meminit(); |
| 389 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
| 390 | console_config(); |
| 391 | #endif |
| 392 | } |