| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can distribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License (Version 2) as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 11 | * for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License along |
| 14 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 15 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 16 | * |
| 17 | * Interrupt exception dispatch code. |
| 18 | * |
| 19 | */ |
| 20 | #include <linux/config.h> |
| 21 | |
| 22 | #include <asm/asm.h> |
| 23 | #include <asm/mipsregs.h> |
| 24 | #include <asm/regdef.h> |
| 25 | #include <asm/stackframe.h> |
| 26 | |
| 27 | #include <asm/mips-boards/simint.h> |
| 28 | |
| 29 | |
| 30 | .text |
| 31 | .set noreorder |
| 32 | .set noat |
| 33 | .align 5 |
| 34 | NESTED(simIRQ, PT_SIZE, sp) |
| 35 | SAVE_ALL |
| 36 | CLI |
| 37 | .set at |
| 38 | |
| 39 | mfc0 s0, CP0_CAUSE # get irq bits |
| 40 | mfc0 s1, CP0_STATUS # get irq mask |
| 41 | andi s0, ST0_IM # CAUSE.CE may be non-zero! |
| 42 | and s0, s1 |
| 43 | |
| 44 | #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) |
| Ralf Baechle | a3dddd5 | 2006-03-11 08:18:41 +0000 | [diff] [blame] | 45 | .set mips32 |
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 46 | clz a0, s0 |
| 47 | .set mips0 |
| 48 | negu a0 |
| 49 | addu a0, 31-CAUSEB_IP |
| 50 | bltz a0, spurious |
| 51 | #else |
| 52 | beqz s0, spurious |
| 53 | li a0, 7 |
| 54 | |
| 55 | and t0, s0, 0xf000 |
| 56 | sltiu t0, t0, 1 |
| 57 | sll t0, 2 |
| 58 | subu a0, t0 |
| 59 | sll s0, t0 |
| 60 | |
| 61 | and t0, s0, 0xc000 |
| 62 | sltiu t0, t0, 1 |
| 63 | sll t0, 1 |
| 64 | subu a0, t0 |
| 65 | sll s0, t0 |
| 66 | |
| 67 | and t0, s0, 0x8000 |
| 68 | sltiu t0, t0, 1 |
| 69 | # sll t0, 0 |
| 70 | subu a0, t0 |
| 71 | # sll s0, t0 |
| 72 | #endif |
| 73 | |
| 74 | #ifdef CASCADE_IRQ |
| 75 | li a1, CASCADE_IRQ |
| 76 | bne a0, a1, 1f |
| 77 | addu a0, MIPSCPU_INT_BASE |
| 78 | |
| 79 | jal CASCADE_DISPATCH |
| 80 | move a0, sp |
| 81 | |
| 82 | j ret_from_irq |
| 83 | nop |
| 84 | 1: |
| 85 | #else |
| 86 | addu a0, MIPSCPU_INT_BASE |
| 87 | #endif |
| 88 | |
| 89 | jal do_IRQ |
| 90 | move a1, sp |
| 91 | |
| 92 | j ret_from_irq |
| 93 | nop |
| 94 | |
| 95 | |
| 96 | spurious: |
| Ralf Baechle | 93373ed | 2006-04-01 21:17:45 +0100 | [diff] [blame] | 97 | jal spurious_interrupt |
| 98 | nop |
| 99 | j ret_from_irq |
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 100 | nop |
| 101 | END(simIRQ) |