Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2003 PMC-Sierra Inc. |
| 3 | * Author: Manish Lachwani (lachwani@pmc-sierra.com) |
| 4 | * |
Ralf Baechle | e4ac58a | 2006-04-03 17:56:36 +0100 | [diff] [blame] | 5 | * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) |
| 6 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | * |
| 12 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 13 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 15 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 16 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 17 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 18 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 19 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 20 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 21 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License along |
| 24 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 25 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 26 | * |
| 27 | * Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board |
| 28 | */ |
| 29 | #include <linux/config.h> |
| 30 | #include <linux/errno.h> |
| 31 | #include <linux/init.h> |
| 32 | #include <linux/kernel_stat.h> |
| 33 | #include <linux/module.h> |
| 34 | #include <linux/signal.h> |
| 35 | #include <linux/sched.h> |
| 36 | #include <linux/types.h> |
| 37 | #include <linux/interrupt.h> |
| 38 | #include <linux/ioport.h> |
| 39 | #include <linux/irq.h> |
| 40 | #include <linux/timex.h> |
| 41 | #include <linux/slab.h> |
| 42 | #include <linux/random.h> |
| 43 | #include <linux/bitops.h> |
| 44 | #include <asm/bootinfo.h> |
| 45 | #include <asm/io.h> |
| 46 | #include <asm/irq.h> |
| 47 | #include <asm/irq_cpu.h> |
| 48 | #include <asm/mipsregs.h> |
| 49 | #include <asm/system.h> |
| 50 | #include <asm/titan_dep.h> |
| 51 | |
| 52 | /* Hypertransport specific */ |
| 53 | #define IRQ_ACK_BITS 0x00000000 /* Ack bits */ |
| 54 | |
| 55 | #define HYPERTRANSPORT_INTA 0x78 /* INTA# */ |
| 56 | #define HYPERTRANSPORT_INTB 0x79 /* INTB# */ |
| 57 | #define HYPERTRANSPORT_INTC 0x7a /* INTC# */ |
| 58 | #define HYPERTRANSPORT_INTD 0x7b /* INTD# */ |
| 59 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | extern void jaguar_mailbox_irq(struct pt_regs *); |
| 61 | |
| 62 | /* |
| 63 | * Handle hypertransport & SMP interrupts. The interrupt lines are scarce. |
| 64 | * For interprocessor interrupts, the best thing to do is to use the INTMSG |
| 65 | * register. We use the same external interrupt line, i.e. INTB3 and monitor |
| 66 | * another status bit |
| 67 | */ |
| 68 | asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs) |
| 69 | { |
| 70 | u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4); |
| 71 | |
| 72 | /* Ack all the bits that correspond to the interrupt sources */ |
| 73 | if (status != 0) |
| 74 | OCD_WRITE(RM9000x2_OCD_INTP0STATUS4, IRQ_ACK_BITS); |
| 75 | |
| 76 | status = OCD_READ(RM9000x2_OCD_INTP1STATUS4); |
| 77 | if (status != 0) |
| 78 | OCD_WRITE(RM9000x2_OCD_INTP1STATUS4, IRQ_ACK_BITS); |
| 79 | |
| 80 | #ifdef CONFIG_HT_LEVEL_TRIGGER |
| 81 | /* |
| 82 | * Level Trigger Mode only. Send the HT EOI message back to the source. |
| 83 | */ |
| 84 | switch (status) { |
| 85 | case 0x1000000: |
| 86 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA); |
| 87 | break; |
| 88 | case 0x2000000: |
| 89 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB); |
| 90 | break; |
| 91 | case 0x4000000: |
| 92 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC); |
| 93 | break; |
| 94 | case 0x8000000: |
| 95 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD); |
| 96 | break; |
| 97 | case 0x0000001: |
| 98 | /* PLX */ |
| 99 | OCD_WRITE(RM9000x2_OCD_HTEOI, 0x20); |
| 100 | OCD_WRITE(IRQ_CLEAR_REG, IRQ_ACK_BITS); |
| 101 | break; |
| 102 | case 0xf000000: |
| 103 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA); |
| 104 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB); |
| 105 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC); |
| 106 | OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD); |
| 107 | break; |
| 108 | } |
| 109 | #endif /* CONFIG_HT_LEVEL_TRIGGER */ |
| 110 | |
| 111 | do_IRQ(irq, regs); |
| 112 | } |
| 113 | |
| 114 | asmlinkage void do_extended_irq(struct pt_regs *regs) |
| 115 | { |
| 116 | unsigned int intcontrol = read_c0_intcontrol(); |
| 117 | unsigned int cause = read_c0_cause(); |
| 118 | unsigned int status = read_c0_status(); |
| 119 | unsigned int pending_sr, pending_ic; |
| 120 | |
| 121 | pending_sr = status & cause & 0xff00; |
| 122 | pending_ic = (cause >> 8) & intcontrol & 0xff00; |
| 123 | |
| 124 | if (pending_ic & (1 << 13)) |
| 125 | do_IRQ(13, regs); |
| 126 | |
| 127 | } |
| 128 | |
Ralf Baechle | e4ac58a | 2006-04-03 17:56:36 +0100 | [diff] [blame] | 129 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) |
| 130 | { |
| 131 | unsigned int cause = read_c0_cause(); |
| 132 | unsigned int status = read_c0_status(); |
| 133 | unsigned int pending = cause & status; |
| 134 | |
| 135 | if (pending & STATUSF_IP7) { |
| 136 | do_IRQ(7, regs); |
| 137 | } else if (pending & STATUSF_IP2) { |
| 138 | #ifdef CONFIG_HYPERTRANSPORT |
| 139 | ll_ht_smp_irq_handler(2, regs); |
| 140 | #else |
| 141 | do_IRQ(2, regs); |
| 142 | #endif |
| 143 | } else if (pending & STATUSF_IP3) { |
| 144 | do_IRQ(3, regs); |
| 145 | } else if (pending & STATUSF_IP4) { |
| 146 | do_IRQ(4, regs); |
| 147 | } else if (pending & STATUSF_IP5) { |
| 148 | #ifdef CONFIG_SMP |
| 149 | titan_mailbox_irq(regs); |
| 150 | #else |
| 151 | do_IRQ(5, regs); |
| 152 | #endif |
| 153 | } else if (pending & STATUSF_IP6) { |
| 154 | do_IRQ(4, regs); |
| 155 | } |
| 156 | } |
| 157 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | #ifdef CONFIG_KGDB |
| 159 | extern void init_second_port(void); |
| 160 | #endif |
| 161 | |
| 162 | /* |
| 163 | * Initialize the next level interrupt handler |
| 164 | */ |
| 165 | void __init arch_init_irq(void) |
| 166 | { |
| 167 | clear_c0_status(ST0_IM); |
| 168 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | mips_cpu_irq_init(0); |
| 170 | rm7k_cpu_irq_init(8); |
| 171 | rm9k_cpu_irq_init(12); |
| 172 | |
| 173 | #ifdef CONFIG_KGDB |
| 174 | /* At this point, initialize the second serial port */ |
| 175 | init_second_port(); |
| 176 | #endif |
| 177 | |
| 178 | #ifdef CONFIG_GDB_CONSOLE |
| 179 | register_gdb_console(); |
| 180 | #endif |
| 181 | } |
| 182 | |
| 183 | #ifdef CONFIG_KGDB |
| 184 | /* |
| 185 | * The 16550 DUART has two ports, but is allocated one IRQ |
| 186 | * for the serial console. Hence, a generic framework for |
| 187 | * serial IRQ routing in place. Currently, just calls the |
| 188 | * do_IRQ fuction. But, going in the future, need to check |
| 189 | * DUART registers for channel A and B, then decide the |
| 190 | * appropriate action |
| 191 | */ |
| 192 | asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs) |
| 193 | { |
| 194 | do_IRQ(irq, regs); |
| 195 | } |
| 196 | #endif |