Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 1 | /* |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 2 | * Copyright (C) 1995 Linus Torvalds |
| 3 | * Adapted from 'alpha' version by Gary Thomas |
| 4 | * Modified by Cort Dougan (cort@cs.nmt.edu) |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * bootup setup stuff.. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/config.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/sched.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/mm.h> |
| 16 | #include <linux/stddef.h> |
| 17 | #include <linux/unistd.h> |
| 18 | #include <linux/ptrace.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/user.h> |
| 21 | #include <linux/a.out.h> |
| 22 | #include <linux/tty.h> |
| 23 | #include <linux/major.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/reboot.h> |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/pci.h> |
| 28 | #include <linux/version.h> |
| 29 | #include <linux/adb.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/delay.h> |
| 32 | #include <linux/ide.h> |
| 33 | #include <linux/console.h> |
| 34 | #include <linux/seq_file.h> |
| 35 | #include <linux/root_dev.h> |
| 36 | #include <linux/initrd.h> |
| 37 | #include <linux/module.h> |
Paul Mackerras | 9618eda | 2006-03-27 21:48:57 +1100 | [diff] [blame] | 38 | #include <linux/timer.h> |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 39 | |
| 40 | #include <asm/io.h> |
| 41 | #include <asm/pgtable.h> |
| 42 | #include <asm/prom.h> |
| 43 | #include <asm/gg2.h> |
| 44 | #include <asm/pci-bridge.h> |
| 45 | #include <asm/dma.h> |
| 46 | #include <asm/machdep.h> |
| 47 | #include <asm/irq.h> |
| 48 | #include <asm/hydra.h> |
| 49 | #include <asm/sections.h> |
| 50 | #include <asm/time.h> |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 51 | #include <asm/i8259.h> |
| 52 | #include <asm/mpic.h> |
| 53 | #include <asm/rtas.h> |
| 54 | #include <asm/xmon.h> |
| 55 | |
Olaf Hering | 35e95e6 | 2005-10-28 17:46:19 -0700 | [diff] [blame] | 56 | #include "chrp.h" |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 57 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 58 | void rtas_indicator_progress(char *, unsigned short); |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 59 | |
| 60 | int _chrp_type; |
| 61 | EXPORT_SYMBOL(_chrp_type); |
| 62 | |
| 63 | struct mpic *chrp_mpic; |
| 64 | |
Paul Mackerras | 9618eda | 2006-03-27 21:48:57 +1100 | [diff] [blame] | 65 | /* Used for doing CHRP event-scans */ |
| 66 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); |
| 67 | unsigned long event_scan_interval; |
| 68 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 69 | /* |
| 70 | * XXX this should be in xmon.h, but putting it there means xmon.h |
| 71 | * has to include <linux/interrupt.h> (to get irqreturn_t), which |
| 72 | * causes all sorts of problems. -- paulus |
| 73 | */ |
| 74 | extern irqreturn_t xmon_irq(int, void *, struct pt_regs *); |
| 75 | |
| 76 | extern unsigned long loops_per_jiffy; |
| 77 | |
| 78 | #ifdef CONFIG_SMP |
| 79 | extern struct smp_ops_t chrp_smp_ops; |
| 80 | #endif |
| 81 | |
| 82 | static const char *gg2_memtypes[4] = { |
| 83 | "FPM", "SDRAM", "EDO", "BEDO" |
| 84 | }; |
| 85 | static const char *gg2_cachesizes[4] = { |
| 86 | "256 KB", "512 KB", "1 MB", "Reserved" |
| 87 | }; |
| 88 | static const char *gg2_cachetypes[4] = { |
| 89 | "Asynchronous", "Reserved", "Flow-Through Synchronous", |
| 90 | "Pipelined Synchronous" |
| 91 | }; |
| 92 | static const char *gg2_cachemodes[4] = { |
| 93 | "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" |
| 94 | }; |
| 95 | |
| 96 | void chrp_show_cpuinfo(struct seq_file *m) |
| 97 | { |
| 98 | int i, sdramen; |
| 99 | unsigned int t; |
| 100 | struct device_node *root; |
| 101 | const char *model = ""; |
| 102 | |
| 103 | root = find_path_device("/"); |
| 104 | if (root) |
| 105 | model = get_property(root, "model", NULL); |
| 106 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
| 107 | |
| 108 | /* longtrail (goldengate) stuff */ |
| 109 | if (!strncmp(model, "IBM,LongTrail", 13)) { |
| 110 | /* VLSI VAS96011/12 `Golden Gate 2' */ |
| 111 | /* Memory banks */ |
| 112 | sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL) |
| 113 | >>31) & 1; |
| 114 | for (i = 0; i < (sdramen ? 4 : 6); i++) { |
| 115 | t = in_le32(gg2_pci_config_base+ |
| 116 | GG2_PCI_DRAM_BANK0+ |
| 117 | i*4); |
| 118 | if (!(t & 1)) |
| 119 | continue; |
| 120 | switch ((t>>8) & 0x1f) { |
| 121 | case 0x1f: |
| 122 | model = "4 MB"; |
| 123 | break; |
| 124 | case 0x1e: |
| 125 | model = "8 MB"; |
| 126 | break; |
| 127 | case 0x1c: |
| 128 | model = "16 MB"; |
| 129 | break; |
| 130 | case 0x18: |
| 131 | model = "32 MB"; |
| 132 | break; |
| 133 | case 0x10: |
| 134 | model = "64 MB"; |
| 135 | break; |
| 136 | case 0x00: |
| 137 | model = "128 MB"; |
| 138 | break; |
| 139 | default: |
| 140 | model = "Reserved"; |
| 141 | break; |
| 142 | } |
| 143 | seq_printf(m, "memory bank %d\t: %s %s\n", i, model, |
| 144 | gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]); |
| 145 | } |
| 146 | /* L2 cache */ |
| 147 | t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL); |
| 148 | seq_printf(m, "board l2\t: %s %s (%s)\n", |
| 149 | gg2_cachesizes[(t>>7) & 3], |
| 150 | gg2_cachetypes[(t>>2) & 3], |
| 151 | gg2_cachemodes[t & 3]); |
| 152 | } |
| 153 | } |
| 154 | |
| 155 | /* |
| 156 | * Fixes for the National Semiconductor PC78308VUL SuperI/O |
| 157 | * |
| 158 | * Some versions of Open Firmware incorrectly initialize the IRQ settings |
| 159 | * for keyboard and mouse |
| 160 | */ |
| 161 | static inline void __init sio_write(u8 val, u8 index) |
| 162 | { |
| 163 | outb(index, 0x15c); |
| 164 | outb(val, 0x15d); |
| 165 | } |
| 166 | |
| 167 | static inline u8 __init sio_read(u8 index) |
| 168 | { |
| 169 | outb(index, 0x15c); |
| 170 | return inb(0x15d); |
| 171 | } |
| 172 | |
| 173 | static void __init sio_fixup_irq(const char *name, u8 device, u8 level, |
| 174 | u8 type) |
| 175 | { |
| 176 | u8 level0, type0, active; |
| 177 | |
| 178 | /* select logical device */ |
| 179 | sio_write(device, 0x07); |
| 180 | active = sio_read(0x30); |
| 181 | level0 = sio_read(0x70); |
| 182 | type0 = sio_read(0x71); |
| 183 | if (level0 != level || type0 != type || !active) { |
| 184 | printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: " |
| 185 | "remapping to level %d, type %d, active\n", |
| 186 | name, level0, type0, !active ? "in" : "", level, type); |
| 187 | sio_write(0x01, 0x30); |
| 188 | sio_write(level, 0x70); |
| 189 | sio_write(type, 0x71); |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | static void __init sio_init(void) |
| 194 | { |
| 195 | struct device_node *root; |
| 196 | |
| 197 | if ((root = find_path_device("/")) && |
| 198 | !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) { |
| 199 | /* logical device 0 (KBC/Keyboard) */ |
| 200 | sio_fixup_irq("keyboard", 0, 1, 2); |
| 201 | /* select logical device 1 (KBC/Mouse) */ |
| 202 | sio_fixup_irq("mouse", 1, 12, 2); |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | |
| 207 | static void __init pegasos_set_l2cr(void) |
| 208 | { |
| 209 | struct device_node *np; |
| 210 | |
| 211 | /* On Pegasos, enable the l2 cache if needed, as the OF forgets it */ |
| 212 | if (_chrp_type != _CHRP_Pegasos) |
| 213 | return; |
| 214 | |
| 215 | /* Enable L2 cache if needed */ |
| 216 | np = find_type_devices("cpu"); |
| 217 | if (np != NULL) { |
| 218 | unsigned int *l2cr = (unsigned int *) |
| 219 | get_property (np, "l2cr", NULL); |
| 220 | if (l2cr == NULL) { |
| 221 | printk ("Pegasos l2cr : no cpu l2cr property found\n"); |
| 222 | return; |
| 223 | } |
| 224 | if (!((*l2cr) & 0x80000000)) { |
| 225 | printk ("Pegasos l2cr : L2 cache was not active, " |
| 226 | "activating\n"); |
| 227 | _set_L2CR(0); |
| 228 | _set_L2CR((*l2cr) | 0x80000000); |
| 229 | } |
| 230 | } |
| 231 | } |
| 232 | |
| 233 | void __init chrp_setup_arch(void) |
| 234 | { |
| 235 | struct device_node *root = find_path_device ("/"); |
| 236 | char *machine = NULL; |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 237 | |
| 238 | /* init to some ~sane value until calibrate_delay() runs */ |
| 239 | loops_per_jiffy = 50000000/HZ; |
| 240 | |
| 241 | if (root) |
| 242 | machine = get_property(root, "model", NULL); |
| 243 | if (machine && strncmp(machine, "Pegasos", 7) == 0) { |
| 244 | _chrp_type = _CHRP_Pegasos; |
| 245 | } else if (machine && strncmp(machine, "IBM", 3) == 0) { |
| 246 | _chrp_type = _CHRP_IBM; |
| 247 | } else if (machine && strncmp(machine, "MOT", 3) == 0) { |
| 248 | _chrp_type = _CHRP_Motorola; |
| 249 | } else { |
| 250 | /* Let's assume it is an IBM chrp if all else fails */ |
| 251 | _chrp_type = _CHRP_IBM; |
| 252 | } |
| 253 | printk("chrp type = %x\n", _chrp_type); |
| 254 | |
| 255 | rtas_initialize(); |
| 256 | if (rtas_token("display-character") >= 0) |
| 257 | ppc_md.progress = rtas_progress; |
| 258 | |
Paul Mackerras | 49e16b7 | 2005-11-18 15:52:38 +1100 | [diff] [blame] | 259 | /* use RTAS time-of-day routines if available */ |
| 260 | if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) { |
| 261 | ppc_md.get_boot_time = rtas_get_boot_time; |
| 262 | ppc_md.get_rtc_time = rtas_get_rtc_time; |
| 263 | ppc_md.set_rtc_time = rtas_set_rtc_time; |
| 264 | } |
| 265 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 266 | #ifdef CONFIG_BLK_DEV_INITRD |
| 267 | /* this is fine for chrp */ |
| 268 | initrd_below_start_ok = 1; |
| 269 | |
| 270 | if (initrd_start) |
| 271 | ROOT_DEV = Root_RAM0; |
| 272 | else |
| 273 | #endif |
| 274 | ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */ |
| 275 | |
| 276 | /* On pegasos, enable the L2 cache if not already done by OF */ |
| 277 | pegasos_set_l2cr(); |
| 278 | |
| 279 | /* Lookup PCI host bridges */ |
| 280 | chrp_find_bridges(); |
| 281 | |
| 282 | /* |
| 283 | * Temporary fixes for PCI devices. |
| 284 | * -- Geert |
| 285 | */ |
| 286 | hydra_init(); /* Mac I/O */ |
| 287 | |
| 288 | /* |
| 289 | * Fix the Super I/O configuration |
| 290 | */ |
| 291 | sio_init(); |
| 292 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 293 | pci_create_OF_bus_map(); |
| 294 | |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 295 | #ifdef CONFIG_SMP |
| 296 | smp_ops = &chrp_smp_ops; |
| 297 | #endif /* CONFIG_SMP */ |
| 298 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 299 | /* |
| 300 | * Print the banner, then scroll down so boot progress |
| 301 | * can be printed. -- Cort |
| 302 | */ |
| 303 | if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); |
| 304 | } |
| 305 | |
| 306 | void |
Paul Mackerras | 9618eda | 2006-03-27 21:48:57 +1100 | [diff] [blame] | 307 | chrp_event_scan(unsigned long unused) |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 308 | { |
| 309 | unsigned char log[1024]; |
| 310 | int ret = 0; |
| 311 | |
| 312 | /* XXX: we should loop until the hardware says no more error logs -- Cort */ |
| 313 | rtas_call(rtas_token("event-scan"), 4, 1, &ret, 0xffffffff, 0, |
| 314 | __pa(log), 1024); |
Paul Mackerras | 9618eda | 2006-03-27 21:48:57 +1100 | [diff] [blame] | 315 | mod_timer(&__get_cpu_var(heartbeat_timer), |
| 316 | jiffies + event_scan_interval); |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 317 | } |
| 318 | |
| 319 | /* |
| 320 | * Finds the open-pic node and sets up the mpic driver. |
| 321 | */ |
| 322 | static void __init chrp_find_openpic(void) |
| 323 | { |
| 324 | struct device_node *np, *root; |
| 325 | int len, i, j, irq_count; |
| 326 | int isu_size, idu_size; |
| 327 | unsigned int *iranges, *opprop = NULL; |
| 328 | int oplen = 0; |
| 329 | unsigned long opaddr; |
| 330 | int na = 1; |
| 331 | unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS]; |
| 332 | |
| 333 | np = find_type_devices("open-pic"); |
| 334 | if (np == NULL) |
| 335 | return; |
| 336 | root = find_path_device("/"); |
| 337 | if (root) { |
| 338 | opprop = (unsigned int *) get_property |
| 339 | (root, "platform-open-pic", &oplen); |
| 340 | na = prom_n_addr_cells(root); |
| 341 | } |
| 342 | if (opprop && oplen >= na * sizeof(unsigned int)) { |
| 343 | opaddr = opprop[na-1]; /* assume 32-bit */ |
| 344 | oplen /= na * sizeof(unsigned int); |
| 345 | } else { |
David Woodhouse | 575e321 | 2006-01-14 00:13:49 +0000 | [diff] [blame] | 346 | struct resource r; |
| 347 | if (of_address_to_resource(np, 0, &r)) |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 348 | return; |
David Woodhouse | 575e321 | 2006-01-14 00:13:49 +0000 | [diff] [blame] | 349 | opaddr = r.start; |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 350 | oplen = 0; |
| 351 | } |
| 352 | |
| 353 | printk(KERN_INFO "OpenPIC at %lx\n", opaddr); |
| 354 | |
| 355 | irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */ |
Paul Mackerras | a23414b | 2005-11-10 12:00:55 +1100 | [diff] [blame] | 356 | prom_get_irq_senses(init_senses, NUM_ISA_INTERRUPTS, NR_IRQS - 4); |
| 357 | /* i8259 cascade is always positive level */ |
| 358 | init_senses[0] = IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE; |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 359 | |
| 360 | iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len); |
| 361 | if (iranges == NULL) |
| 362 | len = 0; /* non-distributed mpic */ |
| 363 | else |
| 364 | len /= 2 * sizeof(unsigned int); |
| 365 | |
| 366 | /* |
| 367 | * The first pair of cells in interrupt-ranges refers to the |
| 368 | * IDU; subsequent pairs refer to the ISUs. |
| 369 | */ |
| 370 | if (oplen < len) { |
| 371 | printk(KERN_ERR "Insufficient addresses for distributed" |
David Woodhouse | 575e321 | 2006-01-14 00:13:49 +0000 | [diff] [blame] | 372 | " OpenPIC (%d < %d)\n", oplen, len); |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 373 | len = oplen; |
| 374 | } |
| 375 | |
| 376 | isu_size = 0; |
| 377 | idu_size = 0; |
| 378 | if (len > 0 && iranges[1] != 0) { |
| 379 | printk(KERN_INFO "OpenPIC irqs %d..%d in IDU\n", |
| 380 | iranges[0], iranges[0] + iranges[1] - 1); |
| 381 | idu_size = iranges[1]; |
| 382 | } |
| 383 | if (len > 1) |
| 384 | isu_size = iranges[3]; |
| 385 | |
| 386 | chrp_mpic = mpic_alloc(opaddr, MPIC_PRIMARY, |
| 387 | isu_size, NUM_ISA_INTERRUPTS, irq_count, |
| 388 | NR_IRQS - 4, init_senses, irq_count, |
| 389 | " MPIC "); |
| 390 | if (chrp_mpic == NULL) { |
| 391 | printk(KERN_ERR "Failed to allocate MPIC structure\n"); |
| 392 | return; |
| 393 | } |
| 394 | |
| 395 | j = na - 1; |
| 396 | for (i = 1; i < len; ++i) { |
| 397 | iranges += 2; |
| 398 | j += na; |
| 399 | printk(KERN_INFO "OpenPIC irqs %d..%d in ISU at %x\n", |
| 400 | iranges[0], iranges[0] + iranges[1] - 1, |
| 401 | opprop[j]); |
| 402 | mpic_assign_isu(chrp_mpic, i - 1, opprop[j]); |
| 403 | } |
| 404 | |
| 405 | mpic_init(chrp_mpic); |
| 406 | mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL); |
| 407 | } |
| 408 | |
| 409 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) |
| 410 | static struct irqaction xmon_irqaction = { |
| 411 | .handler = xmon_irq, |
| 412 | .mask = CPU_MASK_NONE, |
| 413 | .name = "XMON break", |
| 414 | }; |
| 415 | #endif |
| 416 | |
| 417 | void __init chrp_init_IRQ(void) |
| 418 | { |
| 419 | struct device_node *np; |
| 420 | unsigned long chrp_int_ack = 0; |
| 421 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) |
| 422 | struct device_node *kbd; |
| 423 | #endif |
| 424 | |
| 425 | for (np = find_devices("pci"); np != NULL; np = np->next) { |
| 426 | unsigned int *addrp = (unsigned int *) |
| 427 | get_property(np, "8259-interrupt-acknowledge", NULL); |
| 428 | |
| 429 | if (addrp == NULL) |
| 430 | continue; |
| 431 | chrp_int_ack = addrp[prom_n_addr_cells(np)-1]; |
| 432 | break; |
| 433 | } |
| 434 | if (np == NULL) |
| 435 | printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n"); |
| 436 | |
| 437 | chrp_find_openpic(); |
| 438 | |
| 439 | i8259_init(chrp_int_ack, 0); |
| 440 | |
| 441 | if (_chrp_type == _CHRP_Pegasos) |
| 442 | ppc_md.get_irq = i8259_irq; |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 443 | |
| 444 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) |
| 445 | /* see if there is a keyboard in the device tree |
| 446 | with a parent of type "adb" */ |
| 447 | for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next) |
| 448 | if (kbd->parent && kbd->parent->type |
| 449 | && strcmp(kbd->parent->type, "adb") == 0) |
| 450 | break; |
| 451 | if (kbd) |
| 452 | setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction); |
| 453 | #endif |
| 454 | } |
| 455 | |
| 456 | void __init |
| 457 | chrp_init2(void) |
| 458 | { |
Paul Mackerras | 9618eda | 2006-03-27 21:48:57 +1100 | [diff] [blame] | 459 | struct device_node *device; |
| 460 | unsigned int *p = NULL; |
| 461 | |
Olaf Hering | 35e95e6 | 2005-10-28 17:46:19 -0700 | [diff] [blame] | 462 | #ifdef CONFIG_NVRAM |
| 463 | chrp_nvram_init(); |
| 464 | #endif |
| 465 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 466 | request_region(0x20,0x20,"pic1"); |
| 467 | request_region(0xa0,0x20,"pic2"); |
| 468 | request_region(0x00,0x20,"dma1"); |
| 469 | request_region(0x40,0x20,"timer"); |
| 470 | request_region(0x80,0x10,"dma page reg"); |
| 471 | request_region(0xc0,0x20,"dma2"); |
| 472 | |
Paul Mackerras | 9618eda | 2006-03-27 21:48:57 +1100 | [diff] [blame] | 473 | /* Get the event scan rate for the rtas so we know how |
| 474 | * often it expects a heartbeat. -- Cort |
| 475 | */ |
| 476 | device = find_devices("rtas"); |
| 477 | if (device) |
| 478 | p = (unsigned int *) get_property |
| 479 | (device, "rtas-event-scan-rate", NULL); |
| 480 | if (p && *p) { |
| 481 | /* |
| 482 | * Arrange to call chrp_event_scan at least *p times |
| 483 | * per minute. We use 59 rather than 60 here so that |
| 484 | * the rate will be slightly higher than the minimum. |
| 485 | * This all assumes we don't do hotplug CPU on any |
| 486 | * machine that needs the event scans done. |
| 487 | */ |
| 488 | unsigned long interval, offset; |
| 489 | int cpu, ncpus; |
| 490 | struct timer_list *timer; |
| 491 | |
| 492 | interval = HZ * 59 / *p; |
| 493 | offset = HZ; |
| 494 | ncpus = num_online_cpus(); |
| 495 | event_scan_interval = ncpus * interval; |
| 496 | for (cpu = 0; cpu < ncpus; ++cpu) { |
| 497 | timer = &per_cpu(heartbeat_timer, cpu); |
| 498 | setup_timer(timer, chrp_event_scan, 0); |
| 499 | timer->expires = jiffies + offset; |
| 500 | add_timer_on(timer, cpu); |
| 501 | offset += interval; |
| 502 | } |
| 503 | printk("RTAS Event Scan Rate: %u (%lu jiffies)\n", |
| 504 | *p, interval); |
| 505 | } |
| 506 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 507 | if (ppc_md.progress) |
| 508 | ppc_md.progress(" Have fun! ", 0x7777); |
| 509 | } |
| 510 | |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 511 | static int __init chrp_probe(void) |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 512 | { |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 513 | char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(), |
| 514 | "device_type", NULL); |
| 515 | if (dtype == NULL) |
| 516 | return 0; |
| 517 | if (strcmp(dtype, "chrp")) |
| 518 | return 0; |
| 519 | |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 520 | ISA_DMA_THRESHOLD = ~0L; |
| 521 | DMA_MODE_READ = 0x44; |
| 522 | DMA_MODE_WRITE = 0x48; |
| 523 | isa_io_base = CHRP_ISA_IO_BASE; /* default value */ |
| 524 | ppc_do_canonicalize_irqs = 1; |
| 525 | |
| 526 | /* Assume we have an 8259... */ |
| 527 | __irq_offset_value = NUM_ISA_INTERRUPTS; |
| 528 | |
Paul Mackerras | b86756a | 2006-04-03 16:37:23 +1000 | [diff] [blame] | 529 | return 1; |
Paul Mackerras | bbd0abd | 2005-10-26 21:45:56 +1000 | [diff] [blame] | 530 | } |
Paul Mackerras | b86756a | 2006-04-03 16:37:23 +1000 | [diff] [blame] | 531 | |
| 532 | define_machine(chrp) { |
| 533 | .name = "CHRP", |
| 534 | .probe = chrp_probe, |
| 535 | .setup_arch = chrp_setup_arch, |
| 536 | .init = chrp_init2, |
| 537 | .show_cpuinfo = chrp_show_cpuinfo, |
| 538 | .init_IRQ = chrp_init_IRQ, |
| 539 | .get_irq = mpic_get_irq, |
| 540 | .pcibios_fixup = chrp_pcibios_fixup, |
| 541 | .restart = rtas_restart, |
| 542 | .power_off = rtas_power_off, |
| 543 | .halt = rtas_halt, |
| 544 | .time_init = chrp_time_init, |
| 545 | .set_rtc_time = chrp_set_rtc_time, |
| 546 | .get_rtc_time = chrp_get_rtc_time, |
| 547 | .calibrate_decr = generic_calibrate_decr, |
| 548 | .phys_mem_access_prot = pci_phys_mem_access_prot, |
| 549 | }; |