Bryan O'Sullivan | d41d3ae | 2006-03-29 15:23:25 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
| 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
| 32 | |
| 33 | #ifndef _IPATH_COMMON_H |
| 34 | #define _IPATH_COMMON_H |
| 35 | |
| 36 | /* |
| 37 | * This file contains defines, structures, etc. that are used |
| 38 | * to communicate between kernel and user code. |
| 39 | */ |
| 40 | |
| 41 | /* This is the IEEE-assigned OUI for PathScale, Inc. */ |
| 42 | #define IPATH_SRC_OUI_1 0x00 |
| 43 | #define IPATH_SRC_OUI_2 0x11 |
| 44 | #define IPATH_SRC_OUI_3 0x75 |
| 45 | |
| 46 | /* version of protocol header (known to chip also). In the long run, |
| 47 | * we should be able to generate and accept a range of version numbers; |
| 48 | * for now we only accept one, and it's compiled in. |
| 49 | */ |
| 50 | #define IPS_PROTO_VERSION 2 |
| 51 | |
| 52 | /* |
| 53 | * These are compile time constants that you may want to enable or disable |
| 54 | * if you are trying to debug problems with code or performance. |
| 55 | * IPATH_VERBOSE_TRACING define as 1 if you want additional tracing in |
| 56 | * fastpath code |
| 57 | * IPATH_TRACE_REGWRITES define as 1 if you want register writes to be |
| 58 | * traced in faspath code |
| 59 | * _IPATH_TRACING define as 0 if you want to remove all tracing in a |
| 60 | * compilation unit |
| 61 | * _IPATH_DEBUGGING define as 0 if you want to remove debug prints |
| 62 | */ |
| 63 | |
| 64 | /* |
| 65 | * The value in the BTH QP field that InfiniPath uses to differentiate |
| 66 | * an infinipath protocol IB packet vs standard IB transport |
| 67 | */ |
| 68 | #define IPATH_KD_QP 0x656b79 |
| 69 | |
| 70 | /* |
| 71 | * valid states passed to ipath_set_linkstate() user call |
| 72 | */ |
| 73 | #define IPATH_IB_LINKDOWN 0 |
| 74 | #define IPATH_IB_LINKARM 1 |
| 75 | #define IPATH_IB_LINKACTIVE 2 |
| 76 | #define IPATH_IB_LINKINIT 3 |
| 77 | #define IPATH_IB_LINKDOWN_SLEEP 4 |
| 78 | #define IPATH_IB_LINKDOWN_DISABLE 5 |
| 79 | |
| 80 | /* |
| 81 | * stats maintained by the driver. For now, at least, this is global |
| 82 | * to all minor devices. |
| 83 | */ |
| 84 | struct infinipath_stats { |
| 85 | /* number of interrupts taken */ |
| 86 | __u64 sps_ints; |
| 87 | /* number of interrupts for errors */ |
| 88 | __u64 sps_errints; |
| 89 | /* number of errors from chip (not incl. packet errors or CRC) */ |
| 90 | __u64 sps_errs; |
| 91 | /* number of packet errors from chip other than CRC */ |
| 92 | __u64 sps_pkterrs; |
| 93 | /* number of packets with CRC errors (ICRC and VCRC) */ |
| 94 | __u64 sps_crcerrs; |
| 95 | /* number of hardware errors reported (parity, etc.) */ |
| 96 | __u64 sps_hwerrs; |
| 97 | /* number of times IB link changed state unexpectedly */ |
| 98 | __u64 sps_iblink; |
| 99 | /* no longer used; left for compatibility */ |
| 100 | __u64 sps_unused3; |
| 101 | /* number of kernel (port0) packets received */ |
| 102 | __u64 sps_port0pkts; |
| 103 | /* number of "ethernet" packets sent by driver */ |
| 104 | __u64 sps_ether_spkts; |
| 105 | /* number of "ethernet" packets received by driver */ |
| 106 | __u64 sps_ether_rpkts; |
| 107 | /* number of SMA packets sent by driver */ |
| 108 | __u64 sps_sma_spkts; |
| 109 | /* number of SMA packets received by driver */ |
| 110 | __u64 sps_sma_rpkts; |
| 111 | /* number of times all ports rcvhdrq was full and packet dropped */ |
| 112 | __u64 sps_hdrqfull; |
| 113 | /* number of times all ports egrtid was full and packet dropped */ |
| 114 | __u64 sps_etidfull; |
| 115 | /* |
| 116 | * number of times we tried to send from driver, but no pio buffers |
| 117 | * avail |
| 118 | */ |
| 119 | __u64 sps_nopiobufs; |
| 120 | /* number of ports currently open */ |
| 121 | __u64 sps_ports; |
| 122 | /* list of pkeys (other than default) accepted (0 means not set) */ |
| 123 | __u16 sps_pkeys[4]; |
| 124 | /* lids for up to 4 infinipaths, indexed by infinipath # */ |
| 125 | __u16 sps_lid[4]; |
| 126 | /* number of user ports per chip (not IB ports) */ |
| 127 | __u32 sps_nports; |
| 128 | /* not our interrupt, or already handled */ |
| 129 | __u32 sps_nullintr; |
| 130 | /* max number of packets handled per receive call */ |
| 131 | __u32 sps_maxpkts_call; |
| 132 | /* avg number of packets handled per receive call */ |
| 133 | __u32 sps_avgpkts_call; |
| 134 | /* total number of pages locked */ |
| 135 | __u64 sps_pagelocks; |
| 136 | /* total number of pages unlocked */ |
| 137 | __u64 sps_pageunlocks; |
| 138 | /* |
| 139 | * Number of packets dropped in kernel other than errors (ether |
| 140 | * packets if ipath not configured, sma/mad, etc.) |
| 141 | */ |
| 142 | __u64 sps_krdrops; |
| 143 | /* mlids for up to 4 infinipaths, indexed by infinipath # */ |
| 144 | __u16 sps_mlid[4]; |
| 145 | /* pad for future growth */ |
| 146 | __u64 __sps_pad[45]; |
| 147 | }; |
| 148 | |
| 149 | /* |
| 150 | * These are the status bits readable (in ascii form, 64bit value) |
| 151 | * from the "status" sysfs file. |
| 152 | */ |
| 153 | #define IPATH_STATUS_INITTED 0x1 /* basic initialization done */ |
| 154 | #define IPATH_STATUS_DISABLED 0x2 /* hardware disabled */ |
| 155 | /* Device has been disabled via admin request */ |
| 156 | #define IPATH_STATUS_ADMIN_DISABLED 0x4 |
| 157 | #define IPATH_STATUS_OIB_SMA 0x8 /* ipath_mad kernel SMA running */ |
| 158 | #define IPATH_STATUS_SMA 0x10 /* user SMA running */ |
| 159 | /* Chip has been found and initted */ |
| 160 | #define IPATH_STATUS_CHIP_PRESENT 0x20 |
| 161 | /* IB link is at ACTIVE, usable for data traffic */ |
| 162 | #define IPATH_STATUS_IB_READY 0x40 |
| 163 | /* link is configured, LID, MTU, etc. have been set */ |
| 164 | #define IPATH_STATUS_IB_CONF 0x80 |
| 165 | /* no link established, probably no cable */ |
| 166 | #define IPATH_STATUS_IB_NOCABLE 0x100 |
| 167 | /* A Fatal hardware error has occurred. */ |
| 168 | #define IPATH_STATUS_HWERROR 0x200 |
| 169 | |
| 170 | /* |
| 171 | * The list of usermode accessible registers. Also see Reg_* later in file. |
| 172 | */ |
| 173 | typedef enum _ipath_ureg { |
| 174 | /* (RO) DMA RcvHdr to be used next. */ |
| 175 | ur_rcvhdrtail = 0, |
| 176 | /* (RW) RcvHdr entry to be processed next by host. */ |
| 177 | ur_rcvhdrhead = 1, |
| 178 | /* (RO) Index of next Eager index to use. */ |
| 179 | ur_rcvegrindextail = 2, |
| 180 | /* (RW) Eager TID to be processed next */ |
| 181 | ur_rcvegrindexhead = 3, |
| 182 | /* For internal use only; max register number. */ |
| 183 | _IPATH_UregMax |
| 184 | } ipath_ureg; |
| 185 | |
| 186 | /* bit values for spi_runtime_flags */ |
| 187 | #define IPATH_RUNTIME_HT 0x1 |
| 188 | #define IPATH_RUNTIME_PCIE 0x2 |
| 189 | #define IPATH_RUNTIME_FORCE_WC_ORDER 0x4 |
| 190 | #define IPATH_RUNTIME_RCVHDR_COPY 0x8 |
| 191 | |
| 192 | /* |
| 193 | * This structure is returned by ipath_userinit() immediately after |
| 194 | * open to get implementation-specific info, and info specific to this |
| 195 | * instance. |
| 196 | * |
| 197 | * This struct must have explict pad fields where type sizes |
| 198 | * may result in different alignments between 32 and 64 bit |
| 199 | * programs, since the 64 bit * bit kernel requires the user code |
| 200 | * to have matching offsets |
| 201 | */ |
| 202 | struct ipath_base_info { |
| 203 | /* version of hardware, for feature checking. */ |
| 204 | __u32 spi_hw_version; |
| 205 | /* version of software, for feature checking. */ |
| 206 | __u32 spi_sw_version; |
| 207 | /* InfiniPath port assigned, goes into sent packets */ |
| 208 | __u32 spi_port; |
| 209 | /* |
| 210 | * IB MTU, packets IB data must be less than this. |
| 211 | * The MTU is in bytes, and will be a multiple of 4 bytes. |
| 212 | */ |
| 213 | __u32 spi_mtu; |
| 214 | /* |
| 215 | * Size of a PIO buffer. Any given packet's total size must be less |
| 216 | * than this (in words). Included is the starting control word, so |
| 217 | * if 513 is returned, then total pkt size is 512 words or less. |
| 218 | */ |
| 219 | __u32 spi_piosize; |
| 220 | /* size of the TID cache in infinipath, in entries */ |
| 221 | __u32 spi_tidcnt; |
| 222 | /* size of the TID Eager list in infinipath, in entries */ |
| 223 | __u32 spi_tidegrcnt; |
| 224 | /* size of a single receive header queue entry. */ |
| 225 | __u32 spi_rcvhdrent_size; |
| 226 | /* |
| 227 | * Count of receive header queue entries allocated. |
| 228 | * This may be less than the spu_rcvhdrcnt passed in!. |
| 229 | */ |
| 230 | __u32 spi_rcvhdr_cnt; |
| 231 | |
| 232 | /* per-chip and other runtime features bitmap (IPATH_RUNTIME_*) */ |
| 233 | __u32 spi_runtime_flags; |
| 234 | |
| 235 | /* address where receive buffer queue is mapped into */ |
| 236 | __u64 spi_rcvhdr_base; |
| 237 | |
| 238 | /* user program. */ |
| 239 | |
| 240 | /* base address of eager TID receive buffers. */ |
| 241 | __u64 spi_rcv_egrbufs; |
| 242 | |
| 243 | /* Allocated by initialization code, not by protocol. */ |
| 244 | |
| 245 | /* |
| 246 | * Size of each TID buffer in host memory, starting at |
| 247 | * spi_rcv_egrbufs. The buffers are virtually contiguous. |
| 248 | */ |
| 249 | __u32 spi_rcv_egrbufsize; |
| 250 | /* |
| 251 | * The special QP (queue pair) value that identifies an infinipath |
| 252 | * protocol packet from standard IB packets. More, probably much |
| 253 | * more, to be added. |
| 254 | */ |
| 255 | __u32 spi_qpair; |
| 256 | |
| 257 | /* |
| 258 | * User register base for init code, not to be used directly by |
| 259 | * protocol or applications. |
| 260 | */ |
| 261 | __u64 __spi_uregbase; |
| 262 | /* |
| 263 | * Maximum buffer size in bytes that can be used in a single TID |
| 264 | * entry (assuming the buffer is aligned to this boundary). This is |
| 265 | * the minimum of what the hardware and software support Guaranteed |
| 266 | * to be a power of 2. |
| 267 | */ |
| 268 | __u32 spi_tid_maxsize; |
| 269 | /* |
| 270 | * alignment of each pio send buffer (byte count |
| 271 | * to add to spi_piobufbase to get to second buffer) |
| 272 | */ |
| 273 | __u32 spi_pioalign; |
| 274 | /* |
| 275 | * The index of the first pio buffer available to this process; |
| 276 | * needed to do lookup in spi_pioavailaddr; not added to |
| 277 | * spi_piobufbase. |
| 278 | */ |
| 279 | __u32 spi_pioindex; |
| 280 | /* number of buffers mapped for this process */ |
| 281 | __u32 spi_piocnt; |
| 282 | |
| 283 | /* |
| 284 | * Base address of writeonly pio buffers for this process. |
| 285 | * Each buffer has spi_piosize words, and is aligned on spi_pioalign |
| 286 | * boundaries. spi_piocnt buffers are mapped from this address |
| 287 | */ |
| 288 | __u64 spi_piobufbase; |
| 289 | |
| 290 | /* |
| 291 | * Base address of readonly memory copy of the pioavail registers. |
| 292 | * There are 2 bits for each buffer. |
| 293 | */ |
| 294 | __u64 spi_pioavailaddr; |
| 295 | |
| 296 | /* |
| 297 | * Address where driver updates a copy of the interface and driver |
| 298 | * status (IPATH_STATUS_*) as a 64 bit value. It's followed by a |
| 299 | * string indicating hardware error, if there was one. |
| 300 | */ |
| 301 | __u64 spi_status; |
| 302 | |
| 303 | /* number of chip ports available to user processes */ |
| 304 | __u32 spi_nports; |
| 305 | /* unit number of chip we are using */ |
| 306 | __u32 spi_unit; |
| 307 | /* num bufs in each contiguous set */ |
| 308 | __u32 spi_rcv_egrperchunk; |
| 309 | /* size in bytes of each contiguous set */ |
| 310 | __u32 spi_rcv_egrchunksize; |
| 311 | /* total size of mmap to cover full rcvegrbuffers */ |
| 312 | __u32 spi_rcv_egrbuftotlen; |
| 313 | } __attribute__ ((aligned(8))); |
| 314 | |
| 315 | |
| 316 | /* |
| 317 | * This version number is given to the driver by the user code during |
| 318 | * initialization in the spu_userversion field of ipath_user_info, so |
| 319 | * the driver can check for compatibility with user code. |
| 320 | * |
| 321 | * The major version changes when data structures |
| 322 | * change in an incompatible way. The driver must be the same or higher |
| 323 | * for initialization to succeed. In some cases, a higher version |
| 324 | * driver will not interoperate with older software, and initialization |
| 325 | * will return an error. |
| 326 | */ |
| 327 | #define IPATH_USER_SWMAJOR 1 |
| 328 | |
| 329 | /* |
| 330 | * Minor version differences are always compatible |
| 331 | * a within a major version, however if if user software is larger |
| 332 | * than driver software, some new features and/or structure fields |
| 333 | * may not be implemented; the user code must deal with this if it |
| 334 | * cares, or it must abort after initialization reports the difference |
| 335 | */ |
| 336 | #define IPATH_USER_SWMINOR 2 |
| 337 | |
| 338 | #define IPATH_USER_SWVERSION ((IPATH_USER_SWMAJOR<<16) | IPATH_USER_SWMINOR) |
| 339 | |
| 340 | #define IPATH_KERN_TYPE 0 |
| 341 | |
| 342 | /* |
| 343 | * Similarly, this is the kernel version going back to the user. It's |
| 344 | * slightly different, in that we want to tell if the driver was built as |
| 345 | * part of a PathScale release, or from the driver from OpenIB, kernel.org, |
| 346 | * or a standard distribution, for support reasons. The high bit is 0 for |
| 347 | * non-PathScale, and 1 for PathScale-built/supplied. |
| 348 | * |
| 349 | * It's returned by the driver to the user code during initialization in the |
| 350 | * spi_sw_version field of ipath_base_info, so the user code can in turn |
| 351 | * check for compatibility with the kernel. |
| 352 | */ |
| 353 | #define IPATH_KERN_SWVERSION ((IPATH_KERN_TYPE<<31) | IPATH_USER_SWVERSION) |
| 354 | |
| 355 | /* |
| 356 | * This structure is passed to ipath_userinit() to tell the driver where |
| 357 | * user code buffers are, sizes, etc. The offsets and sizes of the |
| 358 | * fields must remain unchanged, for binary compatibility. It can |
| 359 | * be extended, if userversion is changed so user code can tell, if needed |
| 360 | */ |
| 361 | struct ipath_user_info { |
| 362 | /* |
| 363 | * version of user software, to detect compatibility issues. |
| 364 | * Should be set to IPATH_USER_SWVERSION. |
| 365 | */ |
| 366 | __u32 spu_userversion; |
| 367 | |
| 368 | /* desired number of receive header queue entries */ |
| 369 | __u32 spu_rcvhdrcnt; |
| 370 | |
| 371 | /* size of struct base_info to write to */ |
| 372 | __u32 spu_base_info_size; |
| 373 | |
| 374 | /* |
| 375 | * number of words in KD protocol header |
| 376 | * This tells InfiniPath how many words to copy to rcvhdrq. If 0, |
| 377 | * kernel uses a default. Once set, attempts to set any other value |
| 378 | * are an error (EAGAIN) until driver is reloaded. |
| 379 | */ |
| 380 | __u32 spu_rcvhdrsize; |
| 381 | |
| 382 | /* |
| 383 | * cache line aligned (64 byte) user address to |
| 384 | * which the rcvhdrtail register will be written by infinipath |
| 385 | * whenever it changes, so that no chip registers are read in |
| 386 | * the performance path. |
| 387 | */ |
| 388 | __u64 spu_rcvhdraddr; |
| 389 | |
| 390 | /* |
| 391 | * address of struct base_info to write to |
| 392 | */ |
| 393 | __u64 spu_base_info; |
| 394 | |
| 395 | } __attribute__ ((aligned(8))); |
| 396 | |
| 397 | /* User commands. */ |
| 398 | |
| 399 | #define IPATH_CMD_MIN 16 |
| 400 | |
| 401 | #define IPATH_CMD_USER_INIT 16 /* set up userspace */ |
| 402 | #define IPATH_CMD_PORT_INFO 17 /* find out what resources we got */ |
| 403 | #define IPATH_CMD_RECV_CTRL 18 /* control receipt of packets */ |
| 404 | #define IPATH_CMD_TID_UPDATE 19 /* update expected TID entries */ |
| 405 | #define IPATH_CMD_TID_FREE 20 /* free expected TID entries */ |
| 406 | #define IPATH_CMD_SET_PART_KEY 21 /* add partition key */ |
| 407 | |
| 408 | #define IPATH_CMD_MAX 21 |
| 409 | |
| 410 | struct ipath_port_info { |
| 411 | __u32 num_active; /* number of active units */ |
| 412 | __u32 unit; /* unit (chip) assigned to caller */ |
| 413 | __u32 port; /* port on unit assigned to caller */ |
| 414 | }; |
| 415 | |
| 416 | struct ipath_tid_info { |
| 417 | __u32 tidcnt; |
| 418 | /* make structure same size in 32 and 64 bit */ |
| 419 | __u32 tid__unused; |
| 420 | /* virtual address of first page in transfer */ |
| 421 | __u64 tidvaddr; |
| 422 | /* pointer (same size 32/64 bit) to __u16 tid array */ |
| 423 | __u64 tidlist; |
| 424 | |
| 425 | /* |
| 426 | * pointer (same size 32/64 bit) to bitmap of TIDs used |
| 427 | * for this call; checked for being large enough at open |
| 428 | */ |
| 429 | __u64 tidmap; |
| 430 | }; |
| 431 | |
| 432 | struct ipath_cmd { |
| 433 | __u32 type; /* command type */ |
| 434 | union { |
| 435 | struct ipath_tid_info tid_info; |
| 436 | struct ipath_user_info user_info; |
| 437 | /* address in userspace of struct ipath_port_info to |
| 438 | write result to */ |
| 439 | __u64 port_info; |
| 440 | /* enable/disable receipt of packets */ |
| 441 | __u32 recv_ctrl; |
| 442 | /* partition key to set */ |
| 443 | __u16 part_key; |
| 444 | } cmd; |
| 445 | }; |
| 446 | |
| 447 | struct ipath_iovec { |
| 448 | /* Pointer to data, but same size 32 and 64 bit */ |
| 449 | __u64 iov_base; |
| 450 | |
| 451 | /* |
| 452 | * Length of data; don't need 64 bits, but want |
| 453 | * ipath_sendpkt to remain same size as before 32 bit changes, so... |
| 454 | */ |
| 455 | __u64 iov_len; |
| 456 | }; |
| 457 | |
| 458 | /* |
| 459 | * Describes a single packet for send. Each packet can have one or more |
| 460 | * buffers, but the total length (exclusive of IB headers) must be less |
| 461 | * than the MTU, and if using the PIO method, entire packet length, |
| 462 | * including IB headers, must be less than the ipath_piosize value (words). |
| 463 | * Use of this necessitates including sys/uio.h |
| 464 | */ |
| 465 | struct __ipath_sendpkt { |
| 466 | __u32 sps_flags; /* flags for packet (TBD) */ |
| 467 | __u32 sps_cnt; /* number of entries to use in sps_iov */ |
| 468 | /* array of iov's describing packet. TEMPORARY */ |
| 469 | struct ipath_iovec sps_iov[4]; |
| 470 | }; |
| 471 | |
| 472 | /* Passed into SMA special file's ->read and ->write methods. */ |
| 473 | struct ipath_sma_pkt |
| 474 | { |
| 475 | __u32 unit; /* unit on which to send packet */ |
| 476 | __u64 data; /* address of payload in userspace */ |
| 477 | __u32 len; /* length of payload */ |
| 478 | }; |
| 479 | |
| 480 | /* |
| 481 | * Data layout in I2C flash (for GUID, etc.) |
| 482 | * All fields are little-endian binary unless otherwise stated |
| 483 | */ |
| 484 | #define IPATH_FLASH_VERSION 1 |
| 485 | struct ipath_flash { |
| 486 | /* flash layout version (IPATH_FLASH_VERSION) */ |
| 487 | __u8 if_fversion; |
| 488 | /* checksum protecting if_length bytes */ |
| 489 | __u8 if_csum; |
| 490 | /* |
| 491 | * valid length (in use, protected by if_csum), including |
| 492 | * if_fversion and if_sum themselves) |
| 493 | */ |
| 494 | __u8 if_length; |
| 495 | /* the GUID, in network order */ |
| 496 | __u8 if_guid[8]; |
| 497 | /* number of GUIDs to use, starting from if_guid */ |
| 498 | __u8 if_numguid; |
| 499 | /* the board serial number, in ASCII */ |
| 500 | char if_serial[12]; |
| 501 | /* board mfg date (YYYYMMDD ASCII) */ |
| 502 | char if_mfgdate[8]; |
| 503 | /* last board rework/test date (YYYYMMDD ASCII) */ |
| 504 | char if_testdate[8]; |
| 505 | /* logging of error counts, TBD */ |
| 506 | __u8 if_errcntp[4]; |
| 507 | /* powered on hours, updated at driver unload */ |
| 508 | __u8 if_powerhour[2]; |
| 509 | /* ASCII free-form comment field */ |
| 510 | char if_comment[32]; |
| 511 | /* 78 bytes used, min flash size is 128 bytes */ |
| 512 | __u8 if_future[50]; |
| 513 | }; |
| 514 | |
| 515 | /* |
| 516 | * These are the counters implemented in the chip, and are listed in order. |
| 517 | * The InterCaps naming is taken straight from the chip spec. |
| 518 | */ |
| 519 | struct infinipath_counters { |
| 520 | __u64 LBIntCnt; |
| 521 | __u64 LBFlowStallCnt; |
| 522 | __u64 Reserved1; |
| 523 | __u64 TxUnsupVLErrCnt; |
| 524 | __u64 TxDataPktCnt; |
| 525 | __u64 TxFlowPktCnt; |
| 526 | __u64 TxDwordCnt; |
| 527 | __u64 TxLenErrCnt; |
| 528 | __u64 TxMaxMinLenErrCnt; |
| 529 | __u64 TxUnderrunCnt; |
| 530 | __u64 TxFlowStallCnt; |
| 531 | __u64 TxDroppedPktCnt; |
| 532 | __u64 RxDroppedPktCnt; |
| 533 | __u64 RxDataPktCnt; |
| 534 | __u64 RxFlowPktCnt; |
| 535 | __u64 RxDwordCnt; |
| 536 | __u64 RxLenErrCnt; |
| 537 | __u64 RxMaxMinLenErrCnt; |
| 538 | __u64 RxICRCErrCnt; |
| 539 | __u64 RxVCRCErrCnt; |
| 540 | __u64 RxFlowCtrlErrCnt; |
| 541 | __u64 RxBadFormatCnt; |
| 542 | __u64 RxLinkProblemCnt; |
| 543 | __u64 RxEBPCnt; |
| 544 | __u64 RxLPCRCErrCnt; |
| 545 | __u64 RxBufOvflCnt; |
| 546 | __u64 RxTIDFullErrCnt; |
| 547 | __u64 RxTIDValidErrCnt; |
| 548 | __u64 RxPKeyMismatchCnt; |
| 549 | __u64 RxP0HdrEgrOvflCnt; |
| 550 | __u64 RxP1HdrEgrOvflCnt; |
| 551 | __u64 RxP2HdrEgrOvflCnt; |
| 552 | __u64 RxP3HdrEgrOvflCnt; |
| 553 | __u64 RxP4HdrEgrOvflCnt; |
| 554 | __u64 RxP5HdrEgrOvflCnt; |
| 555 | __u64 RxP6HdrEgrOvflCnt; |
| 556 | __u64 RxP7HdrEgrOvflCnt; |
| 557 | __u64 RxP8HdrEgrOvflCnt; |
| 558 | __u64 Reserved6; |
| 559 | __u64 Reserved7; |
| 560 | __u64 IBStatusChangeCnt; |
| 561 | __u64 IBLinkErrRecoveryCnt; |
| 562 | __u64 IBLinkDownedCnt; |
| 563 | __u64 IBSymbolErrCnt; |
| 564 | }; |
| 565 | |
| 566 | /* |
| 567 | * The next set of defines are for packet headers, and chip register |
| 568 | * and memory bits that are visible to and/or used by user-mode software |
| 569 | * The other bits that are used only by the driver or diags are in |
| 570 | * ipath_registers.h |
| 571 | */ |
| 572 | |
| 573 | /* RcvHdrFlags bits */ |
| 574 | #define INFINIPATH_RHF_LENGTH_MASK 0x7FF |
| 575 | #define INFINIPATH_RHF_LENGTH_SHIFT 0 |
| 576 | #define INFINIPATH_RHF_RCVTYPE_MASK 0x7 |
| 577 | #define INFINIPATH_RHF_RCVTYPE_SHIFT 11 |
| 578 | #define INFINIPATH_RHF_EGRINDEX_MASK 0x7FF |
| 579 | #define INFINIPATH_RHF_EGRINDEX_SHIFT 16 |
| 580 | #define INFINIPATH_RHF_H_ICRCERR 0x80000000 |
| 581 | #define INFINIPATH_RHF_H_VCRCERR 0x40000000 |
| 582 | #define INFINIPATH_RHF_H_PARITYERR 0x20000000 |
| 583 | #define INFINIPATH_RHF_H_LENERR 0x10000000 |
| 584 | #define INFINIPATH_RHF_H_MTUERR 0x08000000 |
| 585 | #define INFINIPATH_RHF_H_IHDRERR 0x04000000 |
| 586 | #define INFINIPATH_RHF_H_TIDERR 0x02000000 |
| 587 | #define INFINIPATH_RHF_H_MKERR 0x01000000 |
| 588 | #define INFINIPATH_RHF_H_IBERR 0x00800000 |
| 589 | #define INFINIPATH_RHF_L_SWA 0x00008000 |
| 590 | #define INFINIPATH_RHF_L_SWB 0x00004000 |
| 591 | |
| 592 | /* infinipath header fields */ |
| 593 | #define INFINIPATH_I_VERS_MASK 0xF |
| 594 | #define INFINIPATH_I_VERS_SHIFT 28 |
| 595 | #define INFINIPATH_I_PORT_MASK 0xF |
| 596 | #define INFINIPATH_I_PORT_SHIFT 24 |
| 597 | #define INFINIPATH_I_TID_MASK 0x7FF |
| 598 | #define INFINIPATH_I_TID_SHIFT 13 |
| 599 | #define INFINIPATH_I_OFFSET_MASK 0x1FFF |
| 600 | #define INFINIPATH_I_OFFSET_SHIFT 0 |
| 601 | |
| 602 | /* K_PktFlags bits */ |
| 603 | #define INFINIPATH_KPF_INTR 0x1 |
| 604 | |
| 605 | /* SendPIO per-buffer control */ |
| 606 | #define INFINIPATH_SP_LENGTHP1_MASK 0x3FF |
| 607 | #define INFINIPATH_SP_LENGTHP1_SHIFT 0 |
| 608 | #define INFINIPATH_SP_INTR 0x80000000 |
| 609 | #define INFINIPATH_SP_TEST 0x40000000 |
| 610 | #define INFINIPATH_SP_TESTEBP 0x20000000 |
| 611 | |
| 612 | /* SendPIOAvail bits */ |
| 613 | #define INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT 1 |
| 614 | #define INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT 0 |
| 615 | |
| 616 | #endif /* _IPATH_COMMON_H */ |