Bryan O'Sullivan | 108ecf0 | 2006-03-29 15:23:29 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
| 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
| 32 | |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/pci.h> |
| 35 | #include <linux/vmalloc.h> |
| 36 | |
| 37 | #include "ipath_kernel.h" |
| 38 | |
| 39 | /* |
| 40 | * InfiniPath I2C driver for a serial eeprom. This is not a generic |
| 41 | * I2C interface. For a start, the device we're using (Atmel AT24C11) |
| 42 | * doesn't work like a regular I2C device. It looks like one |
| 43 | * electrically, but not logically. Normal I2C devices have a single |
| 44 | * 7-bit or 10-bit I2C address that they respond to. Valid 7-bit |
| 45 | * addresses range from 0x03 to 0x77. Addresses 0x00 to 0x02 and 0x78 |
| 46 | * to 0x7F are special reserved addresses (e.g. 0x00 is the "general |
| 47 | * call" address.) The Atmel device, on the other hand, responds to ALL |
| 48 | * 7-bit addresses. It's designed to be the only device on a given I2C |
| 49 | * bus. A 7-bit address corresponds to the memory address within the |
| 50 | * Atmel device itself. |
| 51 | * |
| 52 | * Also, the timing requirements mean more than simple software |
| 53 | * bitbanging, with readbacks from chip to ensure timing (simple udelay |
| 54 | * is not enough). |
| 55 | * |
| 56 | * This all means that accessing the device is specialized enough |
| 57 | * that using the standard kernel I2C bitbanging interface would be |
| 58 | * impossible. For example, the core I2C eeprom driver expects to find |
| 59 | * a device at one or more of a limited set of addresses only. It doesn't |
| 60 | * allow writing to an eeprom. It also doesn't provide any means of |
| 61 | * accessing eeprom contents from within the kernel, only via sysfs. |
| 62 | */ |
| 63 | |
| 64 | enum i2c_type { |
| 65 | i2c_line_scl = 0, |
| 66 | i2c_line_sda |
| 67 | }; |
| 68 | |
| 69 | enum i2c_state { |
| 70 | i2c_line_low = 0, |
| 71 | i2c_line_high |
| 72 | }; |
| 73 | |
| 74 | #define READ_CMD 1 |
| 75 | #define WRITE_CMD 0 |
| 76 | |
| 77 | static int eeprom_init; |
| 78 | |
| 79 | /* |
| 80 | * The gpioval manipulation really should be protected by spinlocks |
| 81 | * or be converted to use atomic operations. |
| 82 | */ |
| 83 | |
| 84 | /** |
| 85 | * i2c_gpio_set - set a GPIO line |
| 86 | * @dd: the infinipath device |
| 87 | * @line: the line to set |
| 88 | * @new_line_state: the state to set |
| 89 | * |
| 90 | * Returns 0 if the line was set to the new state successfully, non-zero |
| 91 | * on error. |
| 92 | */ |
| 93 | static int i2c_gpio_set(struct ipath_devdata *dd, |
| 94 | enum i2c_type line, |
| 95 | enum i2c_state new_line_state) |
| 96 | { |
| 97 | u64 read_val, write_val, mask, *gpioval; |
| 98 | |
| 99 | gpioval = &dd->ipath_gpio_out; |
| 100 | read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl); |
| 101 | if (line == i2c_line_scl) |
| 102 | mask = ipath_gpio_scl; |
| 103 | else |
| 104 | mask = ipath_gpio_sda; |
| 105 | |
| 106 | if (new_line_state == i2c_line_high) |
| 107 | /* tri-state the output rather than force high */ |
| 108 | write_val = read_val & ~mask; |
| 109 | else |
| 110 | /* config line to be an output */ |
| 111 | write_val = read_val | mask; |
| 112 | ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, write_val); |
| 113 | |
| 114 | /* set high and verify */ |
| 115 | if (new_line_state == i2c_line_high) |
| 116 | write_val = 0x1UL; |
| 117 | else |
| 118 | write_val = 0x0UL; |
| 119 | |
| 120 | if (line == i2c_line_scl) { |
| 121 | write_val <<= ipath_gpio_scl_num; |
| 122 | *gpioval = *gpioval & ~(1UL << ipath_gpio_scl_num); |
| 123 | *gpioval |= write_val; |
| 124 | } else { |
| 125 | write_val <<= ipath_gpio_sda_num; |
| 126 | *gpioval = *gpioval & ~(1UL << ipath_gpio_sda_num); |
| 127 | *gpioval |= write_val; |
| 128 | } |
| 129 | ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_out, *gpioval); |
| 130 | |
| 131 | return 0; |
| 132 | } |
| 133 | |
| 134 | /** |
| 135 | * i2c_gpio_get - get a GPIO line state |
| 136 | * @dd: the infinipath device |
| 137 | * @line: the line to get |
| 138 | * @curr_statep: where to put the line state |
| 139 | * |
| 140 | * Returns 0 if the line was set to the new state successfully, non-zero |
| 141 | * on error. curr_state is not set on error. |
| 142 | */ |
| 143 | static int i2c_gpio_get(struct ipath_devdata *dd, |
| 144 | enum i2c_type line, |
| 145 | enum i2c_state *curr_statep) |
| 146 | { |
| 147 | u64 read_val, write_val, mask; |
| 148 | int ret; |
| 149 | |
| 150 | /* check args */ |
| 151 | if (curr_statep == NULL) { |
| 152 | ret = 1; |
| 153 | goto bail; |
| 154 | } |
| 155 | |
| 156 | read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl); |
| 157 | /* config line to be an input */ |
| 158 | if (line == i2c_line_scl) |
| 159 | mask = ipath_gpio_scl; |
| 160 | else |
| 161 | mask = ipath_gpio_sda; |
| 162 | write_val = read_val & ~mask; |
| 163 | ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, write_val); |
| 164 | read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus); |
| 165 | |
| 166 | if (read_val & mask) |
| 167 | *curr_statep = i2c_line_high; |
| 168 | else |
| 169 | *curr_statep = i2c_line_low; |
| 170 | |
| 171 | ret = 0; |
| 172 | |
| 173 | bail: |
| 174 | return ret; |
| 175 | } |
| 176 | |
| 177 | /** |
| 178 | * i2c_wait_for_writes - wait for a write |
| 179 | * @dd: the infinipath device |
| 180 | * |
| 181 | * We use this instead of udelay directly, so we can make sure |
| 182 | * that previous register writes have been flushed all the way |
| 183 | * to the chip. Since we are delaying anyway, the cost doesn't |
| 184 | * hurt, and makes the bit twiddling more regular |
| 185 | */ |
| 186 | static void i2c_wait_for_writes(struct ipath_devdata *dd) |
| 187 | { |
| 188 | (void)ipath_read_kreg32(dd, dd->ipath_kregs->kr_scratch); |
| 189 | } |
| 190 | |
| 191 | static void scl_out(struct ipath_devdata *dd, u8 bit) |
| 192 | { |
| 193 | i2c_gpio_set(dd, i2c_line_scl, bit ? i2c_line_high : i2c_line_low); |
| 194 | |
| 195 | i2c_wait_for_writes(dd); |
| 196 | } |
| 197 | |
| 198 | static void sda_out(struct ipath_devdata *dd, u8 bit) |
| 199 | { |
| 200 | i2c_gpio_set(dd, i2c_line_sda, bit ? i2c_line_high : i2c_line_low); |
| 201 | |
| 202 | i2c_wait_for_writes(dd); |
| 203 | } |
| 204 | |
| 205 | static u8 sda_in(struct ipath_devdata *dd, int wait) |
| 206 | { |
| 207 | enum i2c_state bit; |
| 208 | |
| 209 | if (i2c_gpio_get(dd, i2c_line_sda, &bit)) |
| 210 | ipath_dbg("get bit failed!\n"); |
| 211 | |
| 212 | if (wait) |
| 213 | i2c_wait_for_writes(dd); |
| 214 | |
| 215 | return bit == i2c_line_high ? 1U : 0; |
| 216 | } |
| 217 | |
| 218 | /** |
| 219 | * i2c_ackrcv - see if ack following write is true |
| 220 | * @dd: the infinipath device |
| 221 | */ |
| 222 | static int i2c_ackrcv(struct ipath_devdata *dd) |
| 223 | { |
| 224 | u8 ack_received; |
| 225 | |
| 226 | /* AT ENTRY SCL = LOW */ |
| 227 | /* change direction, ignore data */ |
| 228 | ack_received = sda_in(dd, 1); |
| 229 | scl_out(dd, i2c_line_high); |
| 230 | ack_received = sda_in(dd, 1) == 0; |
| 231 | scl_out(dd, i2c_line_low); |
| 232 | return ack_received; |
| 233 | } |
| 234 | |
| 235 | /** |
| 236 | * wr_byte - write a byte, one bit at a time |
| 237 | * @dd: the infinipath device |
| 238 | * @data: the byte to write |
| 239 | * |
| 240 | * Returns 0 if we got the following ack, otherwise 1 |
| 241 | */ |
| 242 | static int wr_byte(struct ipath_devdata *dd, u8 data) |
| 243 | { |
| 244 | int bit_cntr; |
| 245 | u8 bit; |
| 246 | |
| 247 | for (bit_cntr = 7; bit_cntr >= 0; bit_cntr--) { |
| 248 | bit = (data >> bit_cntr) & 1; |
| 249 | sda_out(dd, bit); |
| 250 | scl_out(dd, i2c_line_high); |
| 251 | scl_out(dd, i2c_line_low); |
| 252 | } |
| 253 | return (!i2c_ackrcv(dd)) ? 1 : 0; |
| 254 | } |
| 255 | |
| 256 | static void send_ack(struct ipath_devdata *dd) |
| 257 | { |
| 258 | sda_out(dd, i2c_line_low); |
| 259 | scl_out(dd, i2c_line_high); |
| 260 | scl_out(dd, i2c_line_low); |
| 261 | sda_out(dd, i2c_line_high); |
| 262 | } |
| 263 | |
| 264 | /** |
| 265 | * i2c_startcmd - transmit the start condition, followed by address/cmd |
| 266 | * @dd: the infinipath device |
| 267 | * @offset_dir: direction byte |
| 268 | * |
| 269 | * (both clock/data high, clock high, data low while clock is high) |
| 270 | */ |
| 271 | static int i2c_startcmd(struct ipath_devdata *dd, u8 offset_dir) |
| 272 | { |
| 273 | int res; |
| 274 | |
| 275 | /* issue start sequence */ |
| 276 | sda_out(dd, i2c_line_high); |
| 277 | scl_out(dd, i2c_line_high); |
| 278 | sda_out(dd, i2c_line_low); |
| 279 | scl_out(dd, i2c_line_low); |
| 280 | |
| 281 | /* issue length and direction byte */ |
| 282 | res = wr_byte(dd, offset_dir); |
| 283 | |
| 284 | if (res) |
| 285 | ipath_cdbg(VERBOSE, "No ack to complete start\n"); |
| 286 | |
| 287 | return res; |
| 288 | } |
| 289 | |
| 290 | /** |
| 291 | * stop_cmd - transmit the stop condition |
| 292 | * @dd: the infinipath device |
| 293 | * |
| 294 | * (both clock/data low, clock high, data high while clock is high) |
| 295 | */ |
| 296 | static void stop_cmd(struct ipath_devdata *dd) |
| 297 | { |
| 298 | scl_out(dd, i2c_line_low); |
| 299 | sda_out(dd, i2c_line_low); |
| 300 | scl_out(dd, i2c_line_high); |
| 301 | sda_out(dd, i2c_line_high); |
| 302 | udelay(2); |
| 303 | } |
| 304 | |
| 305 | /** |
| 306 | * eeprom_reset - reset I2C communication |
| 307 | * @dd: the infinipath device |
| 308 | */ |
| 309 | |
| 310 | static int eeprom_reset(struct ipath_devdata *dd) |
| 311 | { |
| 312 | int clock_cycles_left = 9; |
| 313 | u64 *gpioval = &dd->ipath_gpio_out; |
| 314 | int ret; |
| 315 | |
| 316 | eeprom_init = 1; |
| 317 | *gpioval = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_out); |
| 318 | ipath_cdbg(VERBOSE, "Resetting i2c eeprom; initial gpioout reg " |
| 319 | "is %llx\n", (unsigned long long) *gpioval); |
| 320 | |
| 321 | /* |
| 322 | * This is to get the i2c into a known state, by first going low, |
| 323 | * then tristate sda (and then tristate scl as first thing |
| 324 | * in loop) |
| 325 | */ |
| 326 | scl_out(dd, i2c_line_low); |
| 327 | sda_out(dd, i2c_line_high); |
| 328 | |
| 329 | while (clock_cycles_left--) { |
| 330 | scl_out(dd, i2c_line_high); |
| 331 | |
| 332 | if (sda_in(dd, 0)) { |
| 333 | sda_out(dd, i2c_line_low); |
| 334 | scl_out(dd, i2c_line_low); |
| 335 | ret = 0; |
| 336 | goto bail; |
| 337 | } |
| 338 | |
| 339 | scl_out(dd, i2c_line_low); |
| 340 | } |
| 341 | |
| 342 | ret = 1; |
| 343 | |
| 344 | bail: |
| 345 | return ret; |
| 346 | } |
| 347 | |
| 348 | /** |
| 349 | * ipath_eeprom_read - receives bytes from the eeprom via I2C |
| 350 | * @dd: the infinipath device |
| 351 | * @eeprom_offset: address to read from |
| 352 | * @buffer: where to store result |
| 353 | * @len: number of bytes to receive |
| 354 | */ |
| 355 | |
| 356 | int ipath_eeprom_read(struct ipath_devdata *dd, u8 eeprom_offset, |
| 357 | void *buffer, int len) |
| 358 | { |
| 359 | /* compiler complains unless initialized */ |
| 360 | u8 single_byte = 0; |
| 361 | int bit_cntr; |
| 362 | int ret; |
| 363 | |
| 364 | if (!eeprom_init) |
| 365 | eeprom_reset(dd); |
| 366 | |
| 367 | eeprom_offset = (eeprom_offset << 1) | READ_CMD; |
| 368 | |
| 369 | if (i2c_startcmd(dd, eeprom_offset)) { |
| 370 | ipath_dbg("Failed startcmd\n"); |
| 371 | stop_cmd(dd); |
| 372 | ret = 1; |
| 373 | goto bail; |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * eeprom keeps clocking data out as long as we ack, automatically |
| 378 | * incrementing the address. |
| 379 | */ |
| 380 | while (len-- > 0) { |
| 381 | /* get data */ |
| 382 | single_byte = 0; |
| 383 | for (bit_cntr = 8; bit_cntr; bit_cntr--) { |
| 384 | u8 bit; |
| 385 | scl_out(dd, i2c_line_high); |
| 386 | bit = sda_in(dd, 0); |
| 387 | single_byte |= bit << (bit_cntr - 1); |
| 388 | scl_out(dd, i2c_line_low); |
| 389 | } |
| 390 | |
| 391 | /* send ack if not the last byte */ |
| 392 | if (len) |
| 393 | send_ack(dd); |
| 394 | |
| 395 | *((u8 *) buffer) = single_byte; |
| 396 | buffer++; |
| 397 | } |
| 398 | |
| 399 | stop_cmd(dd); |
| 400 | |
| 401 | ret = 0; |
| 402 | |
| 403 | bail: |
| 404 | return ret; |
| 405 | } |
| 406 | |
| 407 | /** |
| 408 | * ipath_eeprom_write - writes data to the eeprom via I2C |
| 409 | * @dd: the infinipath device |
| 410 | * @eeprom_offset: where to place data |
| 411 | * @buffer: data to write |
| 412 | * @len: number of bytes to write |
| 413 | */ |
| 414 | int ipath_eeprom_write(struct ipath_devdata *dd, u8 eeprom_offset, |
| 415 | const void *buffer, int len) |
| 416 | { |
| 417 | u8 single_byte; |
| 418 | int sub_len; |
| 419 | const u8 *bp = buffer; |
| 420 | int max_wait_time, i; |
| 421 | int ret; |
| 422 | |
| 423 | if (!eeprom_init) |
| 424 | eeprom_reset(dd); |
| 425 | |
| 426 | while (len > 0) { |
| 427 | if (i2c_startcmd(dd, (eeprom_offset << 1) | WRITE_CMD)) { |
| 428 | ipath_dbg("Failed to start cmd offset %u\n", |
| 429 | eeprom_offset); |
| 430 | goto failed_write; |
| 431 | } |
| 432 | |
| 433 | sub_len = min(len, 4); |
| 434 | eeprom_offset += sub_len; |
| 435 | len -= sub_len; |
| 436 | |
| 437 | for (i = 0; i < sub_len; i++) { |
| 438 | if (wr_byte(dd, *bp++)) { |
| 439 | ipath_dbg("no ack after byte %u/%u (%u " |
| 440 | "total remain)\n", i, sub_len, |
| 441 | len + sub_len - i); |
| 442 | goto failed_write; |
| 443 | } |
| 444 | } |
| 445 | |
| 446 | stop_cmd(dd); |
| 447 | |
| 448 | /* |
| 449 | * wait for write complete by waiting for a successful |
| 450 | * read (the chip replies with a zero after the write |
| 451 | * cmd completes, and before it writes to the eeprom. |
| 452 | * The startcmd for the read will fail the ack until |
| 453 | * the writes have completed. We do this inline to avoid |
| 454 | * the debug prints that are in the real read routine |
| 455 | * if the startcmd fails. |
| 456 | */ |
| 457 | max_wait_time = 100; |
| 458 | while (i2c_startcmd(dd, READ_CMD)) { |
| 459 | stop_cmd(dd); |
| 460 | if (!--max_wait_time) { |
| 461 | ipath_dbg("Did not get successful read to " |
| 462 | "complete write\n"); |
| 463 | goto failed_write; |
| 464 | } |
| 465 | } |
| 466 | /* now read the zero byte */ |
| 467 | for (i = single_byte = 0; i < 8; i++) { |
| 468 | u8 bit; |
| 469 | scl_out(dd, i2c_line_high); |
| 470 | bit = sda_in(dd, 0); |
| 471 | scl_out(dd, i2c_line_low); |
| 472 | single_byte <<= 1; |
| 473 | single_byte |= bit; |
| 474 | } |
| 475 | stop_cmd(dd); |
| 476 | } |
| 477 | |
| 478 | ret = 0; |
| 479 | goto bail; |
| 480 | |
| 481 | failed_write: |
| 482 | stop_cmd(dd); |
| 483 | ret = 1; |
| 484 | |
| 485 | bail: |
| 486 | return ret; |
| 487 | } |
| 488 | |
| 489 | static u8 flash_csum(struct ipath_flash *ifp, int adjust) |
| 490 | { |
| 491 | u8 *ip = (u8 *) ifp; |
| 492 | u8 csum = 0, len; |
| 493 | |
| 494 | for (len = 0; len < ifp->if_length; len++) |
| 495 | csum += *ip++; |
| 496 | csum -= ifp->if_csum; |
| 497 | csum = ~csum; |
| 498 | if (adjust) |
| 499 | ifp->if_csum = csum; |
| 500 | |
| 501 | return csum; |
| 502 | } |
| 503 | |
| 504 | /** |
| 505 | * ipath_get_guid - get the GUID from the i2c device |
| 506 | * @dd: the infinipath device |
| 507 | * |
Bryan O'Sullivan | f2080fa | 2006-05-23 11:32:34 -0700 | [diff] [blame] | 508 | * We have the capability to use the ipath_nguid field, and get |
| 509 | * the guid from the first chip's flash, to use for all of them. |
Bryan O'Sullivan | 108ecf0 | 2006-03-29 15:23:29 -0800 | [diff] [blame] | 510 | */ |
Bryan O'Sullivan | f2080fa | 2006-05-23 11:32:34 -0700 | [diff] [blame] | 511 | void ipath_get_eeprom_info(struct ipath_devdata *dd) |
Bryan O'Sullivan | 108ecf0 | 2006-03-29 15:23:29 -0800 | [diff] [blame] | 512 | { |
| 513 | void *buf; |
| 514 | struct ipath_flash *ifp; |
| 515 | __be64 guid; |
| 516 | int len; |
| 517 | u8 csum, *bguid; |
| 518 | int t = dd->ipath_unit; |
| 519 | struct ipath_devdata *dd0 = ipath_lookup(0); |
| 520 | |
| 521 | if (t && dd0->ipath_nguid > 1 && t <= dd0->ipath_nguid) { |
| 522 | u8 *bguid, oguid; |
| 523 | dd->ipath_guid = dd0->ipath_guid; |
| 524 | bguid = (u8 *) & dd->ipath_guid; |
| 525 | |
| 526 | oguid = bguid[7]; |
| 527 | bguid[7] += t; |
| 528 | if (oguid > bguid[7]) { |
| 529 | if (bguid[6] == 0xff) { |
| 530 | if (bguid[5] == 0xff) { |
| 531 | ipath_dev_err( |
| 532 | dd, |
| 533 | "Can't set %s GUID from " |
| 534 | "base, wraps to OUI!\n", |
| 535 | ipath_get_unit_name(t)); |
| 536 | dd->ipath_guid = 0; |
| 537 | goto bail; |
| 538 | } |
| 539 | bguid[5]++; |
| 540 | } |
| 541 | bguid[6]++; |
| 542 | } |
| 543 | dd->ipath_nguid = 1; |
| 544 | |
| 545 | ipath_dbg("nguid %u, so adding %u to device 0 guid, " |
| 546 | "for %llx\n", |
| 547 | dd0->ipath_nguid, t, |
| 548 | (unsigned long long) be64_to_cpu(dd->ipath_guid)); |
| 549 | goto bail; |
| 550 | } |
| 551 | |
| 552 | len = offsetof(struct ipath_flash, if_future); |
| 553 | buf = vmalloc(len); |
| 554 | if (!buf) { |
| 555 | ipath_dev_err(dd, "Couldn't allocate memory to read %u " |
| 556 | "bytes from eeprom for GUID\n", len); |
| 557 | goto bail; |
| 558 | } |
| 559 | |
| 560 | if (ipath_eeprom_read(dd, 0, buf, len)) { |
| 561 | ipath_dev_err(dd, "Failed reading GUID from eeprom\n"); |
| 562 | goto done; |
| 563 | } |
| 564 | ifp = (struct ipath_flash *)buf; |
| 565 | |
| 566 | csum = flash_csum(ifp, 0); |
| 567 | if (csum != ifp->if_csum) { |
| 568 | dev_info(&dd->pcidev->dev, "Bad I2C flash checksum: " |
| 569 | "0x%x, not 0x%x\n", csum, ifp->if_csum); |
| 570 | goto done; |
| 571 | } |
| 572 | if (*(__be64 *) ifp->if_guid == 0ULL || |
| 573 | *(__be64 *) ifp->if_guid == __constant_cpu_to_be64(-1LL)) { |
| 574 | ipath_dev_err(dd, "Invalid GUID %llx from flash; " |
| 575 | "ignoring\n", |
| 576 | *(unsigned long long *) ifp->if_guid); |
| 577 | /* don't allow GUID if all 0 or all 1's */ |
| 578 | goto done; |
| 579 | } |
| 580 | |
| 581 | /* complain, but allow it */ |
| 582 | if (*(u64 *) ifp->if_guid == 0x100007511000000ULL) |
| 583 | dev_info(&dd->pcidev->dev, "Warning, GUID %llx is " |
| 584 | "default, probably not correct!\n", |
| 585 | *(unsigned long long *) ifp->if_guid); |
| 586 | |
| 587 | bguid = ifp->if_guid; |
| 588 | if (!bguid[0] && !bguid[1] && !bguid[2]) { |
| 589 | /* original incorrect GUID format in flash; fix in |
| 590 | * core copy, by shifting up 2 octets; don't need to |
| 591 | * change top octet, since both it and shifted are |
| 592 | * 0.. */ |
| 593 | bguid[1] = bguid[3]; |
| 594 | bguid[2] = bguid[4]; |
| 595 | bguid[3] = bguid[4] = 0; |
| 596 | guid = *(__be64 *) ifp->if_guid; |
| 597 | ipath_cdbg(VERBOSE, "Old GUID format in flash, top 3 zero, " |
| 598 | "shifting 2 octets\n"); |
| 599 | } else |
| 600 | guid = *(__be64 *) ifp->if_guid; |
| 601 | dd->ipath_guid = guid; |
| 602 | dd->ipath_nguid = ifp->if_numguid; |
| 603 | memcpy(dd->ipath_serial, ifp->if_serial, |
| 604 | sizeof(ifp->if_serial)); |
| 605 | ipath_cdbg(VERBOSE, "Initted GUID to %llx from eeprom\n", |
| 606 | (unsigned long long) be64_to_cpu(dd->ipath_guid)); |
| 607 | |
| 608 | done: |
| 609 | vfree(buf); |
| 610 | |
| 611 | bail:; |
| 612 | } |