blob: f8160b8de0908ed51b160c880634c1394a6b0712 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
Tom Duffycd4e8fb2005-06-27 14:36:37 -07003 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
Roland Dreier4885bf62006-01-30 14:31:33 -08004 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
Roland Dreier2a1d9b72005-08-10 23:03:10 -07005 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
35 *
36 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
37 */
38
39#ifndef MTHCA_DEV_H
40#define MTHCA_DEV_H
41
42#include <linux/spinlock.h>
43#include <linux/kernel.h>
44#include <linux/pci.h>
45#include <linux/dma-mapping.h>
Tim Schmielaude259682006-01-08 01:02:05 -080046#include <linux/timer.h>
Roland Dreierfd9cfdd2006-01-30 16:45:11 -080047#include <linux/mutex.h>
48
Linus Torvalds1da177e2005-04-16 15:20:36 -070049#include <asm/semaphore.h>
50
51#include "mthca_provider.h"
52#include "mthca_doorbell.h"
53
54#define DRV_NAME "ib_mthca"
55#define PFX DRV_NAME ": "
Roland Dreier00df1b22006-02-13 17:21:09 -080056#define DRV_VERSION "0.08"
57#define DRV_RELDATE "February 14, 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
Linus Torvalds1da177e2005-04-16 15:20:36 -070059enum {
60 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
61 MTHCA_FLAG_SRQ = 1 << 2,
62 MTHCA_FLAG_MSI = 1 << 3,
63 MTHCA_FLAG_MSI_X = 1 << 4,
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -070064 MTHCA_FLAG_NO_LAM = 1 << 5,
Roland Dreier68a3c212005-04-16 15:26:34 -070065 MTHCA_FLAG_FMR = 1 << 6,
66 MTHCA_FLAG_MEMFREE = 1 << 7,
Eli Cohen651eaac2006-03-02 12:40:46 -080067 MTHCA_FLAG_PCIE = 1 << 8,
68 MTHCA_FLAG_SINAI_OPT = 1 << 9
Linus Torvalds1da177e2005-04-16 15:20:36 -070069};
70
71enum {
72 MTHCA_MAX_PORTS = 2
73};
74
75enum {
Michael S. Tsirkin2e8b9812005-08-13 21:19:38 -070076 MTHCA_BOARD_ID_LEN = 64
77};
78
79enum {
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 MTHCA_EQ_CONTEXT_SIZE = 0x40,
81 MTHCA_CQ_CONTEXT_SIZE = 0x40,
82 MTHCA_QP_CONTEXT_SIZE = 0x200,
83 MTHCA_RDB_ENTRY_SIZE = 0x20,
84 MTHCA_AV_SIZE = 0x20,
85 MTHCA_MGM_ENTRY_SIZE = 0x40,
86
87 /* Arbel FW gives us these, but we need them for Tavor */
88 MTHCA_MPT_ENTRY_SIZE = 0x40,
89 MTHCA_MTT_SEG_SIZE = 0x40,
Jack Morgensteinefaae8f2005-10-10 13:48:07 -070090
91 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
Linus Torvalds1da177e2005-04-16 15:20:36 -070092};
93
94enum {
95 MTHCA_EQ_CMD,
96 MTHCA_EQ_ASYNC,
97 MTHCA_EQ_COMP,
98 MTHCA_NUM_EQ
99};
100
Michael S. Tsirkin2a4443a2005-04-16 15:26:25 -0700101enum {
102 MTHCA_OPCODE_NOP = 0x00,
103 MTHCA_OPCODE_RDMA_WRITE = 0x08,
104 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
105 MTHCA_OPCODE_SEND = 0x0a,
106 MTHCA_OPCODE_SEND_IMM = 0x0b,
107 MTHCA_OPCODE_RDMA_READ = 0x10,
108 MTHCA_OPCODE_ATOMIC_CS = 0x11,
109 MTHCA_OPCODE_ATOMIC_FA = 0x12,
110 MTHCA_OPCODE_BIND_MW = 0x18,
111 MTHCA_OPCODE_INVALID = 0xff
112};
113
Eli Cohen14abdff2006-02-26 14:36:06 -0800114enum {
115 MTHCA_CMD_USE_EVENTS = 1 << 0,
116 MTHCA_CMD_POST_DOORBELLS = 1 << 1
117};
118
119enum {
120 MTHCA_CMD_NUM_DBELL_DWORDS = 8
121};
122
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123struct mthca_cmd {
Roland Dreiered878452005-06-27 14:36:45 -0700124 struct pci_pool *pool;
Roland Dreierfd9cfdd2006-01-30 16:45:11 -0800125 struct mutex hcr_mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 struct semaphore poll_sem;
127 struct semaphore event_sem;
128 int max_cmds;
129 spinlock_t context_lock;
130 int free_head;
131 struct mthca_cmd_context *context;
132 u16 token_mask;
Eli Cohen14abdff2006-02-26 14:36:06 -0800133 u32 flags;
134 void __iomem *dbell_map;
135 u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136};
137
138struct mthca_limits {
139 int num_ports;
140 int vl_cap;
141 int mtu_cap;
142 int gid_table_len;
143 int pkey_table_len;
144 int local_ca_ack_delay;
145 int num_uars;
146 int max_sg;
147 int num_qps;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700148 int max_wqes;
Jack Morgenstein77369ed2005-11-09 11:26:07 -0800149 int max_desc_sz;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700150 int max_qp_init_rdma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 int reserved_qps;
152 int num_srqs;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700153 int max_srq_wqes;
Jack Morgenstein59fef3b2006-04-11 18:16:27 +0300154 int max_srq_sge;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 int reserved_srqs;
156 int num_eecs;
157 int reserved_eecs;
158 int num_cqs;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700159 int max_cqes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 int reserved_cqs;
161 int num_eqs;
162 int reserved_eqs;
163 int num_mpts;
164 int num_mtt_segs;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700165 int fmr_reserved_mtts;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 int reserved_mtts;
167 int reserved_mrws;
168 int reserved_uars;
169 int num_mgms;
170 int num_amgms;
171 int reserved_mcgs;
172 int num_pds;
173 int reserved_pds;
Jack Morgenstein0f69ce12005-11-04 16:03:32 -0800174 u32 page_size_cap;
Jack Morgenstein33033b792005-09-26 12:30:02 -0700175 u32 flags;
Jack Morgensteinbf6a9e32006-04-10 09:43:47 -0700176 u16 stat_rate_support;
Roland Dreierda6561c2005-08-17 07:39:10 -0700177 u8 port_width_cap;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178};
179
180struct mthca_alloc {
181 u32 last;
182 u32 top;
183 u32 max;
184 u32 mask;
185 spinlock_t lock;
186 unsigned long *table;
187};
188
189struct mthca_array {
190 struct {
191 void **page;
192 int used;
193 } *page_list;
194};
195
196struct mthca_uar_table {
197 struct mthca_alloc alloc;
198 u64 uarc_base;
199 int uarc_size;
200};
201
202struct mthca_pd_table {
203 struct mthca_alloc alloc;
204};
205
Michael S. Tsirkin9095e202005-04-16 15:26:26 -0700206struct mthca_buddy {
207 unsigned long **bits;
208 int max_order;
209 spinlock_t lock;
210};
211
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212struct mthca_mr_table {
213 struct mthca_alloc mpt_alloc;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700214 struct mthca_buddy mtt_buddy;
215 struct mthca_buddy *fmr_mtt_buddy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216 u64 mtt_base;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700217 u64 mpt_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 struct mthca_icm_table *mtt_table;
219 struct mthca_icm_table *mpt_table;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700220 struct {
221 void __iomem *mpt_base;
222 void __iomem *mtt_base;
223 struct mthca_buddy mtt_buddy;
224 } tavor_fmr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225};
226
227struct mthca_eq_table {
228 struct mthca_alloc alloc;
229 void __iomem *clr_int;
230 u32 clr_mask;
231 u32 arm_mask;
232 struct mthca_eq eq[MTHCA_NUM_EQ];
233 u64 icm_virt;
234 struct page *icm_page;
235 dma_addr_t icm_dma;
236 int have_irq;
237 u8 inta_pin;
238};
239
240struct mthca_cq_table {
241 struct mthca_alloc alloc;
242 spinlock_t lock;
243 struct mthca_array cq;
244 struct mthca_icm_table *table;
245};
246
Roland Dreierec34a922005-08-19 10:59:31 -0700247struct mthca_srq_table {
248 struct mthca_alloc alloc;
249 spinlock_t lock;
250 struct mthca_array srq;
251 struct mthca_icm_table *table;
252};
253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254struct mthca_qp_table {
255 struct mthca_alloc alloc;
256 u32 rdb_base;
257 int rdb_shift;
258 int sqp_start;
259 spinlock_t lock;
260 struct mthca_array qp;
261 struct mthca_icm_table *qp_table;
262 struct mthca_icm_table *eqp_table;
Roland Dreier08aeb142005-04-16 15:26:34 -0700263 struct mthca_icm_table *rdb_table;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264};
265
266struct mthca_av_table {
267 struct pci_pool *pool;
268 int num_ddr_avs;
269 u64 ddr_av_base;
270 void __iomem *av_map;
271 struct mthca_alloc alloc;
272};
273
274struct mthca_mcg_table {
Roland Dreierfd9cfdd2006-01-30 16:45:11 -0800275 struct mutex mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 struct mthca_alloc alloc;
277 struct mthca_icm_table *table;
278};
279
Roland Dreier3d155f82005-10-27 11:03:38 -0700280struct mthca_catas_err {
281 u64 addr;
282 u32 __iomem *map;
283 unsigned long stop;
284 u32 size;
285 struct timer_list timer;
286};
287
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288struct mthca_dev {
289 struct ib_device ib_dev;
290 struct pci_dev *pdev;
291
292 int hca_type;
293 unsigned long mthca_flags;
294 unsigned long device_cap_flags;
295
296 u32 rev_id;
Michael S. Tsirkin2e8b9812005-08-13 21:19:38 -0700297 char board_id[MTHCA_BOARD_ID_LEN];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298
299 /* firmware info */
300 u64 fw_ver;
301 union {
302 struct {
303 u64 fw_start;
304 u64 fw_end;
305 } tavor;
306 struct {
307 u64 clr_int_base;
308 u64 eq_arm_base;
309 u64 eq_set_ci_base;
310 struct mthca_icm *fw_icm;
311 struct mthca_icm *aux_icm;
312 u16 fw_pages;
313 } arbel;
314 } fw;
315
316 u64 ddr_start;
317 u64 ddr_end;
318
319 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
Roland Dreierfd9cfdd2006-01-30 16:45:11 -0800320 struct mutex cap_mask_mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321
322 void __iomem *hcr;
323 void __iomem *kar;
324 void __iomem *clr_base;
325 union {
326 struct {
327 void __iomem *ecr_base;
328 } tavor;
329 struct {
330 void __iomem *eq_arm;
331 void __iomem *eq_set_ci_base;
332 } arbel;
333 } eq_regs;
334
335 struct mthca_cmd cmd;
336 struct mthca_limits limits;
337
338 struct mthca_uar_table uar_table;
339 struct mthca_pd_table pd_table;
340 struct mthca_mr_table mr_table;
341 struct mthca_eq_table eq_table;
342 struct mthca_cq_table cq_table;
Roland Dreierec34a922005-08-19 10:59:31 -0700343 struct mthca_srq_table srq_table;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 struct mthca_qp_table qp_table;
345 struct mthca_av_table av_table;
346 struct mthca_mcg_table mcg_table;
347
Roland Dreier3d155f82005-10-27 11:03:38 -0700348 struct mthca_catas_err catas_err;
349
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350 struct mthca_uar driver_uar;
351 struct mthca_db_table *db_tab;
352 struct mthca_pd driver_pd;
353 struct mthca_mr driver_mr;
354
355 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
356 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
357 spinlock_t sm_lock;
Jack Morgensteinbf6a9e32006-04-10 09:43:47 -0700358 u8 rate[MTHCA_MAX_PORTS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359};
360
Roland Dreier227c9392006-04-02 14:39:20 -0700361#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
362extern int mthca_debug_level;
363
364#define mthca_dbg(mdev, format, arg...) \
365 do { \
366 if (mthca_debug_level) \
367 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
368 } while (0)
369
370#else /* CONFIG_INFINIBAND_MTHCA_DEBUG */
371
372#define mthca_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
373
374#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
375
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376#define mthca_err(mdev, format, arg...) \
377 dev_err(&mdev->pdev->dev, format, ## arg)
378#define mthca_info(mdev, format, arg...) \
379 dev_info(&mdev->pdev->dev, format, ## arg)
380#define mthca_warn(mdev, format, arg...) \
381 dev_warn(&mdev->pdev->dev, format, ## arg)
382
383extern void __buggy_use_of_MTHCA_GET(void);
384extern void __buggy_use_of_MTHCA_PUT(void);
385
386#define MTHCA_GET(dest, source, offset) \
387 do { \
388 void *__p = (char *) (source) + (offset); \
389 switch (sizeof (dest)) { \
390 case 1: (dest) = *(u8 *) __p; break; \
391 case 2: (dest) = be16_to_cpup(__p); break; \
392 case 4: (dest) = be32_to_cpup(__p); break; \
393 case 8: (dest) = be64_to_cpup(__p); break; \
394 default: __buggy_use_of_MTHCA_GET(); \
395 } \
396 } while (0)
397
398#define MTHCA_PUT(dest, source, offset) \
399 do { \
Sean Hefty97f52eb2005-08-13 21:05:57 -0700400 void *__d = ((char *) (dest) + (offset)); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 switch (sizeof(source)) { \
Sean Hefty97f52eb2005-08-13 21:05:57 -0700402 case 1: *(u8 *) __d = (source); break; \
403 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
404 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
405 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
406 default: __buggy_use_of_MTHCA_PUT(); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 } \
408 } while (0)
409
410int mthca_reset(struct mthca_dev *mdev);
411
412u32 mthca_alloc(struct mthca_alloc *alloc);
413void mthca_free(struct mthca_alloc *alloc, u32 obj);
414int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
415 u32 reserved);
416void mthca_alloc_cleanup(struct mthca_alloc *alloc);
417void *mthca_array_get(struct mthca_array *array, int index);
418int mthca_array_set(struct mthca_array *array, int index, void *value);
419void mthca_array_clear(struct mthca_array *array, int index);
420int mthca_array_init(struct mthca_array *array, int nent);
421void mthca_array_cleanup(struct mthca_array *array, int nent);
Roland Dreier87b81672005-08-18 13:39:31 -0700422int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
423 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
424 int hca_write, struct mthca_mr *mr);
425void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
426 int is_direct, struct mthca_mr *mr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427
428int mthca_init_uar_table(struct mthca_dev *dev);
429int mthca_init_pd_table(struct mthca_dev *dev);
430int mthca_init_mr_table(struct mthca_dev *dev);
431int mthca_init_eq_table(struct mthca_dev *dev);
432int mthca_init_cq_table(struct mthca_dev *dev);
Roland Dreierec34a922005-08-19 10:59:31 -0700433int mthca_init_srq_table(struct mthca_dev *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434int mthca_init_qp_table(struct mthca_dev *dev);
435int mthca_init_av_table(struct mthca_dev *dev);
436int mthca_init_mcg_table(struct mthca_dev *dev);
437
438void mthca_cleanup_uar_table(struct mthca_dev *dev);
439void mthca_cleanup_pd_table(struct mthca_dev *dev);
440void mthca_cleanup_mr_table(struct mthca_dev *dev);
441void mthca_cleanup_eq_table(struct mthca_dev *dev);
442void mthca_cleanup_cq_table(struct mthca_dev *dev);
Roland Dreierec34a922005-08-19 10:59:31 -0700443void mthca_cleanup_srq_table(struct mthca_dev *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444void mthca_cleanup_qp_table(struct mthca_dev *dev);
445void mthca_cleanup_av_table(struct mthca_dev *dev);
446void mthca_cleanup_mcg_table(struct mthca_dev *dev);
447
448int mthca_register_device(struct mthca_dev *dev);
449void mthca_unregister_device(struct mthca_dev *dev);
450
Roland Dreier3d155f82005-10-27 11:03:38 -0700451void mthca_start_catas_poll(struct mthca_dev *dev);
452void mthca_stop_catas_poll(struct mthca_dev *dev);
453
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
455void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
456
Roland Dreier99264c12005-07-07 17:57:18 -0700457int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700458void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
459
Roland Dreierd56d6f92005-06-27 14:36:43 -0700460struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
461void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
462int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
463 int start_index, u64 *buffer_list, int list_len);
464int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
465 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
467 u32 access, struct mthca_mr *mr);
468int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
469 u64 *buffer_list, int buffer_size_shift,
470 int list_len, u64 iova, u64 total_size,
471 u32 access, struct mthca_mr *mr);
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700472void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
473
474int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
475 u32 access, struct mthca_fmr *fmr);
476int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
477 int list_len, u64 iova);
478void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
479int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
480 int list_len, u64 iova);
481void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
482int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483
484int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
485void mthca_unmap_eq_icm(struct mthca_dev *dev);
486
487int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
488 struct ib_wc *entry);
489int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
490int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
491int mthca_init_cq(struct mthca_dev *dev, int nent,
Roland Dreier74c21742005-07-07 17:57:19 -0700492 struct mthca_ucontext *ctx, u32 pdn,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493 struct mthca_cq *cq);
494void mthca_free_cq(struct mthca_dev *dev,
495 struct mthca_cq *cq);
Michael S. Tsirkinaffcd502005-10-29 07:39:42 -0700496void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
497void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
498 enum ib_event_type event_type);
Roland Dreiera3285aa2006-05-09 10:50:29 -0700499void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
Roland Dreierec34a922005-08-19 10:59:31 -0700500 struct mthca_srq *srq);
Roland Dreier4885bf62006-01-30 14:31:33 -0800501void mthca_cq_resize_copy_cqes(struct mthca_cq *cq);
502int mthca_alloc_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int nent);
503void mthca_free_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int cqe);
Roland Dreierec34a922005-08-19 10:59:31 -0700504
505int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
506 struct ib_srq_attr *attr, struct mthca_srq *srq);
507void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
Roland Dreier90f104d2005-10-06 13:15:56 -0700508int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
509 enum ib_srq_attr_mask attr_mask);
Eli Cohen8ebe5072006-02-13 16:40:21 -0800510int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
Jack Morgenstein59fef3b2006-04-11 18:16:27 +0300511int mthca_max_srq_sge(struct mthca_dev *dev);
Roland Dreierec34a922005-08-19 10:59:31 -0700512void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
513 enum ib_event_type event_type);
514void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
515int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
516 struct ib_recv_wr **bad_wr);
517int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
518 struct ib_recv_wr **bad_wr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519
520void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
521 enum ib_event_type event_type);
Eli Cohen8ebe5072006-02-13 16:40:21 -0800522int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
523 struct ib_qp_init_attr *qp_init_attr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
525int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
526 struct ib_send_wr **bad_wr);
527int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
528 struct ib_recv_wr **bad_wr);
529int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
530 struct ib_send_wr **bad_wr);
531int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
532 struct ib_recv_wr **bad_wr);
Roland Dreierd9b98b02006-01-31 20:45:51 -0800533void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
534 int index, int *dbd, __be32 *new_wqe);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535int mthca_alloc_qp(struct mthca_dev *dev,
536 struct mthca_pd *pd,
537 struct mthca_cq *send_cq,
538 struct mthca_cq *recv_cq,
539 enum ib_qp_type type,
540 enum ib_sig_type send_policy,
Roland Dreier80c8ec22005-07-07 17:57:20 -0700541 struct ib_qp_cap *cap,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542 struct mthca_qp *qp);
543int mthca_alloc_sqp(struct mthca_dev *dev,
544 struct mthca_pd *pd,
545 struct mthca_cq *send_cq,
546 struct mthca_cq *recv_cq,
547 enum ib_sig_type send_policy,
Roland Dreier80c8ec22005-07-07 17:57:20 -0700548 struct ib_qp_cap *cap,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549 int qpn,
550 int port,
551 struct mthca_sqp *sqp);
552void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
553int mthca_create_ah(struct mthca_dev *dev,
554 struct mthca_pd *pd,
555 struct ib_ah_attr *ah_attr,
556 struct mthca_ah *ah);
557int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
558int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
559 struct ib_ud_header *header);
Jack Morgenstein1d89b1a2006-02-26 16:05:59 -0800560int mthca_ah_query(struct ib_ah *ibah, struct ib_ah_attr *attr);
Michael S. Tsirkin9eacee22006-01-12 15:55:41 -0800561int mthca_ah_grh_present(struct mthca_ah *ah);
Jack Morgensteinbf6a9e32006-04-10 09:43:47 -0700562u8 mthca_get_rate(struct mthca_dev *dev, int static_rate, u8 port);
563enum ib_rate mthca_rate_to_ib(struct mthca_dev *dev, u8 mthca_rate, u8 port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700564
565int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
566int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
567
568int mthca_process_mad(struct ib_device *ibdev,
569 int mad_flags,
570 u8 port_num,
571 struct ib_wc *in_wc,
572 struct ib_grh *in_grh,
573 struct ib_mad *in_mad,
574 struct ib_mad *out_mad);
575int mthca_create_agents(struct mthca_dev *dev);
576void mthca_free_agents(struct mthca_dev *dev);
577
578static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
579{
580 return container_of(ibdev, struct mthca_dev, ib_dev);
581}
582
Roland Dreierd10ddbf2005-04-16 15:26:32 -0700583static inline int mthca_is_memfree(struct mthca_dev *dev)
584{
Roland Dreier68a3c212005-04-16 15:26:34 -0700585 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
Roland Dreierd10ddbf2005-04-16 15:26:32 -0700586}
587
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588#endif /* MTHCA_DEV_H */