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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-arm/arch-s3c2410/entry-macro.S
3 *
4 * Low-level IRQ helper macros for S3C2410-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
Ben Dooks26f91fd2006-04-02 00:09:26 +01009*/
Linus Torvalds1da177e2005-04-16 15:20:36 -070010
Ben Dooks26f91fd2006-04-02 00:09:26 +010011/* We have a problem that the INTOFFSET register does not always
12 * show one interrupt. Occasionally we get two interrupts through
13 * the prioritiser, and this causes the INTOFFSET register to show
14 * what looks like the logical-or of the two interrupt numbers.
15 *
16 * Thanks to Klaus, Shannon, et al for helping to debug this problem
17*/
18
19#define INTPND (0x10)
20#define INTOFFSET (0x14)
21#define EXTINTPEND (0xa8)
22#define EXTINTMASK (0xa4)
23
Russell King78ff18a2006-01-03 17:39:34 +000024#include <asm/hardware.h>
25#include <asm/arch/irqs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
Ben Dooks26f91fd2006-04-02 00:09:26 +010029 mov \base, #S3C24XX_VA_IRQ
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Ben Dooks26f91fd2006-04-02 00:09:26 +010031 ldr \irqstat, [ \base, #INTPND]
32 bics \irqnr, \irqstat, #3<<4 @@ only an GPIO IRQ
33 beq 2000f
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
Ben Dooks26f91fd2006-04-02 00:09:26 +010035 @@ try the interrupt offset register, since it is there
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Ben Dooks26f91fd2006-04-02 00:09:26 +010037 ldr \irqnr, [ \base, #INTOFFSET ]
38 mov \tmp, #1
39 tst \irqstat, \tmp, lsl \irqnr
40 addne \irqnr, \irqnr, #IRQ_EINT0
41 bne 1001f
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
Ben Dooks26f91fd2006-04-02 00:09:26 +010043 @@ the number specified is not a valid irq, so try
44 @@ and work it out for ourselves
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Ben Dooks26f91fd2006-04-02 00:09:26 +010046 mov \irqnr, #IRQ_EINT0 @@ start here
47 b 3000f
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
Ben Dooks26f91fd2006-04-02 00:09:26 +0100492000:
50 @@ load the GPIO interrupt register, and check it
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
Ben Dooks26f91fd2006-04-02 00:09:26 +010052 add \tmp, \base, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ
53 ldr \irqstat, [ \tmp, # EXTINTPEND ]
54 ldr \irqnr, [ \tmp, # EXTINTMASK ]
55 bics \irqstat, \irqstat, \irqnr
56 beq 1001f
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
Ben Dooks26f91fd2006-04-02 00:09:26 +010058 mov \irqnr, #(IRQ_EINT4 - 4)
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
Ben Dooks26f91fd2006-04-02 00:09:26 +010060 @@ work out which irq (if any) we got
613000:
62 movs \tmp, \irqstat, lsl#16
63 addeq \irqnr, \irqnr, #16
64 moveq \irqstat, \irqstat, lsr#16
65 tst \irqstat, #0xff
66 addeq \irqnr, \irqnr, #8
67 moveq \irqstat, \irqstat, lsr#8
68 tst \irqstat, #0xf
69 addeq \irqnr, \irqnr, #4
70 moveq \irqstat, \irqstat, lsr#4
71 tst \irqstat, #0x3
72 addeq \irqnr, \irqnr, #2
73 moveq \irqstat, \irqstat, lsr#2
74 tst \irqstat, #0x1
75 addeq \irqnr, \irqnr, #1
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
Ben Dooks26f91fd2006-04-02 00:09:26 +010077 @@ we have the value
78 movs \irqnr, \irqnr
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801001:
Ben Dooks26f91fd2006-04-02 00:09:26 +010081 @@ exit here, Z flag unset if IRQ
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
Ben Dooks26f91fd2006-04-02 00:09:26 +010083 .endm
Linus Torvalds1da177e2005-04-16 15:20:36 -070084
85 /* currently don't need an disable_fiq macro */
86
87 .macro disable_fiq
88 .endm