Paul Mackerras | 047ea78 | 2005-11-19 20:17:32 +1100 | [diff] [blame] | 1 | #ifndef _ASM_POWERPC_IO_H |
| 2 | #define _ASM_POWERPC_IO_H |
Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 3 | #ifdef __KERNEL__ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | |
| 5 | /* |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
David Woodhouse | 1269277a | 2006-04-24 23:22:17 +0100 | [diff] [blame] | 12 | /* Check of existence of legacy devices */ |
| 13 | extern int check_legacy_ioport(unsigned long base_port); |
| 14 | |
Paul Mackerras | 047ea78 | 2005-11-19 20:17:32 +1100 | [diff] [blame] | 15 | #ifndef CONFIG_PPC64 |
| 16 | #include <asm-ppc/io.h> |
| 17 | #else |
| 18 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <linux/compiler.h> |
| 20 | #include <asm/page.h> |
| 21 | #include <asm/byteorder.h> |
| 22 | #ifdef CONFIG_PPC_ISERIES |
Kelly Daly | 6cbbdab | 2005-11-02 15:07:51 +1100 | [diff] [blame] | 23 | #include <asm/iseries/iseries_io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #endif |
Becky Bruce | feaf7cf | 2005-09-22 14:20:04 -0500 | [diff] [blame] | 25 | #include <asm/synch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <asm/delay.h> |
| 27 | |
| 28 | #include <asm-generic/iomap.h> |
| 29 | |
viro@ZenIV.linux.org.uk | 6c9afc6 | 2005-09-09 16:50:43 +0100 | [diff] [blame] | 30 | #define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c)) |
| 31 | #define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c)) |
| 32 | #define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c)) |
| 33 | #define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | |
| 35 | |
| 36 | #define SIO_CONFIG_RA 0x398 |
| 37 | #define SIO_CONFIG_RD 0x399 |
| 38 | |
| 39 | #define SLOW_DOWN_IO |
| 40 | |
| 41 | extern unsigned long isa_io_base; |
| 42 | extern unsigned long pci_io_base; |
| 43 | extern unsigned long io_page_mask; |
| 44 | |
| 45 | #define MAX_ISA_PORT 0x10000 |
| 46 | |
| 47 | #define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) \ |
| 48 | & io_page_mask) |
| 49 | |
| 50 | #ifdef CONFIG_PPC_ISERIES |
| 51 | /* __raw_* accessors aren't supported on iSeries */ |
| 52 | #define __raw_readb(addr) { BUG(); 0; } |
| 53 | #define __raw_readw(addr) { BUG(); 0; } |
| 54 | #define __raw_readl(addr) { BUG(); 0; } |
| 55 | #define __raw_readq(addr) { BUG(); 0; } |
| 56 | #define __raw_writeb(v, addr) { BUG(); 0; } |
| 57 | #define __raw_writew(v, addr) { BUG(); 0; } |
| 58 | #define __raw_writel(v, addr) { BUG(); 0; } |
| 59 | #define __raw_writeq(v, addr) { BUG(); 0; } |
| 60 | #define readb(addr) iSeries_Read_Byte(addr) |
| 61 | #define readw(addr) iSeries_Read_Word(addr) |
| 62 | #define readl(addr) iSeries_Read_Long(addr) |
| 63 | #define writeb(data, addr) iSeries_Write_Byte((data),(addr)) |
| 64 | #define writew(data, addr) iSeries_Write_Word((data),(addr)) |
| 65 | #define writel(data, addr) iSeries_Write_Long((data),(addr)) |
| 66 | #define memset_io(a,b,c) iSeries_memset_io((a),(b),(c)) |
| 67 | #define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c)) |
| 68 | #define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c)) |
| 69 | |
| 70 | #define inb(addr) readb(((void __iomem *)(long)(addr))) |
| 71 | #define inw(addr) readw(((void __iomem *)(long)(addr))) |
| 72 | #define inl(addr) readl(((void __iomem *)(long)(addr))) |
| 73 | #define outb(data,addr) writeb(data,((void __iomem *)(long)(addr))) |
| 74 | #define outw(data,addr) writew(data,((void __iomem *)(long)(addr))) |
| 75 | #define outl(data,addr) writel(data,((void __iomem *)(long)(addr))) |
| 76 | /* |
| 77 | * The *_ns versions below don't do byte-swapping. |
| 78 | * Neither do the standard versions now, these are just here |
| 79 | * for older code. |
| 80 | */ |
viro@ZenIV.linux.org.uk | 6c9afc6 | 2005-09-09 16:50:43 +0100 | [diff] [blame] | 81 | #define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) |
| 82 | #define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | #else |
| 84 | |
| 85 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
| 86 | { |
| 87 | return *(volatile unsigned char __force *)addr; |
| 88 | } |
| 89 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) |
| 90 | { |
| 91 | return *(volatile unsigned short __force *)addr; |
| 92 | } |
| 93 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) |
| 94 | { |
| 95 | return *(volatile unsigned int __force *)addr; |
| 96 | } |
| 97 | static inline unsigned long __raw_readq(const volatile void __iomem *addr) |
| 98 | { |
| 99 | return *(volatile unsigned long __force *)addr; |
| 100 | } |
| 101 | static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) |
| 102 | { |
| 103 | *(volatile unsigned char __force *)addr = v; |
| 104 | } |
| 105 | static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) |
| 106 | { |
| 107 | *(volatile unsigned short __force *)addr = v; |
| 108 | } |
| 109 | static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) |
| 110 | { |
| 111 | *(volatile unsigned int __force *)addr = v; |
| 112 | } |
| 113 | static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) |
| 114 | { |
| 115 | *(volatile unsigned long __force *)addr = v; |
| 116 | } |
| 117 | #define readb(addr) eeh_readb(addr) |
| 118 | #define readw(addr) eeh_readw(addr) |
| 119 | #define readl(addr) eeh_readl(addr) |
| 120 | #define readq(addr) eeh_readq(addr) |
| 121 | #define writeb(data, addr) eeh_writeb((data), (addr)) |
| 122 | #define writew(data, addr) eeh_writew((data), (addr)) |
| 123 | #define writel(data, addr) eeh_writel((data), (addr)) |
| 124 | #define writeq(data, addr) eeh_writeq((data), (addr)) |
| 125 | #define memset_io(a,b,c) eeh_memset_io((a),(b),(c)) |
| 126 | #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c)) |
| 127 | #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c)) |
| 128 | #define inb(port) eeh_inb((unsigned long)port) |
| 129 | #define outb(val, port) eeh_outb(val, (unsigned long)port) |
| 130 | #define inw(port) eeh_inw((unsigned long)port) |
| 131 | #define outw(val, port) eeh_outw(val, (unsigned long)port) |
| 132 | #define inl(port) eeh_inl((unsigned long)port) |
| 133 | #define outl(val, port) eeh_outl(val, (unsigned long)port) |
| 134 | |
| 135 | /* |
| 136 | * The insw/outsw/insl/outsl macros don't do byte-swapping. |
| 137 | * They are only used in practice for transferring buffers which |
| 138 | * are arrays of bytes, and byte-swapping is not appropriate in |
| 139 | * that case. - paulus */ |
| 140 | #define insb(port, buf, ns) eeh_insb((port), (buf), (ns)) |
| 141 | #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) |
| 142 | #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) |
| 143 | #define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) |
| 144 | #define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) |
| 145 | |
viro@ZenIV.linux.org.uk | 6c9afc6 | 2005-09-09 16:50:43 +0100 | [diff] [blame] | 146 | #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns)) |
| 147 | #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) |
| 148 | #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | |
| 150 | #endif |
| 151 | |
| 152 | #define readb_relaxed(addr) readb(addr) |
| 153 | #define readw_relaxed(addr) readw(addr) |
| 154 | #define readl_relaxed(addr) readl(addr) |
| 155 | #define readq_relaxed(addr) readq(addr) |
| 156 | |
viro@ZenIV.linux.org.uk | 6c9afc6 | 2005-09-09 16:50:43 +0100 | [diff] [blame] | 157 | extern void _insb(volatile u8 __iomem *port, void *buf, int ns); |
| 158 | extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns); |
| 159 | extern void _insw(volatile u16 __iomem *port, void *buf, int ns); |
| 160 | extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns); |
| 161 | extern void _insl(volatile u32 __iomem *port, void *buf, int nl); |
| 162 | extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl); |
| 163 | extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns); |
| 164 | extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns); |
| 165 | extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl); |
| 166 | extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | |
| 168 | #define mmiowb() |
| 169 | |
| 170 | /* |
| 171 | * output pause versions need a delay at least for the |
| 172 | * w83c105 ide controller in a p610. |
| 173 | */ |
| 174 | #define inb_p(port) inb(port) |
| 175 | #define outb_p(val, port) (udelay(1), outb((val), (port))) |
| 176 | #define inw_p(port) inw(port) |
| 177 | #define outw_p(val, port) (udelay(1), outw((val), (port))) |
| 178 | #define inl_p(port) inl(port) |
| 179 | #define outl_p(val, port) (udelay(1), outl((val), (port))) |
| 180 | |
| 181 | /* |
| 182 | * The *_ns versions below don't do byte-swapping. |
| 183 | * Neither do the standard versions now, these are just here |
| 184 | * for older code. |
| 185 | */ |
viro@ZenIV.linux.org.uk | 6c9afc6 | 2005-09-09 16:50:43 +0100 | [diff] [blame] | 186 | #define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) |
| 187 | #define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | |
| 189 | |
| 190 | #define IO_SPACE_LIMIT ~(0UL) |
| 191 | |
| 192 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr, |
| 194 | unsigned long size, unsigned long flags); |
| 195 | extern void __iomem *__ioremap(unsigned long address, unsigned long size, |
| 196 | unsigned long flags); |
| 197 | |
| 198 | /** |
| 199 | * ioremap - map bus memory into CPU space |
| 200 | * @address: bus address of the memory |
| 201 | * @size: size of the resource to map |
| 202 | * |
| 203 | * ioremap performs a platform specific sequence of operations to |
| 204 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ |
| 205 | * writew/writel functions and the other mmio helpers. The returned |
| 206 | * address is not guaranteed to be usable directly as a virtual |
| 207 | * address. |
| 208 | */ |
| 209 | extern void __iomem *ioremap(unsigned long address, unsigned long size); |
| 210 | |
| 211 | #define ioremap_nocache(addr, size) ioremap((addr), (size)) |
| 212 | extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size); |
| 213 | extern void iounmap(volatile void __iomem *addr); |
| 214 | extern void __iomem * reserve_phb_iospace(unsigned long size); |
| 215 | |
| 216 | /** |
| 217 | * virt_to_phys - map virtual addresses to physical |
| 218 | * @address: address to remap |
| 219 | * |
| 220 | * The returned physical address is the physical (CPU) mapping for |
| 221 | * the memory address given. It is only valid to use this function on |
| 222 | * addresses directly mapped or allocated via kmalloc. |
| 223 | * |
| 224 | * This function does not give bus mappings for DMA transfers. In |
| 225 | * almost all conceivable cases a device driver should not be using |
| 226 | * this function |
| 227 | */ |
| 228 | static inline unsigned long virt_to_phys(volatile void * address) |
| 229 | { |
| 230 | return __pa((unsigned long)address); |
| 231 | } |
| 232 | |
| 233 | /** |
| 234 | * phys_to_virt - map physical address to virtual |
| 235 | * @address: address to remap |
| 236 | * |
| 237 | * The returned virtual address is a current CPU mapping for |
| 238 | * the memory address given. It is only valid to use this function on |
| 239 | * addresses that have a kernel mapping |
| 240 | * |
| 241 | * This function does not handle bus mappings for DMA transfers. In |
| 242 | * almost all conceivable cases a device driver should not be using |
| 243 | * this function |
| 244 | */ |
| 245 | static inline void * phys_to_virt(unsigned long address) |
| 246 | { |
| 247 | return (void *)__va(address); |
| 248 | } |
| 249 | |
| 250 | /* |
| 251 | * Change "struct page" to physical address. |
| 252 | */ |
| 253 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) |
| 254 | |
| 255 | /* We do NOT want virtual merging, it would put too much pressure on |
| 256 | * our iommu allocator. Instead, we want drivers to be smart enough |
| 257 | * to coalesce sglists that happen to have been mapped in a contiguous |
| 258 | * way by the iommu |
| 259 | */ |
| 260 | #define BIO_VMERGE_BOUNDARY 0 |
| 261 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | static inline void iosync(void) |
| 263 | { |
| 264 | __asm__ __volatile__ ("sync" : : : "memory"); |
| 265 | } |
| 266 | |
| 267 | /* Enforce in-order execution of data I/O. |
| 268 | * No distinction between read/write on PPC; use eieio for all three. |
| 269 | */ |
| 270 | #define iobarrier_rw() eieio() |
| 271 | #define iobarrier_r() eieio() |
| 272 | #define iobarrier_w() eieio() |
| 273 | |
| 274 | /* |
| 275 | * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. |
| 276 | * These routines do not perform EEH-related I/O address translation, |
| 277 | * and should not be used directly by device drivers. Use inb/readb |
| 278 | * instead. |
| 279 | */ |
| 280 | static inline int in_8(const volatile unsigned char __iomem *addr) |
| 281 | { |
| 282 | int ret; |
| 283 | |
| 284 | __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync" |
| 285 | : "=r" (ret) : "m" (*addr)); |
| 286 | return ret; |
| 287 | } |
| 288 | |
| 289 | static inline void out_8(volatile unsigned char __iomem *addr, int val) |
| 290 | { |
| 291 | __asm__ __volatile__("stb%U0%X0 %1,%0; sync" |
| 292 | : "=m" (*addr) : "r" (val)); |
| 293 | } |
| 294 | |
| 295 | static inline int in_le16(const volatile unsigned short __iomem *addr) |
| 296 | { |
| 297 | int ret; |
| 298 | |
| 299 | __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync" |
| 300 | : "=r" (ret) : "r" (addr), "m" (*addr)); |
| 301 | return ret; |
| 302 | } |
| 303 | |
| 304 | static inline int in_be16(const volatile unsigned short __iomem *addr) |
| 305 | { |
| 306 | int ret; |
| 307 | |
| 308 | __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync" |
| 309 | : "=r" (ret) : "m" (*addr)); |
| 310 | return ret; |
| 311 | } |
| 312 | |
| 313 | static inline void out_le16(volatile unsigned short __iomem *addr, int val) |
| 314 | { |
| 315 | __asm__ __volatile__("sthbrx %1,0,%2; sync" |
| 316 | : "=m" (*addr) : "r" (val), "r" (addr)); |
| 317 | } |
| 318 | |
| 319 | static inline void out_be16(volatile unsigned short __iomem *addr, int val) |
| 320 | { |
| 321 | __asm__ __volatile__("sth%U0%X0 %1,%0; sync" |
| 322 | : "=m" (*addr) : "r" (val)); |
| 323 | } |
| 324 | |
| 325 | static inline unsigned in_le32(const volatile unsigned __iomem *addr) |
| 326 | { |
| 327 | unsigned ret; |
| 328 | |
| 329 | __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync" |
| 330 | : "=r" (ret) : "r" (addr), "m" (*addr)); |
| 331 | return ret; |
| 332 | } |
| 333 | |
| 334 | static inline unsigned in_be32(const volatile unsigned __iomem *addr) |
| 335 | { |
| 336 | unsigned ret; |
| 337 | |
| 338 | __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync" |
| 339 | : "=r" (ret) : "m" (*addr)); |
| 340 | return ret; |
| 341 | } |
| 342 | |
| 343 | static inline void out_le32(volatile unsigned __iomem *addr, int val) |
| 344 | { |
| 345 | __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr) |
| 346 | : "r" (val), "r" (addr)); |
| 347 | } |
| 348 | |
| 349 | static inline void out_be32(volatile unsigned __iomem *addr, int val) |
| 350 | { |
| 351 | __asm__ __volatile__("stw%U0%X0 %1,%0; sync" |
| 352 | : "=m" (*addr) : "r" (val)); |
| 353 | } |
| 354 | |
| 355 | static inline unsigned long in_le64(const volatile unsigned long __iomem *addr) |
| 356 | { |
| 357 | unsigned long tmp, ret; |
| 358 | |
| 359 | __asm__ __volatile__( |
| 360 | "ld %1,0(%2)\n" |
| 361 | "twi 0,%1,0\n" |
| 362 | "isync\n" |
| 363 | "rldimi %0,%1,5*8,1*8\n" |
| 364 | "rldimi %0,%1,3*8,2*8\n" |
| 365 | "rldimi %0,%1,1*8,3*8\n" |
| 366 | "rldimi %0,%1,7*8,4*8\n" |
| 367 | "rldicl %1,%1,32,0\n" |
| 368 | "rlwimi %0,%1,8,8,31\n" |
| 369 | "rlwimi %0,%1,24,16,23\n" |
| 370 | : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr)); |
| 371 | return ret; |
| 372 | } |
| 373 | |
| 374 | static inline unsigned long in_be64(const volatile unsigned long __iomem *addr) |
| 375 | { |
| 376 | unsigned long ret; |
| 377 | |
| 378 | __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync" |
| 379 | : "=r" (ret) : "m" (*addr)); |
| 380 | return ret; |
| 381 | } |
| 382 | |
| 383 | static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val) |
| 384 | { |
| 385 | unsigned long tmp; |
| 386 | |
| 387 | __asm__ __volatile__( |
| 388 | "rldimi %0,%1,5*8,1*8\n" |
| 389 | "rldimi %0,%1,3*8,2*8\n" |
| 390 | "rldimi %0,%1,1*8,3*8\n" |
| 391 | "rldimi %0,%1,7*8,4*8\n" |
| 392 | "rldicl %1,%1,32,0\n" |
| 393 | "rlwimi %0,%1,8,8,31\n" |
| 394 | "rlwimi %0,%1,24,16,23\n" |
| 395 | "std %0,0(%3)\n" |
| 396 | "sync" |
| 397 | : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr)); |
| 398 | } |
| 399 | |
| 400 | static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val) |
| 401 | { |
| 402 | __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val)); |
| 403 | } |
| 404 | |
| 405 | #ifndef CONFIG_PPC_ISERIES |
| 406 | #include <asm/eeh.h> |
| 407 | #endif |
| 408 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | /** |
| 410 | * check_signature - find BIOS signatures |
| 411 | * @io_addr: mmio address to check |
| 412 | * @signature: signature block |
| 413 | * @length: length of signature |
| 414 | * |
| 415 | * Perform a signature comparison with the mmio address io_addr. This |
| 416 | * address should have been obtained by ioremap. |
| 417 | * Returns 1 on a match. |
| 418 | */ |
| 419 | static inline int check_signature(const volatile void __iomem * io_addr, |
| 420 | const unsigned char *signature, int length) |
| 421 | { |
| 422 | int retval = 0; |
| 423 | #ifndef CONFIG_PPC_ISERIES |
| 424 | do { |
| 425 | if (readb(io_addr) != *signature) |
| 426 | goto out; |
| 427 | io_addr++; |
| 428 | signature++; |
| 429 | length--; |
| 430 | } while (length); |
| 431 | retval = 1; |
| 432 | out: |
| 433 | #endif |
| 434 | return retval; |
| 435 | } |
| 436 | |
| 437 | /* Nothing to do */ |
| 438 | |
| 439 | #define dma_cache_inv(_start,_size) do { } while (0) |
| 440 | #define dma_cache_wback(_start,_size) do { } while (0) |
| 441 | #define dma_cache_wback_inv(_start,_size) do { } while (0) |
| 442 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | |
| 444 | /* |
| 445 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
| 446 | * access |
| 447 | */ |
| 448 | #define xlate_dev_mem_ptr(p) __va(p) |
| 449 | |
| 450 | /* |
| 451 | * Convert a virtual cached pointer to an uncached pointer |
| 452 | */ |
| 453 | #define xlate_dev_kmem_ptr(p) p |
| 454 | |
| 455 | #endif /* __KERNEL__ */ |
| 456 | |
Paul Mackerras | 047ea78 | 2005-11-19 20:17:32 +1100 | [diff] [blame] | 457 | #endif /* CONFIG_PPC64 */ |
| 458 | #endif /* _ASM_POWERPC_IO_H */ |