Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * MPC85xx ADS board common routines |
| 3 | * |
Kumar Gala | 4c8d3d9 | 2005-11-13 16:06:30 -0800 | [diff] [blame] | 4 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Copyright 2004 Freescale Semiconductor Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | */ |
| 13 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/stddef.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <linux/reboot.h> |
| 19 | #include <linux/pci.h> |
| 20 | #include <linux/kdev_t.h> |
| 21 | #include <linux/major.h> |
| 22 | #include <linux/console.h> |
| 23 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/seq_file.h> |
| 25 | #include <linux/serial.h> |
| 26 | #include <linux/module.h> |
| 27 | |
| 28 | #include <asm/system.h> |
| 29 | #include <asm/pgtable.h> |
| 30 | #include <asm/page.h> |
| 31 | #include <asm/atomic.h> |
| 32 | #include <asm/time.h> |
| 33 | #include <asm/io.h> |
| 34 | #include <asm/machdep.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <asm/open_pic.h> |
| 36 | #include <asm/bootinfo.h> |
| 37 | #include <asm/pci-bridge.h> |
| 38 | #include <asm/mpc85xx.h> |
| 39 | #include <asm/irq.h> |
| 40 | #include <asm/immap_85xx.h> |
| 41 | #include <asm/ppc_sys.h> |
| 42 | |
| 43 | #include <mm/mmu_decl.h> |
| 44 | |
| 45 | #include <platforms/85xx/mpc85xx_ads_common.h> |
| 46 | |
| 47 | #ifndef CONFIG_PCI |
| 48 | unsigned long isa_io_base = 0; |
| 49 | unsigned long isa_mem_base = 0; |
| 50 | #endif |
| 51 | |
| 52 | extern unsigned long total_memory; /* in mm/init */ |
| 53 | |
| 54 | unsigned char __res[sizeof (bd_t)]; |
| 55 | |
| 56 | /* Internal interrupts are all Level Sensitive, and Positive Polarity */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | static u_char mpc85xx_ads_openpic_initsenses[] __initdata = { |
Kumar Gala | 65145e0 | 2005-06-21 17:15:25 -0700 | [diff] [blame] | 58 | MPC85XX_INTERNAL_IRQ_SENSES, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | 0x0, /* External 0: */ |
| 60 | #if defined(CONFIG_PCI) |
| 61 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 1: PCI slot 0 */ |
| 62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 1 */ |
| 63 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 2 */ |
| 64 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 3 */ |
| 65 | #else |
| 66 | 0x0, /* External 1: */ |
| 67 | 0x0, /* External 2: */ |
| 68 | 0x0, /* External 3: */ |
| 69 | 0x0, /* External 4: */ |
| 70 | #endif |
| 71 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ |
| 72 | 0x0, /* External 6: */ |
| 73 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */ |
| 74 | 0x0, /* External 8: */ |
| 75 | 0x0, /* External 9: */ |
| 76 | 0x0, /* External 10: */ |
| 77 | 0x0, /* External 11: */ |
| 78 | }; |
| 79 | |
| 80 | /* ************************************************************************ */ |
| 81 | int |
| 82 | mpc85xx_ads_show_cpuinfo(struct seq_file *m) |
| 83 | { |
| 84 | uint pvid, svid, phid1; |
| 85 | uint memsize = total_memory; |
| 86 | bd_t *binfo = (bd_t *) __res; |
| 87 | unsigned int freq; |
| 88 | |
| 89 | /* get the core frequency */ |
| 90 | freq = binfo->bi_intfreq; |
| 91 | |
| 92 | pvid = mfspr(SPRN_PVR); |
| 93 | svid = mfspr(SPRN_SVR); |
| 94 | |
| 95 | seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n"); |
| 96 | seq_printf(m, "Machine\t\t: mpc%sads\n", cur_ppc_sys_spec->ppc_sys_name); |
| 97 | seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000); |
| 98 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); |
| 99 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); |
| 100 | |
| 101 | /* Display cpu Pll setting */ |
| 102 | phid1 = mfspr(SPRN_HID1); |
| 103 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); |
| 104 | |
| 105 | /* Display the amount of memory */ |
| 106 | seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); |
| 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | void __init |
| 112 | mpc85xx_ads_init_IRQ(void) |
| 113 | { |
| 114 | bd_t *binfo = (bd_t *) __res; |
| 115 | /* Determine the Physical Address of the OpenPIC regs */ |
| 116 | phys_addr_t OpenPIC_PAddr = |
| 117 | binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; |
| 118 | OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE); |
| 119 | OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses; |
| 120 | OpenPIC_NumInitSenses = sizeof (mpc85xx_ads_openpic_initsenses); |
| 121 | |
| 122 | /* Skip reserved space and internal sources */ |
| 123 | openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200); |
| 124 | /* Map PIC IRQs 0-11 */ |
Kumar Gala | 65145e0 | 2005-06-21 17:15:25 -0700 | [diff] [blame] | 125 | openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | |
| 127 | /* we let openpic interrupts starting from an offset, to |
| 128 | * leave space for cascading interrupts underneath. |
| 129 | */ |
| 130 | openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET); |
| 131 | |
| 132 | return; |
| 133 | } |
| 134 | |
| 135 | #ifdef CONFIG_PCI |
| 136 | /* |
| 137 | * interrupt routing |
| 138 | */ |
| 139 | |
| 140 | int |
| 141 | mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) |
| 142 | { |
| 143 | static char pci_irq_table[][4] = |
| 144 | /* |
| 145 | * This is little evil, but works around the fact |
| 146 | * that revA boards have IDSEL starting at 18 |
| 147 | * and others boards (older) start at 12 |
| 148 | * |
| 149 | * PCI IDSEL/INTPIN->INTLINE |
| 150 | * A B C D |
| 151 | */ |
| 152 | { |
| 153 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */ |
| 154 | {PIRQD, PIRQA, PIRQB, PIRQC}, |
| 155 | {PIRQC, PIRQD, PIRQA, PIRQB}, |
| 156 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */ |
| 157 | {0, 0, 0, 0}, /* -- */ |
| 158 | {0, 0, 0, 0}, /* -- */ |
| 159 | {0, 0, 0, 0}, /* -- */ |
| 160 | {0, 0, 0, 0}, /* -- */ |
| 161 | {0, 0, 0, 0}, /* -- */ |
| 162 | {0, 0, 0, 0}, /* -- */ |
| 163 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */ |
| 164 | {PIRQD, PIRQA, PIRQB, PIRQC}, |
| 165 | {PIRQC, PIRQD, PIRQA, PIRQB}, |
| 166 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */ |
| 167 | {0, 0, 0, 0}, /* -- */ |
| 168 | {0, 0, 0, 0}, /* -- */ |
| 169 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */ |
| 170 | {PIRQD, PIRQA, PIRQB, PIRQC}, |
| 171 | {PIRQC, PIRQD, PIRQA, PIRQB}, |
| 172 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */ |
| 173 | }; |
| 174 | |
| 175 | const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4; |
| 176 | return PCI_IRQ_TABLE_LOOKUP; |
| 177 | } |
| 178 | |
| 179 | int |
| 180 | mpc85xx_exclude_device(u_char bus, u_char devfn) |
| 181 | { |
| 182 | if (bus == 0 && PCI_SLOT(devfn) == 0) |
| 183 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 184 | else |
| 185 | return PCIBIOS_SUCCESSFUL; |
| 186 | } |
| 187 | |
| 188 | #endif /* CONFIG_PCI */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 189 | |
| 190 | #ifdef CONFIG_RAPIDIO |
Kumar Gala | de3c8d4 | 2008-01-23 06:12:06 -0600 | [diff] [blame] | 191 | extern void mpc85xx_rio_setup(int law_start, int law_size); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 192 | void platform_rio_init(void) |
| 193 | { |
| 194 | /* 512MB RIO LAW at 0xc0000000 */ |
| 195 | mpc85xx_rio_setup(0xc0000000, 0x20000000); |
| 196 | } |
| 197 | #endif /* CONFIG_RAPIDIO */ |