David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 15 | |
| 16 | #include <linux/cpu_pm.h> |
| 17 | #include <linux/debugfs.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/of.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/string.h> |
| 26 | #include <linux/of_address.h> |
| 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/regulator/driver.h> |
| 29 | #include <linux/regulator/machine.h> |
| 30 | #include <linux/regulator/of_regulator.h> |
| 31 | #include <linux/regulator/msm-ldo-regulator.h> |
| 32 | |
| 33 | #include <soc/qcom/spm.h> |
| 34 | |
| 35 | #define KRYO_REGULATOR_DRIVER_NAME "kryo-regulator" |
| 36 | |
| 37 | #define kvreg_err(kvreg, message, ...) \ |
| 38 | pr_err("%s: " message, (kvreg)->name, ##__VA_ARGS__) |
| 39 | #define kvreg_info(kvreg, message, ...) \ |
| 40 | pr_info("%s: " message, (kvreg)->name, ##__VA_ARGS__) |
| 41 | #define kvreg_debug(kvreg, message, ...) \ |
| 42 | pr_debug("%s: " message, (kvreg)->name, ##__VA_ARGS__) |
| 43 | |
| 44 | /* CPUSS power domain register offsets */ |
| 45 | #define APCC_PWR_CTL_OVERRIDE 0x38 |
| 46 | #define APCC_PGS_RET_STATUS 0xe0 |
| 47 | |
| 48 | /* APCS CSR register offsets */ |
| 49 | #define APCS_VERSION 0xfd0 |
| 50 | |
| 51 | /* Cluster power domain register offsets */ |
| 52 | #define APC_LDO_VREF_SET 0x08 |
| 53 | #define APC_RET_VREF_SET 0x10 |
| 54 | #define APC_PWR_GATE_MODE 0x18 |
| 55 | #define APC_PWR_GATE_DLY 0x28 |
| 56 | #define APC_LDO_CFG 0x40 |
| 57 | #define APC_APM_CFG 0x50 |
| 58 | #define APC_PGSCTL_STS 0x60 |
| 59 | |
| 60 | /* Register bit mask definitions*/ |
| 61 | #define PWR_GATE_SWITCH_MODE_MASK GENMASK(0, 0) |
| 62 | #define VREF_MASK GENMASK(6, 0) |
| 63 | #define APM_CFG_MASK GENMASK(7, 0) |
| 64 | #define FSM_CUR_STATE_MASK GENMASK(5, 4) |
| 65 | #define APC_PWR_GATE_DLY_MASK GENMASK(11, 0) |
| 66 | #define APCC_PGS_MASK(cluster) (0x7 << (0x3 * (cluster))) |
| 67 | |
| 68 | /* Register bit definitions */ |
| 69 | #define VREF_BIT_POS 0 |
| 70 | |
| 71 | /* Maximum delay to wait before declaring a Power Gate Switch timed out */ |
| 72 | #define PWR_GATE_SWITCH_TIMEOUT_US 5 |
| 73 | |
| 74 | #define PWR_GATE_SWITCH_MODE_LDO 0 |
| 75 | #define PWR_GATE_SWITCH_MODE_BHS 1 |
| 76 | #define MSM8996_CPUSS_VER_1P1 0x10010000 |
| 77 | |
| 78 | #define LDO_N_VOLTAGES 0x80 |
| 79 | #define AFFINITY_LEVEL_M3 2 |
| 80 | #define SHARED_CPU_REG_NUM 0 |
| 81 | #define VDD_SUPPLY_STEP_UV 5000 |
| 82 | #define VDD_SUPPLY_MIN_UV 80000 |
| 83 | |
| 84 | struct kryo_regulator { |
| 85 | struct list_head link; |
| 86 | spinlock_t slock; |
| 87 | struct regulator_desc desc; |
| 88 | struct regulator_dev *rdev; |
| 89 | struct regulator_dev *retention_rdev; |
| 90 | struct regulator_desc retention_desc; |
| 91 | const char *name; |
| 92 | enum msm_ldo_supply_mode mode; |
| 93 | enum msm_ldo_supply_mode retention_mode; |
| 94 | enum msm_ldo_supply_mode pre_lpm_state_mode; |
| 95 | void __iomem *reg_base; |
| 96 | void __iomem *pm_apcc_base; |
| 97 | struct dentry *debugfs; |
| 98 | struct notifier_block cpu_pm_notifier; |
| 99 | unsigned long lpm_enter_count; |
| 100 | unsigned long lpm_exit_count; |
| 101 | int volt; |
| 102 | int retention_volt; |
| 103 | int headroom_volt; |
| 104 | int pre_lpm_state_volt; |
| 105 | int vref_func_step_volt; |
| 106 | int vref_func_min_volt; |
| 107 | int vref_func_max_volt; |
| 108 | int vref_ret_step_volt; |
| 109 | int vref_ret_min_volt; |
| 110 | int vref_ret_max_volt; |
| 111 | int cluster_num; |
| 112 | u32 ldo_config_init; |
| 113 | u32 apm_config_init; |
| 114 | u32 version; |
| 115 | bool vreg_en; |
| 116 | }; |
| 117 | |
| 118 | static struct dentry *kryo_debugfs_base; |
| 119 | static DEFINE_MUTEX(kryo_regulator_list_mutex); |
| 120 | static LIST_HEAD(kryo_regulator_list); |
| 121 | |
| 122 | static bool is_between(int left, int right, int value) |
| 123 | { |
| 124 | if (left >= right && left >= value && value >= right) |
| 125 | return true; |
| 126 | if (left <= right && left <= value && value <= right) |
| 127 | return true; |
| 128 | |
| 129 | return false; |
| 130 | } |
| 131 | |
| 132 | static void kryo_masked_write(struct kryo_regulator *kvreg, |
| 133 | int reg, u32 mask, u32 val) |
| 134 | { |
| 135 | u32 reg_val; |
| 136 | |
| 137 | reg_val = readl_relaxed(kvreg->reg_base + reg); |
| 138 | reg_val &= ~mask; |
| 139 | reg_val |= (val & mask); |
| 140 | |
| 141 | writel_relaxed(reg_val, kvreg->reg_base + reg); |
| 142 | |
| 143 | /* Ensure write above completes */ |
| 144 | mb(); |
| 145 | } |
| 146 | |
| 147 | static inline void kryo_pm_apcc_masked_write(struct kryo_regulator *kvreg, |
| 148 | int reg, u32 mask, u32 val) |
| 149 | { |
| 150 | u32 reg_val, orig_val; |
| 151 | |
| 152 | reg_val = orig_val = readl_relaxed(kvreg->pm_apcc_base + reg); |
| 153 | reg_val &= ~mask; |
| 154 | reg_val |= (val & mask); |
| 155 | |
| 156 | if (reg_val != orig_val) { |
| 157 | writel_relaxed(reg_val, kvreg->pm_apcc_base + reg); |
| 158 | |
| 159 | /* Ensure write above completes */ |
| 160 | mb(); |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | static inline int kryo_decode_retention_volt(struct kryo_regulator *kvreg, |
| 165 | int reg) |
| 166 | { |
| 167 | return kvreg->vref_ret_min_volt + reg * kvreg->vref_ret_step_volt; |
| 168 | } |
| 169 | |
| 170 | static inline int kryo_encode_retention_volt(struct kryo_regulator *kvreg, |
| 171 | int volt) |
| 172 | { |
| 173 | int encoded_volt = DIV_ROUND_UP(volt - kvreg->vref_ret_min_volt, |
| 174 | kvreg->vref_ret_step_volt); |
| 175 | |
| 176 | if (encoded_volt >= LDO_N_VOLTAGES || encoded_volt < 0) |
| 177 | return -EINVAL; |
| 178 | else |
| 179 | return encoded_volt; |
| 180 | } |
| 181 | |
| 182 | static inline int kryo_decode_functional_volt(struct kryo_regulator *kvreg, |
| 183 | int reg) |
| 184 | { |
| 185 | return kvreg->vref_func_min_volt + reg * kvreg->vref_func_step_volt; |
| 186 | } |
| 187 | |
| 188 | static inline int kryo_encode_functional_volt(struct kryo_regulator *kvreg, |
| 189 | int volt) |
| 190 | { |
| 191 | int encoded_volt = DIV_ROUND_UP(volt - kvreg->vref_func_min_volt, |
| 192 | kvreg->vref_func_step_volt); |
| 193 | |
| 194 | if (encoded_volt >= LDO_N_VOLTAGES || encoded_volt < 0) |
| 195 | return -EINVAL; |
| 196 | else |
| 197 | return encoded_volt; |
| 198 | } |
| 199 | |
| 200 | /* Locks must be held by the caller */ |
| 201 | static int kryo_set_retention_volt(struct kryo_regulator *kvreg, int volt) |
| 202 | { |
| 203 | int reg_val; |
| 204 | |
| 205 | reg_val = kryo_encode_retention_volt(kvreg, volt); |
| 206 | if (reg_val < 0) { |
| 207 | kvreg_err(kvreg, "unsupported LDO retention voltage, rc=%d\n", |
| 208 | reg_val); |
| 209 | return reg_val; |
| 210 | } |
| 211 | |
| 212 | kryo_masked_write(kvreg, APC_RET_VREF_SET, VREF_MASK, |
| 213 | reg_val << VREF_BIT_POS); |
| 214 | |
| 215 | kvreg->retention_volt = kryo_decode_retention_volt(kvreg, reg_val); |
| 216 | kvreg_debug(kvreg, "Set LDO retention voltage=%d uV (0x%x)\n", |
| 217 | kvreg->retention_volt, reg_val); |
| 218 | |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | /* Locks must be held by the caller */ |
| 223 | static int kryo_set_ldo_volt(struct kryo_regulator *kvreg, int volt) |
| 224 | { |
| 225 | int reg_val; |
| 226 | |
| 227 | /* |
| 228 | * Assume the consumer ensures the requested voltage satisfies the |
| 229 | * headroom and adjustment voltage requirements. The value may be |
| 230 | * rounded up if necessary, to match the LDO resolution. Configure it. |
| 231 | */ |
| 232 | reg_val = kryo_encode_functional_volt(kvreg, volt); |
| 233 | if (reg_val < 0) { |
| 234 | kvreg_err(kvreg, "unsupported LDO functional voltage, rc=%d\n", |
| 235 | reg_val); |
| 236 | return reg_val; |
| 237 | } |
| 238 | |
| 239 | kryo_masked_write(kvreg, APC_LDO_VREF_SET, VREF_MASK, |
| 240 | reg_val << VREF_BIT_POS); |
| 241 | |
| 242 | kvreg->volt = kryo_decode_functional_volt(kvreg, reg_val); |
| 243 | kvreg_debug(kvreg, "Set LDO voltage=%d uV (0x%x)\n", |
| 244 | kvreg->volt, reg_val); |
| 245 | |
| 246 | return 0; |
| 247 | } |
| 248 | |
| 249 | /* Locks must be held by the caller */ |
| 250 | static int kryo_configure_mode(struct kryo_regulator *kvreg, |
| 251 | enum msm_ldo_supply_mode mode) |
| 252 | { |
| 253 | u32 reg; |
| 254 | int timeout = PWR_GATE_SWITCH_TIMEOUT_US; |
| 255 | |
| 256 | /* Configure LDO or BHS mode */ |
| 257 | kryo_masked_write(kvreg, APC_PWR_GATE_MODE, PWR_GATE_SWITCH_MODE_MASK, |
| 258 | mode == LDO_MODE ? PWR_GATE_SWITCH_MODE_LDO |
| 259 | : PWR_GATE_SWITCH_MODE_BHS); |
| 260 | |
| 261 | /* Complete register write before reading HW status register */ |
| 262 | mb(); |
| 263 | |
| 264 | /* Delay to allow Power Gate Switch FSM to reach idle state */ |
| 265 | while (timeout > 0) { |
| 266 | reg = readl_relaxed(kvreg->reg_base + APC_PGSCTL_STS); |
| 267 | if (!(reg & FSM_CUR_STATE_MASK)) |
| 268 | break; |
| 269 | |
| 270 | udelay(1); |
| 271 | timeout--; |
| 272 | } |
| 273 | |
| 274 | if (timeout == 0) { |
| 275 | kvreg_err(kvreg, "PGS switch to %s failed. APC_PGSCTL_STS=0x%x\n", |
| 276 | mode == LDO_MODE ? "LDO" : "BHS", reg); |
| 277 | return -ETIMEDOUT; |
| 278 | } |
| 279 | |
| 280 | kvreg->mode = mode; |
| 281 | kvreg_debug(kvreg, "using %s mode\n", mode == LDO_MODE ? "LDO" : "BHS"); |
| 282 | |
| 283 | return 0; |
| 284 | } |
| 285 | |
| 286 | static int kryo_regulator_enable(struct regulator_dev *rdev) |
| 287 | { |
| 288 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 289 | int rc; |
| 290 | unsigned long flags; |
| 291 | |
| 292 | if (kvreg->vreg_en == true) |
| 293 | return 0; |
| 294 | |
| 295 | spin_lock_irqsave(&kvreg->slock, flags); |
| 296 | rc = kryo_set_ldo_volt(kvreg, kvreg->volt); |
| 297 | if (rc) { |
| 298 | kvreg_err(kvreg, "set voltage failed, rc=%d\n", rc); |
| 299 | goto done; |
| 300 | } |
| 301 | |
| 302 | kvreg->vreg_en = true; |
| 303 | kvreg_debug(kvreg, "enabled\n"); |
| 304 | |
| 305 | done: |
| 306 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 307 | |
| 308 | return rc; |
| 309 | } |
| 310 | |
| 311 | static int kryo_regulator_disable(struct regulator_dev *rdev) |
| 312 | { |
| 313 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 314 | int rc; |
| 315 | unsigned long flags; |
| 316 | |
| 317 | if (kvreg->vreg_en == false) |
| 318 | return 0; |
| 319 | |
| 320 | spin_lock_irqsave(&kvreg->slock, flags); |
| 321 | kvreg->vreg_en = false; |
| 322 | kvreg_debug(kvreg, "disabled\n"); |
| 323 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 324 | |
| 325 | return rc; |
| 326 | } |
| 327 | |
| 328 | static int kryo_regulator_is_enabled(struct regulator_dev *rdev) |
| 329 | { |
| 330 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 331 | |
| 332 | return kvreg->vreg_en; |
| 333 | } |
| 334 | |
| 335 | static int kryo_regulator_set_voltage(struct regulator_dev *rdev, |
| 336 | int min_volt, int max_volt, unsigned int *selector) |
| 337 | { |
| 338 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 339 | int rc; |
| 340 | unsigned long flags; |
| 341 | |
| 342 | spin_lock_irqsave(&kvreg->slock, flags); |
| 343 | |
| 344 | if (!kvreg->vreg_en) { |
| 345 | kvreg->volt = min_volt; |
| 346 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 347 | return 0; |
| 348 | } |
| 349 | |
| 350 | rc = kryo_set_ldo_volt(kvreg, min_volt); |
| 351 | if (rc) |
| 352 | kvreg_err(kvreg, "set voltage failed, rc=%d\n", rc); |
| 353 | |
| 354 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 355 | |
| 356 | return rc; |
| 357 | } |
| 358 | |
| 359 | static int kryo_regulator_get_voltage(struct regulator_dev *rdev) |
| 360 | { |
| 361 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 362 | |
| 363 | return kvreg->volt; |
| 364 | } |
| 365 | |
| 366 | static int kryo_regulator_set_bypass(struct regulator_dev *rdev, |
| 367 | bool enable) |
| 368 | { |
| 369 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 370 | int rc; |
| 371 | unsigned long flags; |
| 372 | |
| 373 | spin_lock_irqsave(&kvreg->slock, flags); |
| 374 | |
| 375 | /* |
| 376 | * LDO Vref voltage must be programmed before switching |
| 377 | * modes to ensure stable operation. |
| 378 | */ |
| 379 | rc = kryo_set_ldo_volt(kvreg, kvreg->volt); |
| 380 | if (rc) |
| 381 | kvreg_err(kvreg, "set voltage failed, rc=%d\n", rc); |
| 382 | |
| 383 | rc = kryo_configure_mode(kvreg, enable); |
| 384 | if (rc) |
| 385 | kvreg_err(kvreg, "could not configure to %s mode\n", |
| 386 | enable == LDO_MODE ? "LDO" : "BHS"); |
| 387 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 388 | |
| 389 | return rc; |
| 390 | } |
| 391 | |
| 392 | static int kryo_regulator_get_bypass(struct regulator_dev *rdev, |
| 393 | bool *enable) |
| 394 | { |
| 395 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 396 | |
| 397 | *enable = kvreg->mode; |
| 398 | |
| 399 | return 0; |
| 400 | } |
| 401 | |
| 402 | static int kryo_regulator_list_voltage(struct regulator_dev *rdev, |
| 403 | unsigned int selector) |
| 404 | { |
| 405 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 406 | |
| 407 | if (selector < kvreg->desc.n_voltages) |
| 408 | return kryo_decode_functional_volt(kvreg, selector); |
| 409 | else |
| 410 | return 0; |
| 411 | } |
| 412 | |
| 413 | static int kryo_regulator_retention_set_voltage(struct regulator_dev *rdev, |
| 414 | int min_volt, int max_volt, unsigned int *selector) |
| 415 | { |
| 416 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 417 | int rc; |
| 418 | unsigned long flags; |
| 419 | |
| 420 | spin_lock_irqsave(&kvreg->slock, flags); |
| 421 | rc = kryo_set_retention_volt(kvreg, min_volt); |
| 422 | if (rc) |
| 423 | kvreg_err(kvreg, "set voltage failed, rc=%d\n", rc); |
| 424 | |
| 425 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 426 | |
| 427 | return rc; |
| 428 | } |
| 429 | |
| 430 | static int kryo_regulator_retention_get_voltage(struct regulator_dev *rdev) |
| 431 | { |
| 432 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 433 | |
| 434 | return kvreg->retention_volt; |
| 435 | } |
| 436 | |
| 437 | static int kryo_regulator_retention_set_bypass(struct regulator_dev *rdev, |
| 438 | bool enable) |
| 439 | { |
| 440 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 441 | int timeout = PWR_GATE_SWITCH_TIMEOUT_US; |
| 442 | int rc = 0; |
| 443 | u32 reg_val; |
| 444 | unsigned long flags; |
| 445 | |
| 446 | spin_lock_irqsave(&kvreg->slock, flags); |
| 447 | |
| 448 | kryo_pm_apcc_masked_write(kvreg, |
| 449 | APCC_PWR_CTL_OVERRIDE, |
| 450 | APCC_PGS_MASK(kvreg->cluster_num), |
| 451 | enable ? |
| 452 | 0 : APCC_PGS_MASK(kvreg->cluster_num)); |
| 453 | |
| 454 | /* Ensure write above completes before proceeding */ |
| 455 | mb(); |
| 456 | |
| 457 | if (enable == BHS_MODE && kvreg->version < MSM8996_CPUSS_VER_1P1) { |
| 458 | /* No status register, delay worst case */ |
| 459 | udelay(PWR_GATE_SWITCH_TIMEOUT_US); |
| 460 | } else if (enable == BHS_MODE) { |
| 461 | while (timeout > 0) { |
| 462 | reg_val = readl_relaxed(kvreg->pm_apcc_base |
| 463 | + APCC_PGS_RET_STATUS); |
| 464 | if (!(reg_val & APCC_PGS_MASK(kvreg->cluster_num))) |
| 465 | break; |
| 466 | |
| 467 | udelay(1); |
| 468 | timeout--; |
| 469 | } |
| 470 | |
| 471 | if (timeout == 0) { |
| 472 | kvreg_err(kvreg, "PGS switch timed out. APCC_PGS_RET_STATUS=0x%x\n", |
| 473 | reg_val); |
| 474 | rc = -ETIMEDOUT; |
| 475 | goto done; |
| 476 | } |
| 477 | } |
| 478 | |
| 479 | /* Bypassed LDO retention operation == disallow LDO retention */ |
| 480 | kvreg_debug(kvreg, "%s LDO retention\n", |
| 481 | enable ? "enabled" : "disabled"); |
| 482 | kvreg->retention_mode = enable == LDO_MODE ? LDO_MODE |
| 483 | : BHS_MODE; |
| 484 | |
| 485 | done: |
| 486 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 487 | |
| 488 | return rc; |
| 489 | } |
| 490 | |
| 491 | static int kryo_regulator_retention_get_bypass(struct regulator_dev *rdev, |
| 492 | bool *enable) |
| 493 | { |
| 494 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 495 | |
| 496 | *enable = kvreg->retention_mode; |
| 497 | |
| 498 | return 0; |
| 499 | } |
| 500 | |
| 501 | static int kryo_regulator_retention_list_voltage(struct regulator_dev *rdev, |
| 502 | unsigned int selector) |
| 503 | { |
| 504 | struct kryo_regulator *kvreg = rdev_get_drvdata(rdev); |
| 505 | |
| 506 | if (selector < kvreg->retention_desc.n_voltages) |
| 507 | return kryo_decode_retention_volt(kvreg, selector); |
| 508 | else |
| 509 | return 0; |
| 510 | } |
| 511 | |
| 512 | static struct regulator_ops kryo_regulator_ops = { |
| 513 | .enable = kryo_regulator_enable, |
| 514 | .disable = kryo_regulator_disable, |
| 515 | .is_enabled = kryo_regulator_is_enabled, |
| 516 | .set_voltage = kryo_regulator_set_voltage, |
| 517 | .get_voltage = kryo_regulator_get_voltage, |
| 518 | .set_bypass = kryo_regulator_set_bypass, |
| 519 | .get_bypass = kryo_regulator_get_bypass, |
| 520 | .list_voltage = kryo_regulator_list_voltage, |
| 521 | }; |
| 522 | |
| 523 | static struct regulator_ops kryo_regulator_retention_ops = { |
| 524 | .set_voltage = kryo_regulator_retention_set_voltage, |
| 525 | .get_voltage = kryo_regulator_retention_get_voltage, |
| 526 | .set_bypass = kryo_regulator_retention_set_bypass, |
| 527 | .get_bypass = kryo_regulator_retention_get_bypass, |
| 528 | .list_voltage = kryo_regulator_retention_list_voltage, |
| 529 | }; |
| 530 | |
| 531 | static void kryo_ldo_voltage_init(struct kryo_regulator *kvreg) |
| 532 | { |
| 533 | kryo_set_retention_volt(kvreg, kvreg->retention_volt); |
| 534 | kryo_set_ldo_volt(kvreg, kvreg->volt); |
| 535 | } |
| 536 | |
| 537 | #define APC_PWR_GATE_DLY_INIT 0x00000101 |
| 538 | static int kryo_hw_init(struct kryo_regulator *kvreg) |
| 539 | { |
| 540 | /* Set up VREF_LDO and VREF_RET */ |
| 541 | kryo_ldo_voltage_init(kvreg); |
| 542 | |
| 543 | /* Program LDO and APM configuration registers */ |
| 544 | writel_relaxed(kvreg->ldo_config_init, kvreg->reg_base + APC_LDO_CFG); |
| 545 | |
| 546 | kryo_masked_write(kvreg, APC_APM_CFG, APM_CFG_MASK, |
| 547 | kvreg->apm_config_init); |
| 548 | |
| 549 | /* Configure power gate sequencer delay */ |
| 550 | kryo_masked_write(kvreg, APC_PWR_GATE_DLY, APC_PWR_GATE_DLY_MASK, |
| 551 | APC_PWR_GATE_DLY_INIT); |
| 552 | |
| 553 | /* Allow LDO retention mode only when it's safe to do so */ |
| 554 | kryo_pm_apcc_masked_write(kvreg, |
| 555 | APCC_PWR_CTL_OVERRIDE, |
| 556 | APCC_PGS_MASK(kvreg->cluster_num), |
| 557 | APCC_PGS_MASK(kvreg->cluster_num)); |
| 558 | |
| 559 | /* Complete the above writes before other accesses */ |
| 560 | mb(); |
| 561 | |
| 562 | return 0; |
| 563 | } |
| 564 | |
| 565 | static ssize_t kryo_dbg_mode_read(struct file *file, char __user *buff, |
| 566 | size_t count, loff_t *ppos) |
| 567 | { |
| 568 | struct kryo_regulator *kvreg = file->private_data; |
| 569 | char buf[10]; |
| 570 | int len = 0; |
| 571 | u32 reg_val; |
| 572 | unsigned long flags; |
| 573 | |
| 574 | if (!kvreg) |
| 575 | return -ENODEV; |
| 576 | |
| 577 | /* Confirm HW state matches Kryo regulator device state */ |
| 578 | spin_lock_irqsave(&kvreg->slock, flags); |
| 579 | reg_val = readl_relaxed(kvreg->reg_base + APC_PWR_GATE_MODE); |
| 580 | if (((reg_val & PWR_GATE_SWITCH_MODE_MASK) == PWR_GATE_SWITCH_MODE_LDO |
| 581 | && kvreg->mode != LDO_MODE) || |
| 582 | ((reg_val & PWR_GATE_SWITCH_MODE_MASK) == PWR_GATE_SWITCH_MODE_BHS |
| 583 | && kvreg->mode != BHS_MODE)) { |
| 584 | kvreg_err(kvreg, "HW state disagrees on PWR gate mode! reg=0x%x\n", |
| 585 | reg_val); |
| 586 | len = snprintf(buf, sizeof(buf), "ERR\n"); |
| 587 | } else { |
| 588 | len = snprintf(buf, sizeof(buf), "%s\n", |
| 589 | kvreg->mode == LDO_MODE ? |
| 590 | "LDO" : "BHS"); |
| 591 | } |
| 592 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 593 | |
| 594 | return simple_read_from_buffer(buff, count, ppos, buf, len); |
| 595 | } |
| 596 | |
| 597 | static int kryo_dbg_base_open(struct inode *inode, struct file *file) |
| 598 | { |
| 599 | file->private_data = inode->i_private; |
| 600 | return 0; |
| 601 | } |
| 602 | |
| 603 | static const struct file_operations kryo_dbg_mode_fops = { |
| 604 | .open = kryo_dbg_base_open, |
| 605 | .read = kryo_dbg_mode_read, |
| 606 | }; |
| 607 | |
| 608 | static void kryo_debugfs_init(struct kryo_regulator *kvreg) |
| 609 | { |
| 610 | struct dentry *temp; |
| 611 | |
| 612 | if (IS_ERR_OR_NULL(kryo_debugfs_base)) { |
| 613 | if (PTR_ERR(kryo_debugfs_base) != -ENODEV) |
| 614 | kvreg_err(kvreg, "Base directory missing, cannot create debugfs nodes rc=%ld\n", |
| 615 | PTR_ERR(kryo_debugfs_base)); |
| 616 | return; |
| 617 | } |
| 618 | |
| 619 | kvreg->debugfs = debugfs_create_dir(kvreg->name, kryo_debugfs_base); |
| 620 | |
| 621 | if (IS_ERR_OR_NULL(kvreg->debugfs)) { |
| 622 | kvreg_err(kvreg, "debugfs directory creation failed rc=%ld\n", |
| 623 | PTR_ERR(kvreg->debugfs)); |
| 624 | return; |
| 625 | } |
| 626 | |
| 627 | temp = debugfs_create_file("mode", 0444, kvreg->debugfs, |
| 628 | kvreg, &kryo_dbg_mode_fops); |
| 629 | |
| 630 | if (IS_ERR_OR_NULL(temp)) { |
| 631 | kvreg_err(kvreg, "mode node creation failed rc=%ld\n", |
| 632 | PTR_ERR(temp)); |
| 633 | return; |
| 634 | } |
| 635 | } |
| 636 | |
| 637 | static void kryo_debugfs_deinit(struct kryo_regulator *kvreg) |
| 638 | { |
| 639 | debugfs_remove_recursive(kvreg->debugfs); |
| 640 | } |
| 641 | |
| 642 | static void kryo_debugfs_base_init(void) |
| 643 | { |
| 644 | kryo_debugfs_base = debugfs_create_dir(KRYO_REGULATOR_DRIVER_NAME, |
| 645 | NULL); |
| 646 | if (IS_ERR_OR_NULL(kryo_debugfs_base)) { |
| 647 | if (PTR_ERR(kryo_debugfs_base) != -ENODEV) |
| 648 | pr_err("%s debugfs base directory creation failed rc=%ld\n", |
| 649 | KRYO_REGULATOR_DRIVER_NAME, |
| 650 | PTR_ERR(kryo_debugfs_base)); |
| 651 | } |
| 652 | } |
| 653 | |
| 654 | static void kryo_debugfs_base_remove(void) |
| 655 | { |
| 656 | debugfs_remove_recursive(kryo_debugfs_base); |
| 657 | } |
| 658 | |
| 659 | static int kryo_regulator_init_data(struct platform_device *pdev, |
| 660 | struct kryo_regulator *kvreg) |
| 661 | { |
| 662 | int rc = 0; |
| 663 | struct device *dev = &pdev->dev; |
| 664 | struct resource *res; |
| 665 | void __iomem *temp; |
| 666 | |
| 667 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pm-apc"); |
| 668 | if (!res) { |
| 669 | dev_err(dev, "PM APC register address missing\n"); |
| 670 | return -EINVAL; |
| 671 | } |
| 672 | |
| 673 | kvreg->reg_base = devm_ioremap(dev, res->start, resource_size(res)); |
| 674 | if (!kvreg->reg_base) { |
| 675 | dev_err(dev, "failed to map PM APC registers\n"); |
| 676 | return -ENOMEM; |
| 677 | } |
| 678 | |
| 679 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pm-apcc"); |
| 680 | if (!res) { |
| 681 | dev_err(dev, "PM APCC register address missing\n"); |
| 682 | return -EINVAL; |
| 683 | } |
| 684 | |
| 685 | kvreg->pm_apcc_base = devm_ioremap(dev, res->start, resource_size(res)); |
| 686 | if (!kvreg->pm_apcc_base) { |
| 687 | dev_err(dev, "failed to map PM APCC registers\n"); |
| 688 | return -ENOMEM; |
| 689 | } |
| 690 | |
| 691 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "apcs-csr"); |
| 692 | if (!res) { |
| 693 | dev_err(dev, "missing APCS CSR physical base address"); |
| 694 | return -EINVAL; |
| 695 | } |
| 696 | |
| 697 | temp = ioremap(res->start, resource_size(res)); |
| 698 | if (!temp) { |
| 699 | dev_err(dev, "failed to map APCS CSR registers\n"); |
| 700 | return -ENOMEM; |
| 701 | } |
| 702 | |
| 703 | kvreg->version = readl_relaxed(temp + APCS_VERSION); |
| 704 | iounmap(temp); |
| 705 | |
| 706 | rc = of_property_read_u32(dev->of_node, |
| 707 | "qcom,vref-functional-step-voltage", |
| 708 | &kvreg->vref_func_step_volt); |
| 709 | if (rc < 0) { |
| 710 | dev_err(dev, "qcom,vref-functional-step-voltage missing rc=%d\n", |
| 711 | rc); |
| 712 | return rc; |
| 713 | } |
| 714 | |
| 715 | rc = of_property_read_u32(dev->of_node, |
| 716 | "qcom,vref-functional-min-voltage", |
| 717 | &kvreg->vref_func_min_volt); |
| 718 | if (rc < 0) { |
| 719 | dev_err(dev, "qcom,vref-functional-min-voltage missing rc=%d\n", |
| 720 | rc); |
| 721 | return rc; |
| 722 | } |
| 723 | |
| 724 | kvreg->vref_func_max_volt = kryo_decode_functional_volt(kvreg, |
| 725 | LDO_N_VOLTAGES - 1); |
| 726 | |
| 727 | rc = of_property_read_u32(dev->of_node, |
| 728 | "qcom,vref-retention-step-voltage", |
| 729 | &kvreg->vref_ret_step_volt); |
| 730 | if (rc < 0) { |
| 731 | dev_err(dev, "qcom,vref-retention-step-voltage missing rc=%d\n", |
| 732 | rc); |
| 733 | return rc; |
| 734 | } |
| 735 | |
| 736 | rc = of_property_read_u32(dev->of_node, |
| 737 | "qcom,vref-retention-min-voltage", |
| 738 | &kvreg->vref_ret_min_volt); |
| 739 | if (rc < 0) { |
| 740 | dev_err(dev, "qcom,vref-retention-min-voltage missing rc=%d\n", |
| 741 | rc); |
| 742 | return rc; |
| 743 | } |
| 744 | |
| 745 | kvreg->vref_ret_max_volt = kryo_decode_retention_volt(kvreg, |
| 746 | LDO_N_VOLTAGES - 1); |
| 747 | |
| 748 | rc = of_property_read_u32(dev->of_node, "qcom,ldo-default-voltage", |
| 749 | &kvreg->volt); |
| 750 | if (rc < 0) { |
| 751 | dev_err(dev, "qcom,ldo-default-voltage missing rc=%d\n", rc); |
| 752 | return rc; |
| 753 | } |
| 754 | if (!is_between(kvreg->vref_func_min_volt, |
| 755 | kvreg->vref_func_max_volt, |
| 756 | kvreg->volt)) { |
| 757 | dev_err(dev, "qcom,ldo-default-voltage=%d uV outside allowed range\n", |
| 758 | kvreg->volt); |
| 759 | return -EINVAL; |
| 760 | } |
| 761 | |
| 762 | rc = of_property_read_u32(dev->of_node, "qcom,retention-voltage", |
| 763 | &kvreg->retention_volt); |
| 764 | if (rc < 0) { |
| 765 | dev_err(dev, "qcom,retention-voltage missing rc=%d\n", rc); |
| 766 | return rc; |
| 767 | } |
| 768 | if (!is_between(kvreg->vref_ret_min_volt, |
| 769 | kvreg->vref_ret_max_volt, |
| 770 | kvreg->retention_volt)) { |
| 771 | dev_err(dev, "qcom,retention-voltage=%d uV outside allowed range\n", |
| 772 | kvreg->retention_volt); |
| 773 | return -EINVAL; |
| 774 | } |
| 775 | |
| 776 | rc = of_property_read_u32(dev->of_node, "qcom,ldo-headroom-voltage", |
| 777 | &kvreg->headroom_volt); |
| 778 | if (rc < 0) { |
| 779 | dev_err(dev, "qcom,ldo-headroom-voltage missing rc=%d\n", rc); |
| 780 | return rc; |
| 781 | } |
| 782 | |
| 783 | rc = of_property_read_u32(dev->of_node, "qcom,ldo-config-init", |
| 784 | &kvreg->ldo_config_init); |
| 785 | if (rc < 0) { |
| 786 | dev_err(dev, "qcom,ldo-config-init missing rc=%d\n", rc); |
| 787 | return rc; |
| 788 | } |
| 789 | |
| 790 | rc = of_property_read_u32(dev->of_node, "qcom,apm-config-init", |
| 791 | &kvreg->apm_config_init); |
| 792 | if (rc < 0) { |
| 793 | dev_err(dev, "qcom,apm-config-init missing rc=%d\n", rc); |
| 794 | return rc; |
| 795 | } |
| 796 | |
| 797 | rc = of_property_read_u32(dev->of_node, "qcom,cluster-num", |
| 798 | &kvreg->cluster_num); |
| 799 | if (rc < 0) { |
| 800 | dev_err(dev, "qcom,cluster-num missing rc=%d\n", rc); |
| 801 | return rc; |
| 802 | } |
| 803 | |
| 804 | return rc; |
| 805 | } |
| 806 | |
| 807 | static int kryo_regulator_retention_init(struct kryo_regulator *kvreg, |
| 808 | struct platform_device *pdev, |
| 809 | struct device_node *ret_node) |
| 810 | { |
| 811 | struct device *dev = &pdev->dev; |
| 812 | struct regulator_init_data *init_data; |
| 813 | struct regulator_config reg_config = {}; |
| 814 | int rc = 0; |
| 815 | |
| 816 | init_data = of_get_regulator_init_data(dev, ret_node, |
| 817 | &kvreg->retention_desc); |
| 818 | if (!init_data) { |
| 819 | kvreg_err(kvreg, "regulator init data is missing\n"); |
| 820 | return -EINVAL; |
| 821 | } |
| 822 | |
| 823 | if (!init_data->constraints.name) { |
| 824 | kvreg_err(kvreg, "regulator name is missing from constraints\n"); |
| 825 | return -EINVAL; |
| 826 | } |
| 827 | |
| 828 | init_data->constraints.valid_ops_mask |= REGULATOR_CHANGE_BYPASS |
| 829 | | REGULATOR_CHANGE_VOLTAGE; |
| 830 | init_data->constraints.input_uV = init_data->constraints.max_uV; |
| 831 | |
| 832 | kvreg->retention_desc.name = init_data->constraints.name; |
| 833 | kvreg->retention_desc.n_voltages = LDO_N_VOLTAGES; |
| 834 | kvreg->retention_desc.ops = &kryo_regulator_retention_ops; |
| 835 | kvreg->retention_desc.type = REGULATOR_VOLTAGE; |
| 836 | kvreg->retention_desc.owner = THIS_MODULE; |
| 837 | |
| 838 | reg_config.dev = dev; |
| 839 | reg_config.init_data = init_data; |
| 840 | reg_config.driver_data = kvreg; |
| 841 | reg_config.of_node = ret_node; |
| 842 | kvreg->retention_rdev = regulator_register(&kvreg->retention_desc, |
| 843 | ®_config); |
| 844 | if (IS_ERR(kvreg->retention_rdev)) { |
| 845 | rc = PTR_ERR(kvreg->retention_rdev); |
| 846 | kvreg_err(kvreg, "regulator_register failed, rc=%d\n", rc); |
| 847 | return rc; |
| 848 | } |
| 849 | |
| 850 | return rc; |
| 851 | } |
| 852 | |
| 853 | static int kryo_regulator_lpm_prepare(struct kryo_regulator *kvreg) |
| 854 | { |
| 855 | int vdd_volt_uv, bhs_volt, vdd_vlvl = 0; |
| 856 | unsigned long flags; |
| 857 | |
| 858 | spin_lock_irqsave(&kvreg->slock, flags); |
| 859 | |
| 860 | kvreg->pre_lpm_state_mode = kvreg->mode; |
| 861 | kvreg->pre_lpm_state_volt = kvreg->volt; |
| 862 | |
| 863 | if (kvreg->mode == LDO_MODE) { |
| 864 | if (!vdd_vlvl) { |
| 865 | vdd_vlvl = msm_spm_get_vdd(SHARED_CPU_REG_NUM); |
| 866 | if (vdd_vlvl < 0) { |
| 867 | kvreg_err(kvreg, "could not get vdd supply voltage level, rc=%d\n", |
| 868 | vdd_vlvl); |
| 869 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 870 | return NOTIFY_BAD; |
| 871 | } |
| 872 | |
| 873 | vdd_volt_uv = vdd_vlvl * VDD_SUPPLY_STEP_UV |
| 874 | + VDD_SUPPLY_MIN_UV; |
| 875 | } |
| 876 | kvreg_debug(kvreg, "switching to BHS mode, vdd_apcc=%d uV, current LDO Vref=%d, LPM enter count=%lx\n", |
| 877 | vdd_volt_uv, kvreg->volt, kvreg->lpm_enter_count); |
| 878 | |
| 879 | /* |
| 880 | * Program vdd supply minus LDO headroom as voltage. |
| 881 | * Cap this value to the maximum physically supported |
| 882 | * LDO voltage, if necessary. |
| 883 | */ |
| 884 | bhs_volt = vdd_volt_uv - kvreg->headroom_volt; |
| 885 | if (bhs_volt > kvreg->vref_func_max_volt) { |
| 886 | kvreg_debug(kvreg, "limited to LDO output of %d uV when switching to BHS mode\n", |
| 887 | kvreg->vref_func_max_volt); |
| 888 | bhs_volt = kvreg->vref_func_max_volt; |
| 889 | } |
| 890 | |
| 891 | kryo_set_ldo_volt(kvreg, bhs_volt); |
| 892 | |
| 893 | /* Switch Power Gate Mode */ |
| 894 | kryo_configure_mode(kvreg, BHS_MODE); |
| 895 | } |
| 896 | |
| 897 | kvreg->lpm_enter_count++; |
| 898 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 899 | |
| 900 | return NOTIFY_OK; |
| 901 | } |
| 902 | |
| 903 | static int kryo_regulator_lpm_resume(struct kryo_regulator *kvreg) |
| 904 | { |
| 905 | unsigned long flags; |
| 906 | |
| 907 | spin_lock_irqsave(&kvreg->slock, flags); |
| 908 | |
| 909 | if (kvreg->mode == BHS_MODE && |
| 910 | kvreg->pre_lpm_state_mode == LDO_MODE) { |
| 911 | kvreg_debug(kvreg, "switching to LDO mode, cached LDO Vref=%d, LPM exit count=%lx\n", |
| 912 | kvreg->pre_lpm_state_volt, kvreg->lpm_exit_count); |
| 913 | |
| 914 | /* |
| 915 | * Cached voltage value corresponds to vdd supply minus |
| 916 | * LDO headroom, reprogram it. |
| 917 | */ |
| 918 | kryo_set_ldo_volt(kvreg, kvreg->volt); |
| 919 | |
| 920 | /* Switch Power Gate Mode */ |
| 921 | kryo_configure_mode(kvreg, LDO_MODE); |
| 922 | |
| 923 | /* Request final LDO output voltage */ |
| 924 | kryo_set_ldo_volt(kvreg, kvreg->pre_lpm_state_volt); |
| 925 | } |
| 926 | |
| 927 | kvreg->lpm_exit_count++; |
| 928 | spin_unlock_irqrestore(&kvreg->slock, flags); |
| 929 | |
| 930 | if (kvreg->lpm_exit_count != kvreg->lpm_enter_count) { |
| 931 | kvreg_err(kvreg, "LPM entry/exit counter mismatch, this is not expected: enter=%lx exit=%lx\n", |
| 932 | kvreg->lpm_enter_count, kvreg->lpm_exit_count); |
| 933 | BUG_ON(1); |
| 934 | } |
| 935 | |
| 936 | return NOTIFY_OK; |
| 937 | } |
| 938 | |
| 939 | static int kryo_regulator_cpu_pm_callback(struct notifier_block *self, |
| 940 | unsigned long cmd, void *v) |
| 941 | { |
| 942 | struct kryo_regulator *kvreg = container_of(self, struct kryo_regulator, |
| 943 | cpu_pm_notifier); |
| 944 | unsigned long aff_level = (unsigned long) v; |
| 945 | int rc = NOTIFY_OK; |
| 946 | |
| 947 | switch (cmd) { |
| 948 | case CPU_CLUSTER_PM_ENTER: |
| 949 | if (aff_level == AFFINITY_LEVEL_M3) |
| 950 | rc = kryo_regulator_lpm_prepare(kvreg); |
| 951 | break; |
| 952 | case CPU_CLUSTER_PM_EXIT: |
| 953 | if (aff_level == AFFINITY_LEVEL_M3) |
| 954 | rc = kryo_regulator_lpm_resume(kvreg); |
| 955 | break; |
| 956 | } |
| 957 | |
| 958 | return rc; |
| 959 | } |
| 960 | |
| 961 | static int kryo_regulator_probe(struct platform_device *pdev) |
| 962 | { |
| 963 | struct device *dev = &pdev->dev; |
| 964 | struct kryo_regulator *kvreg; |
| 965 | struct regulator_config reg_config = {}; |
| 966 | struct regulator_init_data *init_data = pdev->dev.platform_data; |
| 967 | struct device_node *child; |
| 968 | int rc = 0; |
| 969 | |
| 970 | if (!dev->of_node) { |
| 971 | dev_err(dev, "Device tree node is missing\n"); |
| 972 | return -ENODEV; |
| 973 | } |
| 974 | |
| 975 | init_data = of_get_regulator_init_data(dev, dev->of_node, NULL); |
| 976 | |
| 977 | if (!init_data) { |
| 978 | dev_err(dev, "regulator init data is missing\n"); |
| 979 | return -EINVAL; |
| 980 | } |
| 981 | |
| 982 | if (!init_data->constraints.name) { |
| 983 | dev_err(dev, "regulator name is missing from constraints\n"); |
| 984 | return -EINVAL; |
| 985 | } |
| 986 | |
| 987 | init_data->constraints.valid_ops_mask |= REGULATOR_CHANGE_VOLTAGE |
| 988 | | REGULATOR_CHANGE_BYPASS | REGULATOR_CHANGE_STATUS; |
| 989 | init_data->constraints.input_uV = init_data->constraints.max_uV; |
| 990 | |
| 991 | kvreg = devm_kzalloc(dev, sizeof(*kvreg), GFP_KERNEL); |
| 992 | if (!kvreg) |
| 993 | return -ENOMEM; |
| 994 | |
| 995 | rc = kryo_regulator_init_data(pdev, kvreg); |
| 996 | if (rc) { |
| 997 | dev_err(dev, "could not parse and ioremap all device tree properties\n"); |
| 998 | return rc; |
| 999 | } |
| 1000 | |
| 1001 | spin_lock_init(&kvreg->slock); |
| 1002 | kvreg->name = init_data->constraints.name; |
| 1003 | kvreg->desc.name = kvreg->name; |
| 1004 | kvreg->desc.n_voltages = LDO_N_VOLTAGES; |
| 1005 | kvreg->desc.ops = &kryo_regulator_ops; |
| 1006 | kvreg->desc.type = REGULATOR_VOLTAGE; |
| 1007 | kvreg->desc.owner = THIS_MODULE; |
| 1008 | kvreg->mode = BHS_MODE; |
| 1009 | |
| 1010 | for_each_available_child_of_node(dev->of_node, child) { |
| 1011 | kryo_regulator_retention_init(kvreg, pdev, child); |
| 1012 | if (rc) { |
| 1013 | dev_err(dev, "could not initialize retention regulator, rc=%d\n", |
| 1014 | rc); |
| 1015 | return rc; |
| 1016 | } |
| 1017 | break; |
| 1018 | } |
| 1019 | |
| 1020 | /* CPUSS PM Register Initialization */ |
| 1021 | rc = kryo_hw_init(kvreg); |
| 1022 | if (rc) { |
| 1023 | dev_err(dev, "unable to perform CPUSS PM initialization sequence\n"); |
| 1024 | return rc; |
| 1025 | } |
| 1026 | |
| 1027 | reg_config.dev = dev; |
| 1028 | reg_config.init_data = init_data; |
| 1029 | reg_config.driver_data = kvreg; |
| 1030 | reg_config.of_node = dev->of_node; |
| 1031 | kvreg->rdev = regulator_register(&kvreg->desc, ®_config); |
| 1032 | if (IS_ERR(kvreg->rdev)) { |
| 1033 | rc = PTR_ERR(kvreg->rdev); |
| 1034 | kvreg_err(kvreg, "regulator_register failed, rc=%d\n", rc); |
| 1035 | return rc; |
| 1036 | } |
| 1037 | |
| 1038 | platform_set_drvdata(pdev, kvreg); |
| 1039 | kryo_debugfs_init(kvreg); |
| 1040 | |
| 1041 | mutex_lock(&kryo_regulator_list_mutex); |
| 1042 | list_add_tail(&kvreg->link, &kryo_regulator_list); |
| 1043 | mutex_unlock(&kryo_regulator_list_mutex); |
| 1044 | |
| 1045 | kvreg->cpu_pm_notifier.notifier_call = kryo_regulator_cpu_pm_callback; |
| 1046 | cpu_pm_register_notifier(&kvreg->cpu_pm_notifier); |
| 1047 | kvreg_debug(kvreg, "registered cpu pm notifier\n"); |
| 1048 | |
| 1049 | kvreg_info(kvreg, "default LDO functional volt=%d uV, LDO retention volt=%d uV, Vref func=%d + %d*(val), cluster-num=%d\n", |
| 1050 | kvreg->volt, kvreg->retention_volt, |
| 1051 | kvreg->vref_func_min_volt, |
| 1052 | kvreg->vref_func_step_volt, |
| 1053 | kvreg->cluster_num); |
| 1054 | |
| 1055 | return rc; |
| 1056 | } |
| 1057 | |
| 1058 | static int kryo_regulator_remove(struct platform_device *pdev) |
| 1059 | { |
| 1060 | struct kryo_regulator *kvreg = platform_get_drvdata(pdev); |
| 1061 | |
| 1062 | mutex_lock(&kryo_regulator_list_mutex); |
| 1063 | list_del(&kvreg->link); |
| 1064 | mutex_unlock(&kryo_regulator_list_mutex); |
| 1065 | |
| 1066 | cpu_pm_unregister_notifier(&kvreg->cpu_pm_notifier); |
| 1067 | regulator_unregister(kvreg->rdev); |
| 1068 | platform_set_drvdata(pdev, NULL); |
| 1069 | kryo_debugfs_deinit(kvreg); |
| 1070 | |
| 1071 | return 0; |
| 1072 | } |
| 1073 | |
| 1074 | static const struct of_device_id kryo_regulator_match_table[] = { |
| 1075 | { .compatible = "qcom,kryo-regulator", }, |
| 1076 | {} |
| 1077 | }; |
| 1078 | |
| 1079 | static struct platform_driver kryo_regulator_driver = { |
| 1080 | .probe = kryo_regulator_probe, |
| 1081 | .remove = kryo_regulator_remove, |
| 1082 | .driver = { |
| 1083 | .name = KRYO_REGULATOR_DRIVER_NAME, |
| 1084 | .of_match_table = kryo_regulator_match_table, |
| 1085 | .owner = THIS_MODULE, |
| 1086 | }, |
| 1087 | }; |
| 1088 | |
| 1089 | static int __init kryo_regulator_init(void) |
| 1090 | { |
| 1091 | kryo_debugfs_base_init(); |
| 1092 | return platform_driver_register(&kryo_regulator_driver); |
| 1093 | } |
| 1094 | |
| 1095 | static void __exit kryo_regulator_exit(void) |
| 1096 | { |
| 1097 | platform_driver_unregister(&kryo_regulator_driver); |
| 1098 | kryo_debugfs_base_remove(); |
| 1099 | } |
| 1100 | |
| 1101 | MODULE_DESCRIPTION("Kryo regulator driver"); |
| 1102 | MODULE_LICENSE("GPL v2"); |
| 1103 | |
| 1104 | arch_initcall(kryo_regulator_init); |
| 1105 | module_exit(kryo_regulator_exit); |