Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __MDSS_IO_UTIL_H__ |
| 14 | #define __MDSS_IO_UTIL_H__ |
| 15 | |
| 16 | #include <linux/gpio.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/regulator/consumer.h> |
| 19 | #include <linux/i2c.h> |
| 20 | #include <linux/types.h> |
| 21 | |
| 22 | #ifdef DEBUG |
| 23 | #define DEV_DBG(fmt, args...) pr_err(fmt, ##args) |
| 24 | #else |
| 25 | #define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) |
| 26 | #endif |
| 27 | #define DEV_INFO(fmt, args...) pr_info(fmt, ##args) |
| 28 | #define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) |
| 29 | #define DEV_ERR(fmt, args...) pr_err(fmt, ##args) |
| 30 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 31 | struct mdss_io_data { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 32 | u32 len; |
| 33 | void __iomem *base; |
| 34 | }; |
| 35 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 36 | void mdss_reg_w(struct mdss_io_data *io, u32 offset, u32 value, u32 debug); |
| 37 | u32 mdss_reg_r(struct mdss_io_data *io, u32 offset, u32 debug); |
| 38 | void mdss_reg_dump(void __iomem *base, u32 len, const char *prefix, u32 debug); |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 39 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 40 | #define DSS_REG_W_ND(io, offset, val) mdss_reg_w(io, offset, val, false) |
| 41 | #define DSS_REG_W(io, offset, val) mdss_reg_w(io, offset, val, true) |
| 42 | #define DSS_REG_R_ND(io, offset) mdss_reg_r(io, offset, false) |
| 43 | #define DSS_REG_R(io, offset) mdss_reg_r(io, offset, true) |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 44 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 45 | enum mdss_vreg_type { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 46 | DSS_REG_LDO, |
| 47 | DSS_REG_VS, |
| 48 | }; |
| 49 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 50 | enum mdss_vreg_mode { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 51 | DSS_REG_MODE_ENABLE, |
| 52 | DSS_REG_MODE_DISABLE, |
| 53 | DSS_REG_MODE_LP, |
| 54 | DSS_REG_MODE_ULP, |
| 55 | DSS_REG_MODE_MAX, |
| 56 | }; |
| 57 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 58 | struct mdss_vreg { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 59 | struct regulator *vreg; /* vreg handle */ |
| 60 | char vreg_name[32]; |
| 61 | int min_voltage; |
| 62 | int max_voltage; |
| 63 | u32 load[DSS_REG_MODE_MAX]; |
| 64 | int pre_on_sleep; |
| 65 | int post_on_sleep; |
| 66 | int pre_off_sleep; |
| 67 | int post_off_sleep; |
| 68 | }; |
| 69 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 70 | struct mdss_gpio { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 71 | unsigned int gpio; |
| 72 | unsigned int value; |
| 73 | char gpio_name[32]; |
| 74 | }; |
| 75 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 76 | enum mdss_clk_type { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 77 | DSS_CLK_AHB, /* no set rate. rate controlled through rpm */ |
| 78 | DSS_CLK_PCLK, |
| 79 | DSS_CLK_OTHER, |
| 80 | }; |
| 81 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 82 | struct mdss_clk { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 83 | struct clk *clk; /* clk handle */ |
| 84 | char clk_name[32]; |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 85 | enum mdss_clk_type type; |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 86 | unsigned long rate; |
| 87 | }; |
| 88 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 89 | struct mdss_module_power { |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 90 | unsigned int num_vreg; |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 91 | struct mdss_vreg *vreg_config; |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 92 | unsigned int num_gpio; |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 93 | struct mdss_gpio *gpio_config; |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 94 | unsigned int num_clk; |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 95 | struct mdss_clk *clk_config; |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 96 | }; |
| 97 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 98 | int msm_mdss_ioremap_byname(struct platform_device *pdev, |
| 99 | struct mdss_io_data *io_data, const char *name); |
| 100 | void msm_mdss_iounmap(struct mdss_io_data *io_data); |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 101 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 102 | int msm_mdss_enable_gpio(struct mdss_gpio *in_gpio, int num_gpio, int enable); |
| 103 | int msm_mdss_gpio_enable(struct mdss_gpio *in_gpio, int num_gpio, int enable); |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 104 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 105 | int msm_mdss_config_vreg(struct device *dev, struct mdss_vreg *in_vreg, |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 106 | int num_vreg, int config); |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 107 | int msm_mdss_enable_vreg(struct mdss_vreg *in_vreg, int num_vreg, int enable); |
| 108 | int msm_mdss_config_vreg_opt_mode(struct mdss_vreg *in_vreg, int num_vreg, |
| 109 | enum mdss_vreg_mode mode); |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 110 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 111 | int msm_mdss_get_clk(struct device *dev, struct mdss_clk *clk_arry, |
| 112 | int num_clk); |
| 113 | void msm_mdss_put_clk(struct mdss_clk *clk_arry, int num_clk); |
| 114 | int msm_mdss_clk_set_rate(struct mdss_clk *clk_arry, int num_clk); |
| 115 | int msm_mdss_enable_clk(struct mdss_clk *clk_arry, int num_clk, int enable); |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 116 | |
| 117 | int mdss_i2c_byte_read(struct i2c_client *client, uint8_t slave_addr, |
| 118 | uint8_t reg_offset, uint8_t *read_buf); |
| 119 | int mdss_i2c_byte_write(struct i2c_client *client, uint8_t slave_addr, |
| 120 | uint8_t reg_offset, uint8_t *value); |
| 121 | |
| 122 | #endif /* __MDSS_IO_UTIL_H__ */ |