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Tony Truong349ee492014-10-01 17:35:56 -07001/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __MSM_PCIE_H
14#define __MSM_PCIE_H
15
16#include <linux/types.h>
17#include <linux/pci.h>
18
19enum msm_pcie_config {
20 MSM_PCIE_CONFIG_INVALID = 0,
21 MSM_PCIE_CONFIG_NO_CFG_RESTORE = 0x1,
22 MSM_PCIE_CONFIG_LINKDOWN = 0x2,
23 MSM_PCIE_CONFIG_NO_RECOVERY = 0x4,
24};
25
26enum msm_pcie_pm_opt {
27 MSM_PCIE_SUSPEND,
28 MSM_PCIE_RESUME,
29 MSM_PCIE_DISABLE_PC,
30 MSM_PCIE_ENABLE_PC,
31};
32
33enum msm_pcie_event {
34 MSM_PCIE_EVENT_INVALID = 0,
35 MSM_PCIE_EVENT_LINKDOWN = 0x1,
36 MSM_PCIE_EVENT_LINKUP = 0x2,
37 MSM_PCIE_EVENT_WAKEUP = 0x4,
38};
39
40enum msm_pcie_trigger {
41 MSM_PCIE_TRIGGER_CALLBACK,
42 MSM_PCIE_TRIGGER_COMPLETION,
43};
44
45struct msm_pcie_notify {
46 enum msm_pcie_event event;
47 void *user;
48 void *data;
49 u32 options;
50};
51
52struct msm_pcie_register_event {
53 u32 events;
54 void *user;
55 enum msm_pcie_trigger mode;
56 void (*callback)(struct msm_pcie_notify *notify);
57 struct msm_pcie_notify notify;
58 struct completion *completion;
59 u32 options;
60};
61
62#ifdef CONFIG_PCI_MSM
63/**
64 * msm_pcie_pm_control - control the power state of a PCIe link.
65 * @pm_opt: power management operation
66 * @busnr: bus number of PCIe endpoint
67 * @user: handle of the caller
68 * @data: private data from the caller
69 * @options: options for pm control
70 *
71 * This function gives PCIe endpoint device drivers the control to change
72 * the power state of a PCIe link for their device.
73 *
74 * Return: 0 on success, negative value on error
75 */
76int msm_pcie_pm_control(enum msm_pcie_pm_opt pm_opt, u32 busnr, void *user,
77 void *data, u32 options);
78
79/**
80 * msm_pcie_register_event - register an event with PCIe bus driver.
81 * @reg: event structure
82 *
83 * This function gives PCIe endpoint device drivers an option to register
84 * events with PCIe bus driver.
85 *
86 * Return: 0 on success, negative value on error
87 */
88int msm_pcie_register_event(struct msm_pcie_register_event *reg);
89
90/**
91 * msm_pcie_deregister_event - deregister an event with PCIe bus driver.
92 * @reg: event structure
93 *
94 * This function gives PCIe endpoint device drivers an option to deregister
95 * events with PCIe bus driver.
96 *
97 * Return: 0 on success, negative value on error
98 */
99int msm_pcie_deregister_event(struct msm_pcie_register_event *reg);
100
101/**
102 * msm_pcie_recover_config - recover config space.
103 * @dev: pci device structure
104 *
105 * This function recovers the config space of both RC and Endpoint.
106 *
107 * Return: 0 on success, negative value on error
108 */
109int msm_pcie_recover_config(struct pci_dev *dev);
110
111/**
112 * msm_pcie_enumerate - enumerate Endpoints.
113 * @rc_idx: RC that Endpoints connect to.
114 *
115 * This function enumerates Endpoints connected to RC.
116 *
117 * Return: 0 on success, negative value on error
118 */
119int msm_pcie_enumerate(u32 rc_idx);
120
121/**
122 * msm_pcie_recover_config - recover config space.
123 * @dev: pci device structure
124 *
125 * This function recovers the config space of both RC and Endpoint.
126 *
127 * Return: 0 on success, negative value on error
128 */
129int msm_pcie_recover_config(struct pci_dev *dev);
130
131/**
132 * msm_pcie_shadow_control - control the shadowing of PCIe config space.
133 * @dev: pci device structure
134 * @enable: shadowing should be enabled or disabled
135 *
136 * This function gives PCIe endpoint device drivers the control to enable
137 * or disable the shadowing of PCIe config space.
138 *
139 * Return: 0 on success, negative value on error
140 */
141int msm_pcie_shadow_control(struct pci_dev *dev, bool enable);
142
143/*
144 * msm_pcie_debug_info - run a PCIe specific debug testcase.
145 * @dev: pci device structure
146 * @option: specifies which PCIe debug testcase to execute
147 * @base: PCIe specific range
148 * @offset: offset of destination register
149 * @mask: mask the bit(s) of destination register
150 * @value: value to be written to destination register
151 *
152 * This function gives PCIe endpoint device drivers the control to
153 * run a debug testcase.
154 *
155 * Return: 0 on success, negative value on error
156 */
157int msm_pcie_debug_info(struct pci_dev *dev, u32 option, u32 base,
158 u32 offset, u32 mask, u32 value);
159
Tony Truong349ee492014-10-01 17:35:56 -0700160#else /* !CONFIG_PCI_MSM */
161static inline int msm_pcie_pm_control(enum msm_pcie_pm_opt pm_opt, u32 busnr,
162 void *user, void *data, u32 options)
163{
164 return -ENODEV;
165}
166
167static inline int msm_pcie_register_event(struct msm_pcie_register_event *reg)
168{
169 return -ENODEV;
170}
171
172static inline int msm_pcie_deregister_event(struct msm_pcie_register_event *reg)
173{
174 return -ENODEV;
175}
176
177static inline int msm_pcie_recover_config(struct pci_dev *dev)
178{
179 return -ENODEV;
180}
181
182static inline int msm_pcie_enumerate(u32 rc_idx)
183{
184 return -ENODEV;
185}
186
187static inline int msm_pcie_shadow_control(struct pci_dev *dev, bool enable)
188{
189 return -ENODEV;
190}
191
192static inline int msm_pcie_debug_info(struct pci_dev *dev, u32 option, u32 base,
193 u32 offset, u32 mask, u32 value)
194{
195 return -ENODEV;
196}
Tony Truong349ee492014-10-01 17:35:56 -0700197#endif /* CONFIG_PCI_MSM */
198
199#endif /* __MSM_PCIE_H */