blob: 0e804e2f11f4d862f6825aa4ad11e21b46cc90e7 [file] [log] [blame]
Shawn Guobf985962010-12-20 22:57:43 +08001/*
2 * Copyright 2004-2006,2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
4 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
5 * <armlinux@phytec.de>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/errno.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/string.h>
27#include <linux/gpio.h>
28
29#include <asm/mach/map.h>
30
31#include <mach/mxs.h>
32#include <mach/iomux.h>
33
34/*
35 * configures a single pad in the iomuxer
36 */
37int mxs_iomux_setup_pad(iomux_cfg_t pad)
38{
39 u32 reg, ofs, bp, bm;
40 void __iomem *iomux_base = MXS_IO_ADDRESS(MXS_PINCTRL_BASE_ADDR);
41
42 /* muxsel */
43 ofs = 0x100;
44 ofs += PAD_BANK(pad) * 0x20 + PAD_PIN(pad) / 16 * 0x10;
45 bp = PAD_PIN(pad) % 16 * 2;
46 bm = 0x3 << bp;
47 reg = __raw_readl(iomux_base + ofs);
48 reg &= ~bm;
49 reg |= PAD_MUXSEL(pad) << bp;
50 __raw_writel(reg, iomux_base + ofs);
51
52 /* drive */
53 ofs = cpu_is_mx23() ? 0x200 : 0x300;
54 ofs += PAD_BANK(pad) * 0x40 + PAD_PIN(pad) / 8 * 0x10;
55 /* mA */
56 if (PAD_MA_VALID(pad)) {
57 bp = PAD_PIN(pad) % 8 * 4;
58 bm = 0x3 << bp;
59 reg = __raw_readl(iomux_base + ofs);
60 reg &= ~bm;
61 reg |= PAD_MA(pad) << bp;
62 __raw_writel(reg, iomux_base + ofs);
63 }
64 /* vol */
65 if (PAD_VOL_VALID(pad)) {
66 bp = PAD_PIN(pad) % 8 * 4 + 2;
67 if (PAD_VOL(pad))
68 __mxs_setl(1 << bp, iomux_base + ofs);
69 else
70 __mxs_clrl(1 << bp, iomux_base + ofs);
71 }
72
73 /* pull */
74 if (PAD_PULL_VALID(pad)) {
75 ofs = cpu_is_mx23() ? 0x400 : 0x600;
76 ofs += PAD_BANK(pad) * 0x10;
77 bp = PAD_PIN(pad);
78 if (PAD_PULL(pad))
79 __mxs_setl(1 << bp, iomux_base + ofs);
80 else
81 __mxs_clrl(1 << bp, iomux_base + ofs);
82 }
83
84 return 0;
85}
86
87int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count)
88{
89 const iomux_cfg_t *p = pad_list;
90 int i;
91 int ret;
92
93 for (i = 0; i < count; i++) {
94 ret = mxs_iomux_setup_pad(*p);
95 if (ret)
96 return ret;
97 p++;
98 }
99
100 return 0;
101}