| Vaibhav Hiremath | e3d4d0a | 2010-02-15 10:03:35 -0800 | [diff] [blame] | 1 | /*: |
| 2 | * Address mappings and base address for AM35XX specific interconnects |
| 3 | * and peripherals. |
| 4 | * |
| 5 | * Copyright (C) 2009 Texas Instruments |
| 6 | * |
| 7 | * Author: Sriramakrishnan <srk@ti.com> |
| 8 | * Vaibhav Hiremath <hvaibhav@ti.com> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | #ifndef __ASM_ARCH_AM35XX_H |
| 15 | #define __ASM_ARCH_AM35XX_H |
| 16 | |
| 17 | /* |
| 18 | * Base addresses |
| 19 | * Note: OMAP3430 IVA2 memory space is being used for AM35xx IPSS modules |
| 20 | */ |
| 21 | #define AM35XX_IPSS_EMAC_BASE 0x5C000000 |
| 22 | #define AM35XX_IPSS_USBOTGSS_BASE 0x5C040000 |
| 23 | #define AM35XX_IPSS_HECC_BASE 0x5C050000 |
| 24 | #define AM35XX_IPSS_VPFE_BASE 0x5C060000 |
| 25 | |
| Sriram | 9173363 | 2010-05-10 14:29:16 -0700 | [diff] [blame] | 26 | |
| 27 | /* HECC module specifc offset definitions */ |
| 28 | #define AM35XX_HECC_SCC_HECC_OFFSET (0x0) |
| 29 | #define AM35XX_HECC_SCC_RAM_OFFSET (0x3000) |
| 30 | #define AM35XX_HECC_RAM_OFFSET (0x3000) |
| 31 | #define AM35XX_HECC_MBOX_OFFSET (0x2000) |
| 32 | #define AM35XX_HECC_INT_LINE (0x0) |
| 33 | #define AM35XX_HECC_VERSION (0x1) |
| 34 | |
| Sriram | 39e799d | 2010-05-10 14:29:17 -0700 | [diff] [blame] | 35 | #define AM35XX_EMAC_CNTRL_OFFSET (0x10000) |
| 36 | #define AM35XX_EMAC_CNTRL_MOD_OFFSET (0x0) |
| 37 | #define AM35XX_EMAC_CNTRL_RAM_OFFSET (0x20000) |
| 38 | #define AM35XX_EMAC_MDIO_OFFSET (0x30000) |
| Mark A. Greer | 31ba880 | 2012-06-27 14:59:57 -0600 | [diff] [blame^] | 39 | #define AM35XX_IPSS_MDIO_BASE (AM35XX_IPSS_EMAC_BASE + \ |
| 40 | AM35XX_EMAC_MDIO_OFFSET) |
| Sriram | 39e799d | 2010-05-10 14:29:17 -0700 | [diff] [blame] | 41 | #define AM35XX_EMAC_CNTRL_RAM_SIZE (0x2000) |
| 42 | #define AM35XX_EMAC_RAM_ADDR (AM3517_EMAC_BASE + \ |
| 43 | AM3517_EMAC_CNTRL_RAM_OFFSET) |
| 44 | #define AM35XX_EMAC_HW_RAM_ADDR (0x01E20000) |
| 45 | |
| 46 | #endif /* __ASM_ARCH_AM35XX_H */ |