blob: 15eb9fe5169c2badee8f26cd1c79393ebed4db68 [file] [log] [blame]
Tony Lindgrenc4825252013-10-14 11:31:43 -07001/*
2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "omap36xx.dtsi"
11#include "omap-zoom-common.dtsi"
12
13/ {
14 model = "TI Zoom3";
15 compatible = "ti,omap3-zoom3", "ti,omap36xx", "ti,omap3";
16
17 cpus {
18 cpu@0 {
19 cpu0-supply = <&vcc>;
20 };
21 };
22
23 memory {
24 device_type = "memory";
25 reg = <0x80000000 0x20000000>; /* 512 MB */
26 };
27
28 vddvario: regulator-vddvario {
29 compatible = "regulator-fixed";
30 regulator-name = "vddvario";
31 regulator-always-on;
32 };
33
34 vdd33a: regulator-vdd33a {
35 compatible = "regulator-fixed";
36 regulator-name = "vdd33a";
37 regulator-always-on;
38 };
39
40 wl12xx_vmmc: wl12xx_vmmc {
41 pinctrl-names = "default";
42 pinctrl-0 = <&wl12xx_gpio>;
43 compatible = "regulator-fixed";
44 regulator-name = "vwl1271";
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <1800000>;
47 gpio = <&gpio4 5 0>; /* gpio101 */
48 startup-delay-us = <70000>;
49 enable-active-high;
50 };
51};
52
53&omap3_pmx_core {
54 /* REVISIT: twl gpio0 is mmc0_cd */
55 mmc1_pins: pinmux_mmc1_pins {
56 pinctrl-single,pins = <
57 0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
58 0x116 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
59 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
60 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
61 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
62 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
63 >;
64 };
65
66 mmc2_pins: pinmux_mmc2_pins {
67 pinctrl-single,pins = <
68 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
69 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
70 0x12c (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
71 0x12e (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
72 0x130 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
73 0x132 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
74 0x134 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
75 0x136 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
76 0x138 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
77 0x13a (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
78 >;
79 };
80
81 mmc3_pins: pinmux_mmc3_pins {
82 pinctrl-single,pins = <
83 0x168 (PIN_INPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 WLAN IRQ */
84 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
85 0x5a8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
86 0x5b4 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
87 0x5b6 (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
88 0x5b8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
89 0x5b2 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
90 >;
91 };
92
93 uart1_pins: pinmux_uart1_pins {
94 pinctrl-single,pins = <
95 0x150 (PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
96 0x14e (PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
97 0x152 (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
98 0x14c (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
99 >;
100 };
101
102 uart2_pins: pinmux_uart2_pins {
103 pinctrl-single,pins = <
104 0x144 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
105 0x146 (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
106 0x14a (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
107 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
108 >;
109 };
110
111 uart3_pins: pinmux_uart3_pins {
112 pinctrl-single,pins = <
113 0x16a (PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
114 0x16c (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
115 0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
116 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
117 >;
118 };
119
120 /* wl12xx GPIO output for WLAN_EN */
121 wl12xx_gpio: pinmux_wl12xx_gpio {
122 pinctrl-single,pins = <
123 0xea (PIN_OUTPUT| MUX_MODE4) /* cam_d2.gpio_101 */
124 >;
125 };
126};
127
128&omap3_pmx_wkup {
129 wlan_host_wkup: pinmux_wlan_host_wkup_pins {
130 pinctrl-single,pins = <
131 0x1a (PIN_INPUT_PULLUP | MUX_MODE4) /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
132 >;
133 };
134};
135
136&i2c1 {
137 clock-frequency = <2600000>;
138
139 twl: twl@48 {
140 reg = <0x48>;
141 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
142 interrupt-parent = <&intc>;
143 };
144};
145
146#include "twl4030.dtsi"
147
148&i2c2 {
149 clock-frequency = <400000>;
150};
151
152&i2c3 {
153 clock-frequency = <400000>;
154
155 /*
156 * TVP5146 Video decoder-in for analog input support.
157 */
158 tvp5146@5c {
159 compatible = "ti,tvp5146m2";
160 reg = <0x5c>;
161 };
162};
163
164&twl_gpio {
165 ti,use-leds;
166};
167
168&mmc1 {
169 vmmc-supply = <&vmmc1>;
170 vmmc_aux-supply = <&vsim>;
171 bus-width = <4>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&mmc1_pins>;
174};
175/*
176&mmc2 {
177 vmmc-supply = <&vmmc2>;
178 ti,non-removable;
179 bus-width = <8>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&mmc2_pins>;
182};
183*/
184&mmc3 {
185 vmmc-supply = <&wl12xx_vmmc>;
186 non-removable;
187 bus-width = <4>;
188 cap-power-off-card;
189 pinctrl-names = "default";
190 pinctrl-0 = <&mmc3_pins>;
191};
192
193&uart1 {
194 pinctrl-names = "default";
195 pinctrl-0 = <&uart1_pins>;
196};
197
198&uart2 {
199 pinctrl-names = "default";
200 pinctrl-0 = <&uart2_pins>;
201};
202
203&uart3 {
204 pinctrl-names = "default";
205 pinctrl-0 = <&uart3_pins>;
206};
207
208&uart4 {
209 status = "disabled";
210};
211
212&usb_otg_hs {
213 interface-type = <0>;
214 usb-phy = <&usb2_phy>;
215 mode = <3>;
216 power = <50>;
217};