Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * Keith Packard <keithp@keithp.com> |
| 26 | * Mika Kuoppala <mika.kuoppala@intel.com> |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #include <generated/utsrelease.h> |
| 31 | #include "i915_drv.h" |
| 32 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 33 | static const char *engine_str(int engine) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 34 | { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 35 | switch (engine) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 36 | case RCS: return "render"; |
| 37 | case VCS: return "bsd"; |
| 38 | case BCS: return "blt"; |
| 39 | case VECS: return "vebox"; |
Zhao Yakui | 845f74a | 2014-04-17 10:37:37 +0800 | [diff] [blame] | 40 | case VCS2: return "bsd2"; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 41 | default: return ""; |
| 42 | } |
| 43 | } |
| 44 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 45 | static const char *tiling_flag(int tiling) |
| 46 | { |
| 47 | switch (tiling) { |
| 48 | default: |
| 49 | case I915_TILING_NONE: return ""; |
| 50 | case I915_TILING_X: return " X"; |
| 51 | case I915_TILING_Y: return " Y"; |
| 52 | } |
| 53 | } |
| 54 | |
| 55 | static const char *dirty_flag(int dirty) |
| 56 | { |
| 57 | return dirty ? " dirty" : ""; |
| 58 | } |
| 59 | |
| 60 | static const char *purgeable_flag(int purgeable) |
| 61 | { |
| 62 | return purgeable ? " purgeable" : ""; |
| 63 | } |
| 64 | |
| 65 | static bool __i915_error_ok(struct drm_i915_error_state_buf *e) |
| 66 | { |
| 67 | |
| 68 | if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) { |
| 69 | e->err = -ENOSPC; |
| 70 | return false; |
| 71 | } |
| 72 | |
| 73 | if (e->bytes == e->size - 1 || e->err) |
| 74 | return false; |
| 75 | |
| 76 | return true; |
| 77 | } |
| 78 | |
| 79 | static bool __i915_error_seek(struct drm_i915_error_state_buf *e, |
| 80 | unsigned len) |
| 81 | { |
| 82 | if (e->pos + len <= e->start) { |
| 83 | e->pos += len; |
| 84 | return false; |
| 85 | } |
| 86 | |
| 87 | /* First vsnprintf needs to fit in its entirety for memmove */ |
| 88 | if (len >= e->size) { |
| 89 | e->err = -EIO; |
| 90 | return false; |
| 91 | } |
| 92 | |
| 93 | return true; |
| 94 | } |
| 95 | |
| 96 | static void __i915_error_advance(struct drm_i915_error_state_buf *e, |
| 97 | unsigned len) |
| 98 | { |
| 99 | /* If this is first printf in this window, adjust it so that |
| 100 | * start position matches start of the buffer |
| 101 | */ |
| 102 | |
| 103 | if (e->pos < e->start) { |
| 104 | const size_t off = e->start - e->pos; |
| 105 | |
| 106 | /* Should not happen but be paranoid */ |
| 107 | if (off > len || e->bytes) { |
| 108 | e->err = -EIO; |
| 109 | return; |
| 110 | } |
| 111 | |
| 112 | memmove(e->buf, e->buf + off, len - off); |
| 113 | e->bytes = len - off; |
| 114 | e->pos = e->start; |
| 115 | return; |
| 116 | } |
| 117 | |
| 118 | e->bytes += len; |
| 119 | e->pos += len; |
| 120 | } |
| 121 | |
| 122 | static void i915_error_vprintf(struct drm_i915_error_state_buf *e, |
| 123 | const char *f, va_list args) |
| 124 | { |
| 125 | unsigned len; |
| 126 | |
| 127 | if (!__i915_error_ok(e)) |
| 128 | return; |
| 129 | |
| 130 | /* Seek the first printf which is hits start position */ |
| 131 | if (e->pos < e->start) { |
Chris Wilson | e29bb4e | 2013-09-20 10:20:59 +0100 | [diff] [blame] | 132 | va_list tmp; |
| 133 | |
| 134 | va_copy(tmp, args); |
Mika Kuoppala | 1d2cb9a | 2014-02-07 17:40:50 +0200 | [diff] [blame] | 135 | len = vsnprintf(NULL, 0, f, tmp); |
| 136 | va_end(tmp); |
| 137 | |
| 138 | if (!__i915_error_seek(e, len)) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 139 | return; |
| 140 | } |
| 141 | |
| 142 | len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args); |
| 143 | if (len >= e->size - e->bytes) |
| 144 | len = e->size - e->bytes - 1; |
| 145 | |
| 146 | __i915_error_advance(e, len); |
| 147 | } |
| 148 | |
| 149 | static void i915_error_puts(struct drm_i915_error_state_buf *e, |
| 150 | const char *str) |
| 151 | { |
| 152 | unsigned len; |
| 153 | |
| 154 | if (!__i915_error_ok(e)) |
| 155 | return; |
| 156 | |
| 157 | len = strlen(str); |
| 158 | |
| 159 | /* Seek the first printf which is hits start position */ |
| 160 | if (e->pos < e->start) { |
| 161 | if (!__i915_error_seek(e, len)) |
| 162 | return; |
| 163 | } |
| 164 | |
| 165 | if (len >= e->size - e->bytes) |
| 166 | len = e->size - e->bytes - 1; |
| 167 | memcpy(e->buf + e->bytes, str, len); |
| 168 | |
| 169 | __i915_error_advance(e, len); |
| 170 | } |
| 171 | |
| 172 | #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__) |
| 173 | #define err_puts(e, s) i915_error_puts(e, s) |
| 174 | |
| 175 | static void print_error_buffers(struct drm_i915_error_state_buf *m, |
| 176 | const char *name, |
| 177 | struct drm_i915_error_buffer *err, |
| 178 | int count) |
| 179 | { |
Chris Wilson | b471618 | 2015-04-27 13:41:17 +0100 | [diff] [blame] | 180 | int i; |
| 181 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 182 | err_printf(m, "%s [%d]:\n", name, count); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 183 | |
| 184 | while (count--) { |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 185 | err_printf(m, " %08x_%08x %8u %02x %02x [ ", |
| 186 | upper_32_bits(err->gtt_offset), |
| 187 | lower_32_bits(err->gtt_offset), |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 188 | err->size, |
| 189 | err->read_domains, |
Chris Wilson | b471618 | 2015-04-27 13:41:17 +0100 | [diff] [blame] | 190 | err->write_domain); |
Tvrtko Ursulin | 666796d | 2016-03-16 11:00:39 +0000 | [diff] [blame] | 191 | for (i = 0; i < I915_NUM_ENGINES; i++) |
Chris Wilson | b471618 | 2015-04-27 13:41:17 +0100 | [diff] [blame] | 192 | err_printf(m, "%02x ", err->rseqno[i]); |
| 193 | |
| 194 | err_printf(m, "] %02x", err->wseqno); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 195 | err_puts(m, tiling_flag(err->tiling)); |
| 196 | err_puts(m, dirty_flag(err->dirty)); |
| 197 | err_puts(m, purgeable_flag(err->purgeable)); |
Chris Wilson | 5cc9ed4 | 2014-05-16 14:22:37 +0100 | [diff] [blame] | 198 | err_puts(m, err->userptr ? " userptr" : ""); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 199 | err_puts(m, err->engine != -1 ? " " : ""); |
| 200 | err_puts(m, engine_str(err->engine)); |
Chris Wilson | 0a4cd7c | 2014-08-22 14:41:39 +0100 | [diff] [blame] | 201 | err_puts(m, i915_cache_level_str(m->i915, err->cache_level)); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 202 | |
| 203 | if (err->name) |
| 204 | err_printf(m, " (name: %d)", err->name); |
| 205 | if (err->fence_reg != I915_FENCE_REG_NONE) |
| 206 | err_printf(m, " (fence: %d)", err->fence_reg); |
| 207 | |
| 208 | err_puts(m, "\n"); |
| 209 | err++; |
| 210 | } |
| 211 | } |
| 212 | |
Chris Wilson | 7e37f88 | 2016-08-02 22:50:21 +0100 | [diff] [blame] | 213 | static const char *hangcheck_action_to_str(enum intel_engine_hangcheck_action a) |
Mika Kuoppala | da66146 | 2013-09-06 16:03:28 +0300 | [diff] [blame] | 214 | { |
| 215 | switch (a) { |
| 216 | case HANGCHECK_IDLE: |
| 217 | return "idle"; |
| 218 | case HANGCHECK_WAIT: |
| 219 | return "wait"; |
| 220 | case HANGCHECK_ACTIVE: |
| 221 | return "active"; |
| 222 | case HANGCHECK_KICK: |
| 223 | return "kick"; |
| 224 | case HANGCHECK_HUNG: |
| 225 | return "hung"; |
| 226 | } |
| 227 | |
| 228 | return "unknown"; |
| 229 | } |
| 230 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 231 | static void error_print_engine(struct drm_i915_error_state_buf *m, |
| 232 | struct drm_i915_error_engine *ee) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 233 | { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 234 | err_printf(m, "%s command stream:\n", engine_str(ee->engine_id)); |
| 235 | err_printf(m, " START: 0x%08x\n", ee->start); |
| 236 | err_printf(m, " HEAD: 0x%08x\n", ee->head); |
| 237 | err_printf(m, " TAIL: 0x%08x\n", ee->tail); |
| 238 | err_printf(m, " CTL: 0x%08x\n", ee->ctl); |
Chris Wilson | 21a2c58 | 2016-08-15 10:49:11 +0100 | [diff] [blame] | 239 | err_printf(m, " MODE: 0x%08x\n", ee->mode); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 240 | err_printf(m, " HWS: 0x%08x\n", ee->hws); |
| 241 | err_printf(m, " ACTHD: 0x%08x %08x\n", |
| 242 | (u32)(ee->acthd>>32), (u32)ee->acthd); |
| 243 | err_printf(m, " IPEIR: 0x%08x\n", ee->ipeir); |
| 244 | err_printf(m, " IPEHR: 0x%08x\n", ee->ipehr); |
| 245 | err_printf(m, " INSTDONE: 0x%08x\n", ee->instdone); |
Chris Wilson | 03382df | 2016-08-15 10:49:09 +0100 | [diff] [blame] | 246 | if (ee->batchbuffer) { |
| 247 | u64 start = ee->batchbuffer->gtt_offset; |
| 248 | u64 end = start + ee->batchbuffer->gtt_size; |
| 249 | |
| 250 | err_printf(m, " batch: [0x%08x_%08x, 0x%08x_%08x]\n", |
| 251 | upper_32_bits(start), lower_32_bits(start), |
| 252 | upper_32_bits(end), lower_32_bits(end)); |
| 253 | } |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 254 | if (INTEL_GEN(m->i915) >= 4) { |
Chris Wilson | 03382df | 2016-08-15 10:49:09 +0100 | [diff] [blame] | 255 | err_printf(m, " BBADDR: 0x%08x_%08x\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 256 | (u32)(ee->bbaddr>>32), (u32)ee->bbaddr); |
| 257 | err_printf(m, " BB_STATE: 0x%08x\n", ee->bbstate); |
| 258 | err_printf(m, " INSTPS: 0x%08x\n", ee->instps); |
Ville Syrjälä | 3dda20a | 2013-12-10 21:44:43 +0200 | [diff] [blame] | 259 | } |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 260 | err_printf(m, " INSTPM: 0x%08x\n", ee->instpm); |
| 261 | err_printf(m, " FADDR: 0x%08x %08x\n", upper_32_bits(ee->faddr), |
| 262 | lower_32_bits(ee->faddr)); |
| 263 | if (INTEL_GEN(m->i915) >= 6) { |
| 264 | err_printf(m, " RC PSMI: 0x%08x\n", ee->rc_psmi); |
| 265 | err_printf(m, " FAULT_REG: 0x%08x\n", ee->fault_reg); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 266 | err_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 267 | ee->semaphore_mboxes[0], |
| 268 | ee->semaphore_seqno[0]); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 269 | err_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 270 | ee->semaphore_mboxes[1], |
| 271 | ee->semaphore_seqno[1]); |
| 272 | if (HAS_VEBOX(m->i915)) { |
Ben Widawsky | 4e5aabf | 2013-08-12 16:53:04 -0700 | [diff] [blame] | 273 | err_printf(m, " SYNC_2: 0x%08x [last synced 0x%08x]\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 274 | ee->semaphore_mboxes[2], |
| 275 | ee->semaphore_seqno[2]); |
Ben Widawsky | 4e5aabf | 2013-08-12 16:53:04 -0700 | [diff] [blame] | 276 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 277 | } |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 278 | if (USES_PPGTT(m->i915)) { |
| 279 | err_printf(m, " GFX_MODE: 0x%08x\n", ee->vm_info.gfx_mode); |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 280 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 281 | if (INTEL_GEN(m->i915) >= 8) { |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 282 | int i; |
| 283 | for (i = 0; i < 4; i++) |
| 284 | err_printf(m, " PDP%d: 0x%016llx\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 285 | i, ee->vm_info.pdp[i]); |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 286 | } else { |
| 287 | err_printf(m, " PP_DIR_BASE: 0x%08x\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 288 | ee->vm_info.pp_dir_base); |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 289 | } |
| 290 | } |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 291 | err_printf(m, " seqno: 0x%08x\n", ee->seqno); |
| 292 | err_printf(m, " last_seqno: 0x%08x\n", ee->last_seqno); |
| 293 | err_printf(m, " waiting: %s\n", yesno(ee->waiting)); |
| 294 | err_printf(m, " ring->head: 0x%08x\n", ee->cpu_ring_head); |
| 295 | err_printf(m, " ring->tail: 0x%08x\n", ee->cpu_ring_tail); |
Mika Kuoppala | da66146 | 2013-09-06 16:03:28 +0300 | [diff] [blame] | 296 | err_printf(m, " hangcheck: %s [%d]\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 297 | hangcheck_action_to_str(ee->hangcheck_action), |
| 298 | ee->hangcheck_score); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) |
| 302 | { |
| 303 | va_list args; |
| 304 | |
| 305 | va_start(args, f); |
| 306 | i915_error_vprintf(e, f, args); |
| 307 | va_end(args); |
| 308 | } |
| 309 | |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 310 | static void print_error_obj(struct drm_i915_error_state_buf *m, |
| 311 | struct drm_i915_error_object *obj) |
| 312 | { |
| 313 | int page, offset, elt; |
| 314 | |
| 315 | for (page = offset = 0; page < obj->page_count; page++) { |
| 316 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
| 317 | err_printf(m, "%08x : %08x\n", offset, |
| 318 | obj->pages[page][elt]); |
| 319 | offset += 4; |
| 320 | } |
| 321 | } |
| 322 | } |
| 323 | |
Chris Wilson | 2bd160a | 2016-08-15 10:48:45 +0100 | [diff] [blame] | 324 | static void err_print_capabilities(struct drm_i915_error_state_buf *m, |
| 325 | const struct intel_device_info *info) |
| 326 | { |
| 327 | #define PRINT_FLAG(x) err_printf(m, #x ": %s\n", yesno(info->x)) |
| 328 | #define SEP_SEMICOLON ; |
| 329 | DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON); |
| 330 | #undef PRINT_FLAG |
| 331 | #undef SEP_SEMICOLON |
| 332 | } |
| 333 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 334 | int i915_error_state_to_str(struct drm_i915_error_state_buf *m, |
| 335 | const struct i915_error_state_file_priv *error_priv) |
| 336 | { |
| 337 | struct drm_device *dev = error_priv->dev; |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 338 | struct drm_i915_private *dev_priv = to_i915(dev); |
David Weinehall | 52a05c3 | 2016-08-22 13:32:44 +0300 | [diff] [blame] | 339 | struct pci_dev *pdev = dev_priv->drm.pdev; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 340 | struct drm_i915_error_state *error = error_priv->error; |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 341 | struct drm_i915_error_object *obj; |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 342 | int i, j, offset, elt; |
| 343 | int max_hangcheck_score; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 344 | |
| 345 | if (!error) { |
| 346 | err_printf(m, "no error state collected\n"); |
| 347 | goto out; |
| 348 | } |
| 349 | |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 350 | err_printf(m, "%s\n", error->error_msg); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 351 | err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
| 352 | error->time.tv_usec); |
| 353 | err_printf(m, "Kernel: " UTS_RELEASE "\n"); |
Chris Wilson | 2bd160a | 2016-08-15 10:48:45 +0100 | [diff] [blame] | 354 | err_print_capabilities(m, &error->device_info); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 355 | max_hangcheck_score = 0; |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 356 | for (i = 0; i < ARRAY_SIZE(error->engine); i++) { |
| 357 | if (error->engine[i].hangcheck_score > max_hangcheck_score) |
| 358 | max_hangcheck_score = error->engine[i].hangcheck_score; |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 359 | } |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 360 | for (i = 0; i < ARRAY_SIZE(error->engine); i++) { |
| 361 | if (error->engine[i].hangcheck_score == max_hangcheck_score && |
| 362 | error->engine[i].pid != -1) { |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 363 | err_printf(m, "Active process (on ring %s): %s [%d]\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 364 | engine_str(i), |
| 365 | error->engine[i].comm, |
| 366 | error->engine[i].pid); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 367 | } |
| 368 | } |
Mika Kuoppala | 48b031e | 2014-02-25 17:11:27 +0200 | [diff] [blame] | 369 | err_printf(m, "Reset count: %u\n", error->reset_count); |
Mika Kuoppala | 62d5d69 | 2014-02-25 17:11:28 +0200 | [diff] [blame] | 370 | err_printf(m, "Suspend count: %u\n", error->suspend_count); |
David Weinehall | 52a05c3 | 2016-08-22 13:32:44 +0300 | [diff] [blame] | 371 | err_printf(m, "PCI ID: 0x%04x\n", pdev->device); |
| 372 | err_printf(m, "PCI Revision: 0x%02x\n", pdev->revision); |
Arun Siluvery | 06e6ff8 | 2016-01-28 17:18:41 +0000 | [diff] [blame] | 373 | err_printf(m, "PCI Subsystem: %04x:%04x\n", |
David Weinehall | 52a05c3 | 2016-08-22 13:32:44 +0300 | [diff] [blame] | 374 | pdev->subsystem_vendor, |
| 375 | pdev->subsystem_device); |
Chris Wilson | eb5be9d | 2015-08-07 20:24:15 +0100 | [diff] [blame] | 376 | err_printf(m, "IOMMU enabled?: %d\n", error->iommu); |
Mika Kuoppala | 0ac7655 | 2015-10-29 15:21:19 +0200 | [diff] [blame] | 377 | |
| 378 | if (HAS_CSR(dev)) { |
| 379 | struct intel_csr *csr = &dev_priv->csr; |
| 380 | |
| 381 | err_printf(m, "DMC loaded: %s\n", |
| 382 | yesno(csr->dmc_payload != NULL)); |
| 383 | err_printf(m, "DMC fw version: %d.%d\n", |
| 384 | CSR_VERSION_MAJOR(csr->version), |
| 385 | CSR_VERSION_MINOR(csr->version)); |
| 386 | } |
| 387 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 388 | err_printf(m, "EIR: 0x%08x\n", error->eir); |
| 389 | err_printf(m, "IER: 0x%08x\n", error->ier); |
Rodrigo Vivi | 885ea5a | 2014-08-05 10:07:13 -0700 | [diff] [blame] | 390 | if (INTEL_INFO(dev)->gen >= 8) { |
| 391 | for (i = 0; i < 4; i++) |
| 392 | err_printf(m, "GTIER gt %d: 0x%08x\n", i, |
| 393 | error->gtier[i]); |
| 394 | } else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev)) |
| 395 | err_printf(m, "GTIER: 0x%08x\n", error->gtier[0]); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 396 | err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
| 397 | err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); |
| 398 | err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); |
| 399 | err_printf(m, "CCID: 0x%08x\n", error->ccid); |
Chris Wilson | 094f9a5 | 2013-09-25 17:34:55 +0100 | [diff] [blame] | 400 | err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 401 | |
| 402 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
| 403 | err_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); |
| 404 | |
| 405 | for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++) |
| 406 | err_printf(m, " INSTDONE_%d: 0x%08x\n", i, |
| 407 | error->extra_instdone[i]); |
| 408 | |
| 409 | if (INTEL_INFO(dev)->gen >= 6) { |
| 410 | err_printf(m, "ERROR: 0x%08x\n", error->error); |
Mika Kuoppala | 6c826f3 | 2015-03-24 14:54:19 +0200 | [diff] [blame] | 411 | |
| 412 | if (INTEL_INFO(dev)->gen >= 8) |
| 413 | err_printf(m, "FAULT_TLB_DATA: 0x%08x 0x%08x\n", |
| 414 | error->fault_data1, error->fault_data0); |
| 415 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 416 | err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); |
| 417 | } |
| 418 | |
Tvrtko Ursulin | 7e22dbb | 2016-05-10 10:57:06 +0100 | [diff] [blame] | 419 | if (IS_GEN7(dev)) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 420 | err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); |
| 421 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 422 | for (i = 0; i < ARRAY_SIZE(error->engine); i++) { |
| 423 | if (error->engine[i].engine_id != -1) |
| 424 | error_print_engine(m, &error->engine[i]); |
| 425 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 426 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 427 | for (i = 0; i < ARRAY_SIZE(error->active_vm); i++) { |
| 428 | char buf[128]; |
| 429 | int len, first = 1; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 430 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 431 | if (!error->active_vm[i]) |
| 432 | break; |
| 433 | |
| 434 | len = scnprintf(buf, sizeof(buf), "Active ("); |
| 435 | for (j = 0; j < ARRAY_SIZE(error->engine); j++) { |
| 436 | if (error->engine[j].vm != error->active_vm[i]) |
| 437 | continue; |
| 438 | |
| 439 | len += scnprintf(buf + len, sizeof(buf), "%s%s", |
| 440 | first ? "" : ", ", |
| 441 | dev_priv->engine[j].name); |
| 442 | first = 0; |
| 443 | } |
| 444 | scnprintf(buf + len, sizeof(buf), ")"); |
| 445 | print_error_buffers(m, buf, |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 446 | error->active_bo[i], |
| 447 | error->active_bo_count[i]); |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 448 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 449 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 450 | print_error_buffers(m, "Pinned (global)", |
| 451 | error->pinned_bo, |
| 452 | error->pinned_bo_count); |
| 453 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 454 | for (i = 0; i < ARRAY_SIZE(error->engine); i++) { |
| 455 | struct drm_i915_error_engine *ee = &error->engine[i]; |
| 456 | |
| 457 | obj = ee->batchbuffer; |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 458 | if (obj) { |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 459 | err_puts(m, dev_priv->engine[i].name); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 460 | if (ee->pid != -1) |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 461 | err_printf(m, " (submitted by %s [%d])", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 462 | ee->comm, |
| 463 | ee->pid); |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 464 | err_printf(m, " --- gtt_offset = 0x%08x %08x\n", |
| 465 | upper_32_bits(obj->gtt_offset), |
| 466 | lower_32_bits(obj->gtt_offset)); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 467 | print_error_obj(m, obj); |
| 468 | } |
| 469 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 470 | obj = ee->wa_batchbuffer; |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 471 | if (obj) { |
| 472 | err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n", |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 473 | dev_priv->engine[i].name, |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 474 | lower_32_bits(obj->gtt_offset)); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 475 | print_error_obj(m, obj); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 476 | } |
| 477 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 478 | if (ee->num_requests) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 479 | err_printf(m, "%s --- %d requests\n", |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 480 | dev_priv->engine[i].name, |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 481 | ee->num_requests); |
| 482 | for (j = 0; j < ee->num_requests; j++) { |
Chris Wilson | c84455b | 2016-08-15 10:49:08 +0100 | [diff] [blame] | 483 | err_printf(m, " pid %d, seqno 0x%08x, emitted %ld, head 0x%08x, tail 0x%08x\n", |
| 484 | ee->requests[j].pid, |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 485 | ee->requests[j].seqno, |
| 486 | ee->requests[j].jiffies, |
Chris Wilson | d045446 | 2016-08-15 10:48:40 +0100 | [diff] [blame] | 487 | ee->requests[j].head, |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 488 | ee->requests[j].tail); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 489 | } |
| 490 | } |
| 491 | |
Chris Wilson | 19eb918 | 2016-09-06 08:38:44 +0100 | [diff] [blame] | 492 | if (IS_ERR(ee->waiters)) { |
| 493 | err_printf(m, "%s --- ? waiters [unable to acquire spinlock]\n", |
| 494 | dev_priv->engine[i].name); |
| 495 | } else if (ee->num_waiters) { |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 496 | err_printf(m, "%s --- %d waiters\n", |
| 497 | dev_priv->engine[i].name, |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 498 | ee->num_waiters); |
| 499 | for (j = 0; j < ee->num_waiters; j++) { |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 500 | err_printf(m, " seqno 0x%08x for %s [%d]\n", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 501 | ee->waiters[j].seqno, |
| 502 | ee->waiters[j].comm, |
| 503 | ee->waiters[j].pid); |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 504 | } |
| 505 | } |
| 506 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 507 | if ((obj = ee->ringbuffer)) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 508 | err_printf(m, "%s --- ringbuffer = 0x%08x\n", |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 509 | dev_priv->engine[i].name, |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 510 | lower_32_bits(obj->gtt_offset)); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 511 | print_error_obj(m, obj); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 512 | } |
| 513 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 514 | if ((obj = ee->hws_page)) { |
Jesse Barnes | 3a5a039 | 2015-09-15 10:03:01 -0700 | [diff] [blame] | 515 | u64 hws_offset = obj->gtt_offset; |
| 516 | u32 *hws_page = &obj->pages[0][0]; |
| 517 | |
| 518 | if (i915.enable_execlists) { |
| 519 | hws_offset += LRC_PPHWSP_PN * PAGE_SIZE; |
| 520 | hws_page = &obj->pages[LRC_PPHWSP_PN][0]; |
| 521 | } |
Alex Dai | d167519 | 2015-08-12 15:43:43 +0100 | [diff] [blame] | 522 | err_printf(m, "%s --- HW Status = 0x%08llx\n", |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 523 | dev_priv->engine[i].name, hws_offset); |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 524 | offset = 0; |
| 525 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
| 526 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
| 527 | offset, |
Jesse Barnes | 3a5a039 | 2015-09-15 10:03:01 -0700 | [diff] [blame] | 528 | hws_page[elt], |
| 529 | hws_page[elt+1], |
| 530 | hws_page[elt+2], |
| 531 | hws_page[elt+3]); |
Chris Wilson | a98b7e5 | 2016-07-02 15:36:01 +0100 | [diff] [blame] | 532 | offset += 16; |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 533 | } |
| 534 | } |
| 535 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 536 | obj = ee->wa_ctx; |
arun.siluvery@linux.intel.com | f85db05 | 2016-03-01 11:24:36 +0000 | [diff] [blame] | 537 | if (obj) { |
| 538 | u64 wa_ctx_offset = obj->gtt_offset; |
| 539 | u32 *wa_ctx_page = &obj->pages[0][0]; |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 540 | struct intel_engine_cs *engine = &dev_priv->engine[RCS]; |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 541 | u32 wa_ctx_size = (engine->wa_ctx.indirect_ctx.size + |
| 542 | engine->wa_ctx.per_ctx.size); |
arun.siluvery@linux.intel.com | f85db05 | 2016-03-01 11:24:36 +0000 | [diff] [blame] | 543 | |
| 544 | err_printf(m, "%s --- WA ctx batch buffer = 0x%08llx\n", |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 545 | dev_priv->engine[i].name, wa_ctx_offset); |
arun.siluvery@linux.intel.com | f85db05 | 2016-03-01 11:24:36 +0000 | [diff] [blame] | 546 | offset = 0; |
| 547 | for (elt = 0; elt < wa_ctx_size; elt += 4) { |
| 548 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
| 549 | offset, |
| 550 | wa_ctx_page[elt + 0], |
| 551 | wa_ctx_page[elt + 1], |
| 552 | wa_ctx_page[elt + 2], |
| 553 | wa_ctx_page[elt + 3]); |
| 554 | offset += 16; |
| 555 | } |
| 556 | } |
| 557 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 558 | if ((obj = ee->ctx)) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 559 | err_printf(m, "%s --- HW Context = 0x%08x\n", |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 560 | dev_priv->engine[i].name, |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 561 | lower_32_bits(obj->gtt_offset)); |
Ben Widawsky | 17d3674 | 2014-04-05 14:55:53 -0700 | [diff] [blame] | 562 | print_error_obj(m, obj); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 563 | } |
| 564 | } |
| 565 | |
Chris Wilson | 51d545d | 2016-08-15 10:49:02 +0100 | [diff] [blame] | 566 | if ((obj = error->semaphore)) { |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 567 | err_printf(m, "Semaphore page = 0x%08x\n", |
| 568 | lower_32_bits(obj->gtt_offset)); |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 569 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
| 570 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
| 571 | elt * 4, |
| 572 | obj->pages[0][elt], |
| 573 | obj->pages[0][elt+1], |
| 574 | obj->pages[0][elt+2], |
| 575 | obj->pages[0][elt+3]); |
| 576 | } |
| 577 | } |
| 578 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 579 | if (error->overlay) |
| 580 | intel_overlay_print_error_state(m, error->overlay); |
| 581 | |
| 582 | if (error->display) |
| 583 | intel_display_print_error_state(m, dev, error->display); |
| 584 | |
| 585 | out: |
| 586 | if (m->bytes == 0 && m->err) |
| 587 | return m->err; |
| 588 | |
| 589 | return 0; |
| 590 | } |
| 591 | |
| 592 | int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, |
Chris Wilson | 0a4cd7c | 2014-08-22 14:41:39 +0100 | [diff] [blame] | 593 | struct drm_i915_private *i915, |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 594 | size_t count, loff_t pos) |
| 595 | { |
| 596 | memset(ebuf, 0, sizeof(*ebuf)); |
Chris Wilson | 0a4cd7c | 2014-08-22 14:41:39 +0100 | [diff] [blame] | 597 | ebuf->i915 = i915; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 598 | |
| 599 | /* We need to have enough room to store any i915_error_state printf |
| 600 | * so that we can move it to start position. |
| 601 | */ |
| 602 | ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE; |
| 603 | ebuf->buf = kmalloc(ebuf->size, |
| 604 | GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN); |
| 605 | |
| 606 | if (ebuf->buf == NULL) { |
| 607 | ebuf->size = PAGE_SIZE; |
| 608 | ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); |
| 609 | } |
| 610 | |
| 611 | if (ebuf->buf == NULL) { |
| 612 | ebuf->size = 128; |
| 613 | ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); |
| 614 | } |
| 615 | |
| 616 | if (ebuf->buf == NULL) |
| 617 | return -ENOMEM; |
| 618 | |
| 619 | ebuf->start = pos; |
| 620 | |
| 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | static void i915_error_object_free(struct drm_i915_error_object *obj) |
| 625 | { |
| 626 | int page; |
| 627 | |
| 628 | if (obj == NULL) |
| 629 | return; |
| 630 | |
| 631 | for (page = 0; page < obj->page_count; page++) |
| 632 | kfree(obj->pages[page]); |
| 633 | |
| 634 | kfree(obj); |
| 635 | } |
| 636 | |
| 637 | static void i915_error_state_free(struct kref *error_ref) |
| 638 | { |
| 639 | struct drm_i915_error_state *error = container_of(error_ref, |
| 640 | typeof(*error), ref); |
| 641 | int i; |
| 642 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 643 | for (i = 0; i < ARRAY_SIZE(error->engine); i++) { |
| 644 | struct drm_i915_error_engine *ee = &error->engine[i]; |
| 645 | |
| 646 | i915_error_object_free(ee->batchbuffer); |
| 647 | i915_error_object_free(ee->wa_batchbuffer); |
| 648 | i915_error_object_free(ee->ringbuffer); |
| 649 | i915_error_object_free(ee->hws_page); |
| 650 | i915_error_object_free(ee->ctx); |
| 651 | i915_error_object_free(ee->wa_ctx); |
| 652 | |
| 653 | kfree(ee->requests); |
Chris Wilson | 19eb918 | 2016-09-06 08:38:44 +0100 | [diff] [blame] | 654 | if (!IS_ERR_OR_NULL(ee->waiters)) |
| 655 | kfree(ee->waiters); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 656 | } |
| 657 | |
Chris Wilson | 51d545d | 2016-08-15 10:49:02 +0100 | [diff] [blame] | 658 | i915_error_object_free(error->semaphore); |
Michel Thierry | 0b37a9a | 2015-03-20 09:41:03 +0000 | [diff] [blame] | 659 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 660 | for (i = 0; i < ARRAY_SIZE(error->active_bo); i++) |
Michel Thierry | 0b37a9a | 2015-03-20 09:41:03 +0000 | [diff] [blame] | 661 | kfree(error->active_bo[i]); |
Michel Thierry | 0b37a9a | 2015-03-20 09:41:03 +0000 | [diff] [blame] | 662 | kfree(error->pinned_bo); |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 663 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 664 | kfree(error->overlay); |
| 665 | kfree(error->display); |
| 666 | kfree(error); |
| 667 | } |
| 668 | |
| 669 | static struct drm_i915_error_object * |
Chris Wilson | 8ae62dc | 2014-08-12 20:05:49 +0100 | [diff] [blame] | 670 | i915_error_object_create(struct drm_i915_private *dev_priv, |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 671 | struct i915_vma *vma) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 672 | { |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 673 | struct i915_ggtt *ggtt = &dev_priv->ggtt; |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 674 | struct drm_i915_gem_object *src; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 675 | struct drm_i915_error_object *dst; |
Chris Wilson | 8ae62dc | 2014-08-12 20:05:49 +0100 | [diff] [blame] | 676 | int num_pages; |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 677 | bool use_ggtt; |
| 678 | int i = 0; |
Michel Thierry | e1f1232 | 2015-07-29 17:23:56 +0100 | [diff] [blame] | 679 | u64 reloc_offset; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 680 | |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 681 | if (!vma) |
| 682 | return NULL; |
| 683 | |
| 684 | src = vma->obj; |
| 685 | if (!src->pages) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 686 | return NULL; |
| 687 | |
Chris Wilson | 8ae62dc | 2014-08-12 20:05:49 +0100 | [diff] [blame] | 688 | num_pages = src->base.size >> PAGE_SHIFT; |
| 689 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 690 | dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 691 | if (!dst) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 692 | return NULL; |
| 693 | |
Chris Wilson | 03382df | 2016-08-15 10:49:09 +0100 | [diff] [blame] | 694 | dst->gtt_offset = vma->node.start; |
| 695 | dst->gtt_size = vma->node.size; |
| 696 | |
| 697 | reloc_offset = dst->gtt_offset; |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 698 | use_ggtt = (src->cache_level == I915_CACHE_NONE && |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 699 | (vma->flags & I915_VMA_GLOBAL_BIND) && |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 700 | reloc_offset + num_pages * PAGE_SIZE <= ggtt->mappable_end); |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 701 | |
| 702 | /* Cannot access stolen address directly, try to use the aperture */ |
| 703 | if (src->stolen) { |
| 704 | use_ggtt = true; |
| 705 | |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 706 | if (!(vma->flags & I915_VMA_GLOBAL_BIND)) |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 707 | goto unwind; |
| 708 | |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 709 | reloc_offset = vma->node.start; |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 710 | if (reloc_offset + num_pages * PAGE_SIZE > ggtt->mappable_end) |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 711 | goto unwind; |
| 712 | } |
| 713 | |
| 714 | /* Cannot access snooped pages through the aperture */ |
Joonas Lahtinen | 2d1fe07 | 2016-04-07 11:08:05 +0300 | [diff] [blame] | 715 | if (use_ggtt && src->cache_level != I915_CACHE_NONE && |
| 716 | !HAS_LLC(dev_priv)) |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 717 | goto unwind; |
| 718 | |
| 719 | dst->page_count = num_pages; |
| 720 | while (num_pages--) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 721 | unsigned long flags; |
| 722 | void *d; |
| 723 | |
| 724 | d = kmalloc(PAGE_SIZE, GFP_ATOMIC); |
| 725 | if (d == NULL) |
| 726 | goto unwind; |
| 727 | |
| 728 | local_irq_save(flags); |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 729 | if (use_ggtt) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 730 | void __iomem *s; |
| 731 | |
| 732 | /* Simply ignore tiling or any overlapping fence. |
| 733 | * It's part of the error state, and this hopefully |
| 734 | * captures what the GPU read. |
| 735 | */ |
| 736 | |
Chris Wilson | f7bbe78 | 2016-08-19 16:54:27 +0100 | [diff] [blame] | 737 | s = io_mapping_map_atomic_wc(&ggtt->mappable, |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 738 | reloc_offset); |
| 739 | memcpy_fromio(d, s, PAGE_SIZE); |
| 740 | io_mapping_unmap_atomic(s); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 741 | } else { |
| 742 | struct page *page; |
| 743 | void *s; |
| 744 | |
| 745 | page = i915_gem_object_get_page(src, i); |
| 746 | |
| 747 | drm_clflush_pages(&page, 1); |
| 748 | |
| 749 | s = kmap_atomic(page); |
| 750 | memcpy(d, s, PAGE_SIZE); |
| 751 | kunmap_atomic(s); |
| 752 | |
| 753 | drm_clflush_pages(&page, 1); |
| 754 | } |
| 755 | local_irq_restore(flags); |
| 756 | |
Chris Wilson | b3c3f5e | 2014-08-12 20:05:48 +0100 | [diff] [blame] | 757 | dst->pages[i++] = d; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 758 | reloc_offset += PAGE_SIZE; |
| 759 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 760 | |
| 761 | return dst; |
| 762 | |
| 763 | unwind: |
| 764 | while (i--) |
| 765 | kfree(dst->pages[i]); |
| 766 | kfree(dst); |
| 767 | return NULL; |
| 768 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 769 | |
Chris Wilson | d72d908 | 2016-08-04 07:52:31 +0100 | [diff] [blame] | 770 | /* The error capture is special as tries to run underneath the normal |
| 771 | * locking rules - so we use the raw version of the i915_gem_active lookup. |
| 772 | */ |
| 773 | static inline uint32_t |
| 774 | __active_get_seqno(struct i915_gem_active *active) |
| 775 | { |
| 776 | return i915_gem_request_get_seqno(__i915_gem_active_peek(active)); |
| 777 | } |
| 778 | |
| 779 | static inline int |
| 780 | __active_get_engine_id(struct i915_gem_active *active) |
| 781 | { |
| 782 | struct intel_engine_cs *engine; |
| 783 | |
| 784 | engine = i915_gem_request_get_engine(__i915_gem_active_peek(active)); |
| 785 | return engine ? engine->id : -1; |
| 786 | } |
| 787 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 788 | static void capture_bo(struct drm_i915_error_buffer *err, |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 789 | struct i915_vma *vma) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 790 | { |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 791 | struct drm_i915_gem_object *obj = vma->obj; |
Chris Wilson | b471618 | 2015-04-27 13:41:17 +0100 | [diff] [blame] | 792 | int i; |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 793 | |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 794 | err->size = obj->base.size; |
| 795 | err->name = obj->base.name; |
Chris Wilson | d72d908 | 2016-08-04 07:52:31 +0100 | [diff] [blame] | 796 | |
Tvrtko Ursulin | 666796d | 2016-03-16 11:00:39 +0000 | [diff] [blame] | 797 | for (i = 0; i < I915_NUM_ENGINES; i++) |
Chris Wilson | d72d908 | 2016-08-04 07:52:31 +0100 | [diff] [blame] | 798 | err->rseqno[i] = __active_get_seqno(&obj->last_read[i]); |
| 799 | err->wseqno = __active_get_seqno(&obj->last_write); |
| 800 | err->engine = __active_get_engine_id(&obj->last_write); |
| 801 | |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 802 | err->gtt_offset = vma->node.start; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 803 | err->read_domains = obj->base.read_domains; |
| 804 | err->write_domain = obj->base.write_domain; |
Chris Wilson | 49ef529 | 2016-08-18 17:17:00 +0100 | [diff] [blame] | 805 | err->fence_reg = vma->fence ? vma->fence->id : -1; |
Chris Wilson | 3e510a8 | 2016-08-05 10:14:23 +0100 | [diff] [blame] | 806 | err->tiling = i915_gem_object_get_tiling(obj); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 807 | err->dirty = obj->dirty; |
| 808 | err->purgeable = obj->madv != I915_MADV_WILLNEED; |
Chris Wilson | 5cc9ed4 | 2014-05-16 14:22:37 +0100 | [diff] [blame] | 809 | err->userptr = obj->userptr.mm != NULL; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 810 | err->cache_level = obj->cache_level; |
| 811 | } |
| 812 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 813 | static u32 capture_error_bo(struct drm_i915_error_buffer *err, |
| 814 | int count, struct list_head *head, |
| 815 | bool pinned_only) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 816 | { |
Ben Widawsky | ca191b1 | 2013-07-31 17:00:14 -0700 | [diff] [blame] | 817 | struct i915_vma *vma; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 818 | int i = 0; |
| 819 | |
Chris Wilson | 1c7f4bc | 2016-02-26 11:03:19 +0000 | [diff] [blame] | 820 | list_for_each_entry(vma, head, vm_link) { |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 821 | if (pinned_only && !i915_vma_is_pinned(vma)) |
| 822 | continue; |
| 823 | |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 824 | capture_bo(err++, vma); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 825 | if (++i == count) |
| 826 | break; |
| 827 | } |
| 828 | |
| 829 | return i; |
| 830 | } |
| 831 | |
Ben Widawsky | 011cf57 | 2014-02-04 12:18:55 +0000 | [diff] [blame] | 832 | /* Generate a semi-unique error code. The code is not meant to have meaning, The |
| 833 | * code's only purpose is to try to prevent false duplicated bug reports by |
| 834 | * grossly estimating a GPU error state. |
| 835 | * |
| 836 | * TODO Ideally, hashing the batchbuffer would be a very nice way to determine |
| 837 | * the hang if we could strip the GTT offset information from it. |
| 838 | * |
| 839 | * It's only a small step better than a random number in its current form. |
| 840 | */ |
| 841 | static uint32_t i915_error_generate_code(struct drm_i915_private *dev_priv, |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 842 | struct drm_i915_error_state *error, |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 843 | int *engine_id) |
Ben Widawsky | 011cf57 | 2014-02-04 12:18:55 +0000 | [diff] [blame] | 844 | { |
| 845 | uint32_t error_code = 0; |
| 846 | int i; |
| 847 | |
| 848 | /* IPEHR would be an ideal way to detect errors, as it's the gross |
| 849 | * measure of "the command that hung." However, has some very common |
| 850 | * synchronization commands which almost always appear in the case |
| 851 | * strictly a client bug. Use instdone to differentiate those some. |
| 852 | */ |
Tvrtko Ursulin | 666796d | 2016-03-16 11:00:39 +0000 | [diff] [blame] | 853 | for (i = 0; i < I915_NUM_ENGINES; i++) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 854 | if (error->engine[i].hangcheck_action == HANGCHECK_HUNG) { |
| 855 | if (engine_id) |
| 856 | *engine_id = i; |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 857 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 858 | return error->engine[i].ipehr ^ error->engine[i].instdone; |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 859 | } |
| 860 | } |
Ben Widawsky | 011cf57 | 2014-02-04 12:18:55 +0000 | [diff] [blame] | 861 | |
| 862 | return error_code; |
| 863 | } |
| 864 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 865 | static void i915_gem_record_fences(struct drm_i915_private *dev_priv, |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 866 | struct drm_i915_error_state *error) |
| 867 | { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 868 | int i; |
| 869 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 870 | if (IS_GEN3(dev_priv) || IS_GEN2(dev_priv)) { |
Rodrigo Vivi | ce38ab0 | 2014-12-04 06:48:10 -0800 | [diff] [blame] | 871 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
Ville Syrjälä | eecf613 | 2015-09-21 18:05:14 +0300 | [diff] [blame] | 872 | error->fence[i] = I915_READ(FENCE_REG(i)); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 873 | } else if (IS_GEN5(dev_priv) || IS_GEN4(dev_priv)) { |
Ville Syrjälä | eecf613 | 2015-09-21 18:05:14 +0300 | [diff] [blame] | 874 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
| 875 | error->fence[i] = I915_READ64(FENCE_REG_965_LO(i)); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 876 | } else if (INTEL_GEN(dev_priv) >= 6) { |
Ville Syrjälä | eecf613 | 2015-09-21 18:05:14 +0300 | [diff] [blame] | 877 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
| 878 | error->fence[i] = I915_READ64(FENCE_REG_GEN6_LO(i)); |
| 879 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 880 | } |
| 881 | |
Ben Widawsky | 87f85eb | 2014-06-30 09:53:40 -0700 | [diff] [blame] | 882 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 883 | static void gen8_record_semaphore_state(struct drm_i915_error_state *error, |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 884 | struct intel_engine_cs *engine, |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 885 | struct drm_i915_error_engine *ee) |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 886 | { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 887 | struct drm_i915_private *dev_priv = engine->i915; |
Rodrigo Vivi | b4558b4 | 2014-07-18 02:19:40 -0700 | [diff] [blame] | 888 | struct intel_engine_cs *to; |
Dave Gordon | c3232b1 | 2016-03-23 18:19:53 +0000 | [diff] [blame] | 889 | enum intel_engine_id id; |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 890 | |
Chris Wilson | 51d545d | 2016-08-15 10:49:02 +0100 | [diff] [blame] | 891 | if (!error->semaphore) |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 892 | return; |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 893 | |
Dave Gordon | c3232b1 | 2016-03-23 18:19:53 +0000 | [diff] [blame] | 894 | for_each_engine_id(to, dev_priv, id) { |
Rodrigo Vivi | b4558b4 | 2014-07-18 02:19:40 -0700 | [diff] [blame] | 895 | int idx; |
| 896 | u16 signal_offset; |
| 897 | u32 *tmp; |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 898 | |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 899 | if (engine == to) |
Rodrigo Vivi | b4558b4 | 2014-07-18 02:19:40 -0700 | [diff] [blame] | 900 | continue; |
| 901 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 902 | signal_offset = |
| 903 | (GEN8_SIGNAL_OFFSET(engine, id) & (PAGE_SIZE - 1)) / 4; |
Chris Wilson | 51d545d | 2016-08-15 10:49:02 +0100 | [diff] [blame] | 904 | tmp = error->semaphore->pages[0]; |
Chris Wilson | 7e37f88 | 2016-08-02 22:50:21 +0100 | [diff] [blame] | 905 | idx = intel_engine_sync_index(engine, to); |
Rodrigo Vivi | b4558b4 | 2014-07-18 02:19:40 -0700 | [diff] [blame] | 906 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 907 | ee->semaphore_mboxes[idx] = tmp[signal_offset]; |
| 908 | ee->semaphore_seqno[idx] = engine->semaphore.sync_seqno[idx]; |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 909 | } |
| 910 | } |
| 911 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 912 | static void gen6_record_semaphore_state(struct intel_engine_cs *engine, |
| 913 | struct drm_i915_error_engine *ee) |
Ben Widawsky | 87f85eb | 2014-06-30 09:53:40 -0700 | [diff] [blame] | 914 | { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 915 | struct drm_i915_private *dev_priv = engine->i915; |
| 916 | |
| 917 | ee->semaphore_mboxes[0] = I915_READ(RING_SYNC_0(engine->mmio_base)); |
| 918 | ee->semaphore_mboxes[1] = I915_READ(RING_SYNC_1(engine->mmio_base)); |
| 919 | ee->semaphore_seqno[0] = engine->semaphore.sync_seqno[0]; |
| 920 | ee->semaphore_seqno[1] = engine->semaphore.sync_seqno[1]; |
Ben Widawsky | 87f85eb | 2014-06-30 09:53:40 -0700 | [diff] [blame] | 921 | |
Joonas Lahtinen | 2d1fe07 | 2016-04-07 11:08:05 +0300 | [diff] [blame] | 922 | if (HAS_VEBOX(dev_priv)) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 923 | ee->semaphore_mboxes[2] = |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 924 | I915_READ(RING_SYNC_2(engine->mmio_base)); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 925 | ee->semaphore_seqno[2] = engine->semaphore.sync_seqno[2]; |
Ben Widawsky | 87f85eb | 2014-06-30 09:53:40 -0700 | [diff] [blame] | 926 | } |
| 927 | } |
| 928 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 929 | static void error_record_engine_waiters(struct intel_engine_cs *engine, |
| 930 | struct drm_i915_error_engine *ee) |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 931 | { |
| 932 | struct intel_breadcrumbs *b = &engine->breadcrumbs; |
| 933 | struct drm_i915_error_waiter *waiter; |
| 934 | struct rb_node *rb; |
| 935 | int count; |
| 936 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 937 | ee->num_waiters = 0; |
| 938 | ee->waiters = NULL; |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 939 | |
Chris Wilson | 19eb918 | 2016-09-06 08:38:44 +0100 | [diff] [blame] | 940 | if (RB_EMPTY_ROOT(&b->waiters)) |
| 941 | return; |
| 942 | |
| 943 | if (!spin_trylock(&b->lock)) { |
| 944 | ee->waiters = ERR_PTR(-EDEADLK); |
| 945 | return; |
| 946 | } |
| 947 | |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 948 | count = 0; |
| 949 | for (rb = rb_first(&b->waiters); rb != NULL; rb = rb_next(rb)) |
| 950 | count++; |
| 951 | spin_unlock(&b->lock); |
| 952 | |
| 953 | waiter = NULL; |
| 954 | if (count) |
| 955 | waiter = kmalloc_array(count, |
| 956 | sizeof(struct drm_i915_error_waiter), |
| 957 | GFP_ATOMIC); |
| 958 | if (!waiter) |
| 959 | return; |
| 960 | |
Chris Wilson | 19eb918 | 2016-09-06 08:38:44 +0100 | [diff] [blame] | 961 | if (!spin_trylock(&b->lock)) { |
| 962 | kfree(waiter); |
| 963 | ee->waiters = ERR_PTR(-EDEADLK); |
| 964 | return; |
| 965 | } |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 966 | |
Chris Wilson | 19eb918 | 2016-09-06 08:38:44 +0100 | [diff] [blame] | 967 | ee->waiters = waiter; |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 968 | for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) { |
| 969 | struct intel_wait *w = container_of(rb, typeof(*w), node); |
| 970 | |
| 971 | strcpy(waiter->comm, w->tsk->comm); |
| 972 | waiter->pid = w->tsk->pid; |
| 973 | waiter->seqno = w->seqno; |
| 974 | waiter++; |
| 975 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 976 | if (++ee->num_waiters == count) |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 977 | break; |
| 978 | } |
| 979 | spin_unlock(&b->lock); |
| 980 | } |
| 981 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 982 | static void error_record_engine_registers(struct drm_i915_error_state *error, |
| 983 | struct intel_engine_cs *engine, |
| 984 | struct drm_i915_error_engine *ee) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 985 | { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 986 | struct drm_i915_private *dev_priv = engine->i915; |
| 987 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 988 | if (INTEL_GEN(dev_priv) >= 6) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 989 | ee->rc_psmi = I915_READ(RING_PSMI_CTL(engine->mmio_base)); |
| 990 | ee->fault_reg = I915_READ(RING_FAULT_REG(engine)); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 991 | if (INTEL_GEN(dev_priv) >= 8) |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 992 | gen8_record_semaphore_state(error, engine, ee); |
Ben Widawsky | 0ca36d7 | 2014-06-30 09:53:41 -0700 | [diff] [blame] | 993 | else |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 994 | gen6_record_semaphore_state(engine, ee); |
Ben Widawsky | 4e5aabf | 2013-08-12 16:53:04 -0700 | [diff] [blame] | 995 | } |
| 996 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 997 | if (INTEL_GEN(dev_priv) >= 4) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 998 | ee->faddr = I915_READ(RING_DMA_FADD(engine->mmio_base)); |
| 999 | ee->ipeir = I915_READ(RING_IPEIR(engine->mmio_base)); |
| 1000 | ee->ipehr = I915_READ(RING_IPEHR(engine->mmio_base)); |
| 1001 | ee->instdone = I915_READ(RING_INSTDONE(engine->mmio_base)); |
| 1002 | ee->instps = I915_READ(RING_INSTPS(engine->mmio_base)); |
| 1003 | ee->bbaddr = I915_READ(RING_BBADDR(engine->mmio_base)); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1004 | if (INTEL_GEN(dev_priv) >= 8) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1005 | ee->faddr |= (u64) I915_READ(RING_DMA_FADD_UDW(engine->mmio_base)) << 32; |
| 1006 | ee->bbaddr |= (u64) I915_READ(RING_BBADDR_UDW(engine->mmio_base)) << 32; |
Ben Widawsky | 13ffadd | 2014-04-01 16:31:07 -0700 | [diff] [blame] | 1007 | } |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1008 | ee->bbstate = I915_READ(RING_BBSTATE(engine->mmio_base)); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1009 | } else { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1010 | ee->faddr = I915_READ(DMA_FADD_I8XX); |
| 1011 | ee->ipeir = I915_READ(IPEIR); |
| 1012 | ee->ipehr = I915_READ(IPEHR); |
| 1013 | ee->instdone = I915_READ(GEN2_INSTDONE); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1014 | } |
| 1015 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1016 | ee->waiting = intel_engine_has_waiter(engine); |
| 1017 | ee->instpm = I915_READ(RING_INSTPM(engine->mmio_base)); |
Chris Wilson | 7e37f88 | 2016-08-02 22:50:21 +0100 | [diff] [blame] | 1018 | ee->acthd = intel_engine_get_active_head(engine); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1019 | ee->seqno = intel_engine_get_seqno(engine); |
| 1020 | ee->last_seqno = engine->last_submitted_seqno; |
| 1021 | ee->start = I915_READ_START(engine); |
| 1022 | ee->head = I915_READ_HEAD(engine); |
| 1023 | ee->tail = I915_READ_TAIL(engine); |
| 1024 | ee->ctl = I915_READ_CTL(engine); |
Chris Wilson | 21a2c58 | 2016-08-15 10:49:11 +0100 | [diff] [blame] | 1025 | if (INTEL_GEN(dev_priv) > 2) |
| 1026 | ee->mode = I915_READ_MODE(engine); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1027 | |
Carlos Santa | 3177659 | 2016-08-17 12:30:56 -0700 | [diff] [blame] | 1028 | if (!HWS_NEEDS_PHYSICAL(dev_priv)) { |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 1029 | i915_reg_t mmio; |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 1030 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1031 | if (IS_GEN7(dev_priv)) { |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1032 | switch (engine->id) { |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 1033 | default: |
| 1034 | case RCS: |
| 1035 | mmio = RENDER_HWS_PGA_GEN7; |
| 1036 | break; |
| 1037 | case BCS: |
| 1038 | mmio = BLT_HWS_PGA_GEN7; |
| 1039 | break; |
| 1040 | case VCS: |
| 1041 | mmio = BSD_HWS_PGA_GEN7; |
| 1042 | break; |
| 1043 | case VECS: |
| 1044 | mmio = VEBOX_HWS_PGA_GEN7; |
| 1045 | break; |
| 1046 | } |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1047 | } else if (IS_GEN6(engine->i915)) { |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1048 | mmio = RING_HWS_PGA_GEN6(engine->mmio_base); |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 1049 | } else { |
| 1050 | /* XXX: gen8 returns to sanity */ |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1051 | mmio = RING_HWS_PGA(engine->mmio_base); |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 1052 | } |
| 1053 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1054 | ee->hws = I915_READ(mmio); |
Chris Wilson | f3ce382 | 2014-01-23 22:40:36 +0000 | [diff] [blame] | 1055 | } |
| 1056 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1057 | ee->hangcheck_score = engine->hangcheck.score; |
| 1058 | ee->hangcheck_action = engine->hangcheck.action; |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 1059 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1060 | if (USES_PPGTT(dev_priv)) { |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 1061 | int i; |
| 1062 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1063 | ee->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(engine)); |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 1064 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1065 | if (IS_GEN6(dev_priv)) |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1066 | ee->vm_info.pp_dir_base = |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1067 | I915_READ(RING_PP_DIR_BASE_READ(engine)); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1068 | else if (IS_GEN7(dev_priv)) |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1069 | ee->vm_info.pp_dir_base = |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1070 | I915_READ(RING_PP_DIR_BASE(engine)); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1071 | else if (INTEL_GEN(dev_priv) >= 8) |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 1072 | for (i = 0; i < 4; i++) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1073 | ee->vm_info.pdp[i] = |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1074 | I915_READ(GEN8_RING_PDP_UDW(engine, i)); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1075 | ee->vm_info.pdp[i] <<= 32; |
| 1076 | ee->vm_info.pdp[i] |= |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1077 | I915_READ(GEN8_RING_PDP_LDW(engine, i)); |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 1078 | } |
Ben Widawsky | 6c7a01e | 2014-01-30 00:19:40 -0800 | [diff] [blame] | 1079 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1080 | } |
| 1081 | |
Chris Wilson | 57bc699 | 2016-08-15 10:49:10 +0100 | [diff] [blame] | 1082 | static void engine_record_requests(struct intel_engine_cs *engine, |
| 1083 | struct drm_i915_gem_request *first, |
| 1084 | struct drm_i915_error_engine *ee) |
| 1085 | { |
| 1086 | struct drm_i915_gem_request *request; |
| 1087 | int count; |
| 1088 | |
| 1089 | count = 0; |
| 1090 | request = first; |
| 1091 | list_for_each_entry_from(request, &engine->request_list, link) |
| 1092 | count++; |
| 1093 | if (!count) |
| 1094 | return; |
| 1095 | |
| 1096 | ee->requests = kcalloc(count, sizeof(*ee->requests), GFP_ATOMIC); |
| 1097 | if (!ee->requests) |
| 1098 | return; |
| 1099 | |
| 1100 | ee->num_requests = count; |
| 1101 | |
| 1102 | count = 0; |
| 1103 | request = first; |
| 1104 | list_for_each_entry_from(request, &engine->request_list, link) { |
| 1105 | struct drm_i915_error_request *erq; |
| 1106 | |
| 1107 | if (count >= ee->num_requests) { |
| 1108 | /* |
| 1109 | * If the ring request list was changed in |
| 1110 | * between the point where the error request |
| 1111 | * list was created and dimensioned and this |
| 1112 | * point then just exit early to avoid crashes. |
| 1113 | * |
| 1114 | * We don't need to communicate that the |
| 1115 | * request list changed state during error |
| 1116 | * state capture and that the error state is |
| 1117 | * slightly incorrect as a consequence since we |
| 1118 | * are typically only interested in the request |
| 1119 | * list state at the point of error state |
| 1120 | * capture, not in any changes happening during |
| 1121 | * the capture. |
| 1122 | */ |
| 1123 | break; |
| 1124 | } |
| 1125 | |
| 1126 | erq = &ee->requests[count++]; |
| 1127 | erq->seqno = request->fence.seqno; |
| 1128 | erq->jiffies = request->emitted_jiffies; |
| 1129 | erq->head = request->head; |
| 1130 | erq->tail = request->tail; |
| 1131 | |
| 1132 | rcu_read_lock(); |
| 1133 | erq->pid = request->ctx->pid ? pid_nr(request->ctx->pid) : 0; |
| 1134 | rcu_read_unlock(); |
| 1135 | } |
| 1136 | ee->num_requests = count; |
| 1137 | } |
| 1138 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1139 | static void i915_gem_record_rings(struct drm_i915_private *dev_priv, |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1140 | struct drm_i915_error_state *error) |
| 1141 | { |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 1142 | struct i915_ggtt *ggtt = &dev_priv->ggtt; |
Chris Wilson | 57bc699 | 2016-08-15 10:49:10 +0100 | [diff] [blame] | 1143 | int i; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1144 | |
Chris Wilson | 51d545d | 2016-08-15 10:49:02 +0100 | [diff] [blame] | 1145 | error->semaphore = |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1146 | i915_error_object_create(dev_priv, dev_priv->semaphore); |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1147 | |
Tvrtko Ursulin | 666796d | 2016-03-16 11:00:39 +0000 | [diff] [blame] | 1148 | for (i = 0; i < I915_NUM_ENGINES; i++) { |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 1149 | struct intel_engine_cs *engine = &dev_priv->engine[i]; |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1150 | struct drm_i915_error_engine *ee = &error->engine[i]; |
Chris Wilson | 57bc699 | 2016-08-15 10:49:10 +0100 | [diff] [blame] | 1151 | struct drm_i915_gem_request *request; |
Chris Wilson | 372fbb8 | 2014-01-27 13:52:34 +0000 | [diff] [blame] | 1152 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1153 | ee->pid = -1; |
| 1154 | ee->engine_id = -1; |
Chris Wilson | eee73b4 | 2014-06-10 12:09:29 +0100 | [diff] [blame] | 1155 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1156 | if (!intel_engine_initialized(engine)) |
Chris Wilson | 372fbb8 | 2014-01-27 13:52:34 +0000 | [diff] [blame] | 1157 | continue; |
| 1158 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1159 | ee->engine_id = i; |
Chris Wilson | 372fbb8 | 2014-01-27 13:52:34 +0000 | [diff] [blame] | 1160 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1161 | error_record_engine_registers(error, engine, ee); |
| 1162 | error_record_engine_waiters(engine, ee); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1163 | |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1164 | request = i915_gem_find_active_request(engine); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1165 | if (request) { |
Chris Wilson | 7e37f88 | 2016-08-02 22:50:21 +0100 | [diff] [blame] | 1166 | struct intel_ring *ring; |
Chris Wilson | c84455b | 2016-08-15 10:49:08 +0100 | [diff] [blame] | 1167 | struct pid *pid; |
Daniel Vetter | ae6c480 | 2014-08-06 15:04:53 +0200 | [diff] [blame] | 1168 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1169 | ee->vm = request->ctx->ppgtt ? |
Chris Wilson | bc3d674 | 2016-07-04 08:08:39 +0100 | [diff] [blame] | 1170 | &request->ctx->ppgtt->base : &ggtt->base; |
Daniel Vetter | ae6c480 | 2014-08-06 15:04:53 +0200 | [diff] [blame] | 1171 | |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1172 | /* We need to copy these to an anonymous buffer |
| 1173 | * as the simplest method to avoid being overwritten |
| 1174 | * by userspace. |
| 1175 | */ |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1176 | ee->batchbuffer = |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1177 | i915_error_object_create(dev_priv, |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1178 | request->batch); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1179 | |
Joonas Lahtinen | 2d1fe07 | 2016-04-07 11:08:05 +0300 | [diff] [blame] | 1180 | if (HAS_BROKEN_CS_TLB(dev_priv)) |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1181 | ee->wa_batchbuffer = |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1182 | i915_error_object_create(dev_priv, |
| 1183 | engine->scratch); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1184 | |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1185 | ee->ctx = |
| 1186 | i915_error_object_create(dev_priv, |
| 1187 | request->ctx->engine[i].state); |
Chris Wilson | 546b1b6 | 2016-08-15 10:48:42 +0100 | [diff] [blame] | 1188 | |
Chris Wilson | c84455b | 2016-08-15 10:49:08 +0100 | [diff] [blame] | 1189 | pid = request->ctx->pid; |
| 1190 | if (pid) { |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1191 | struct task_struct *task; |
| 1192 | |
| 1193 | rcu_read_lock(); |
Chris Wilson | c84455b | 2016-08-15 10:49:08 +0100 | [diff] [blame] | 1194 | task = pid_task(pid, PIDTYPE_PID); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1195 | if (task) { |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1196 | strcpy(ee->comm, task->comm); |
| 1197 | ee->pid = task->pid; |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1198 | } |
| 1199 | rcu_read_unlock(); |
| 1200 | } |
Chris Wilson | ba6e041 | 2016-07-04 08:08:38 +0100 | [diff] [blame] | 1201 | |
Chris Wilson | bc3d674 | 2016-07-04 08:08:39 +0100 | [diff] [blame] | 1202 | error->simulated |= |
| 1203 | request->ctx->flags & CONTEXT_NO_ERROR_CAPTURE; |
| 1204 | |
Chris Wilson | 1dae2df | 2016-08-02 22:50:19 +0100 | [diff] [blame] | 1205 | ring = request->ring; |
| 1206 | ee->cpu_ring_head = ring->head; |
| 1207 | ee->cpu_ring_tail = ring->tail; |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1208 | ee->ringbuffer = |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1209 | i915_error_object_create(dev_priv, ring->vma); |
Chris Wilson | 57bc699 | 2016-08-15 10:49:10 +0100 | [diff] [blame] | 1210 | |
| 1211 | engine_record_requests(engine, request, ee); |
Chris Wilson | ab0e7ff | 2014-02-25 17:11:24 +0200 | [diff] [blame] | 1212 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1213 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1214 | ee->hws_page = |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1215 | i915_error_object_create(dev_priv, |
| 1216 | engine->status_page.vma); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1217 | |
Chris Wilson | 058d88c | 2016-08-15 10:49:06 +0100 | [diff] [blame] | 1218 | ee->wa_ctx = |
| 1219 | i915_error_object_create(dev_priv, engine->wa_ctx.vma); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1220 | } |
| 1221 | } |
| 1222 | |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1223 | static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, |
| 1224 | struct drm_i915_error_state *error, |
| 1225 | struct i915_address_space *vm, |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1226 | int idx) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1227 | { |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1228 | struct drm_i915_error_buffer *active_bo; |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1229 | struct i915_vma *vma; |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1230 | int count; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1231 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1232 | count = 0; |
Chris Wilson | 1c7f4bc | 2016-02-26 11:03:19 +0000 | [diff] [blame] | 1233 | list_for_each_entry(vma, &vm->active_list, vm_link) |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1234 | count++; |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 1235 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1236 | active_bo = NULL; |
| 1237 | if (count) |
| 1238 | active_bo = kcalloc(count, sizeof(*active_bo), GFP_ATOMIC); |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1239 | if (active_bo) |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1240 | count = capture_error_bo(active_bo, count, &vm->active_list, false); |
| 1241 | else |
| 1242 | count = 0; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1243 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1244 | error->active_vm[idx] = vm; |
| 1245 | error->active_bo[idx] = active_bo; |
| 1246 | error->active_bo_count[idx] = count; |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1247 | } |
| 1248 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1249 | static void i915_capture_active_buffers(struct drm_i915_private *dev_priv, |
| 1250 | struct drm_i915_error_state *error) |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1251 | { |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1252 | int cnt = 0, i, j; |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1253 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1254 | BUILD_BUG_ON(ARRAY_SIZE(error->engine) > ARRAY_SIZE(error->active_bo)); |
| 1255 | BUILD_BUG_ON(ARRAY_SIZE(error->active_bo) != ARRAY_SIZE(error->active_vm)); |
| 1256 | BUILD_BUG_ON(ARRAY_SIZE(error->active_bo) != ARRAY_SIZE(error->active_bo_count)); |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1257 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1258 | /* Scan each engine looking for unique active contexts/vm */ |
| 1259 | for (i = 0; i < ARRAY_SIZE(error->engine); i++) { |
| 1260 | struct drm_i915_error_engine *ee = &error->engine[i]; |
| 1261 | bool found; |
Ben Widawsky | 95f5301 | 2013-07-31 17:00:15 -0700 | [diff] [blame] | 1262 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1263 | if (!ee->vm) |
| 1264 | continue; |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 1265 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1266 | found = false; |
| 1267 | for (j = 0; j < i && !found; j++) |
| 1268 | found = error->engine[j].vm == ee->vm; |
| 1269 | if (!found) |
| 1270 | i915_gem_capture_vm(dev_priv, error, ee->vm, cnt++); |
Chris Wilson | 3a44873 | 2014-08-12 20:05:47 +0100 | [diff] [blame] | 1271 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1272 | } |
| 1273 | |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1274 | static void i915_capture_pinned_buffers(struct drm_i915_private *dev_priv, |
| 1275 | struct drm_i915_error_state *error) |
| 1276 | { |
| 1277 | struct i915_address_space *vm = &dev_priv->ggtt.base; |
| 1278 | struct drm_i915_error_buffer *bo; |
| 1279 | struct i915_vma *vma; |
| 1280 | int count_inactive, count_active; |
| 1281 | |
| 1282 | count_inactive = 0; |
| 1283 | list_for_each_entry(vma, &vm->active_list, vm_link) |
| 1284 | count_inactive++; |
| 1285 | |
| 1286 | count_active = 0; |
| 1287 | list_for_each_entry(vma, &vm->inactive_list, vm_link) |
| 1288 | count_active++; |
| 1289 | |
| 1290 | bo = NULL; |
| 1291 | if (count_inactive + count_active) |
| 1292 | bo = kcalloc(count_inactive + count_active, |
| 1293 | sizeof(*bo), GFP_ATOMIC); |
| 1294 | if (!bo) |
| 1295 | return; |
| 1296 | |
| 1297 | count_inactive = capture_error_bo(bo, count_inactive, |
| 1298 | &vm->active_list, true); |
| 1299 | count_active = capture_error_bo(bo + count_inactive, count_active, |
| 1300 | &vm->inactive_list, true); |
| 1301 | error->pinned_bo_count = count_inactive + count_active; |
| 1302 | error->pinned_bo = bo; |
| 1303 | } |
| 1304 | |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1305 | /* Capture all registers which don't fit into another category. */ |
| 1306 | static void i915_capture_reg_state(struct drm_i915_private *dev_priv, |
| 1307 | struct drm_i915_error_state *error) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1308 | { |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 1309 | struct drm_device *dev = &dev_priv->drm; |
Rodrigo Vivi | 885ea5a | 2014-08-05 10:07:13 -0700 | [diff] [blame] | 1310 | int i; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1311 | |
Ben Widawsky | 654c90c | 2014-01-30 00:19:36 -0800 | [diff] [blame] | 1312 | /* General organization |
| 1313 | * 1. Registers specific to a single generation |
| 1314 | * 2. Registers which belong to multiple generations |
| 1315 | * 3. Feature specific registers. |
| 1316 | * 4. Everything else |
| 1317 | * Please try to follow the order. |
| 1318 | */ |
| 1319 | |
| 1320 | /* 1: Registers specific to a single generation */ |
| 1321 | if (IS_VALLEYVIEW(dev)) { |
Rodrigo Vivi | 885ea5a | 2014-08-05 10:07:13 -0700 | [diff] [blame] | 1322 | error->gtier[0] = I915_READ(GTIER); |
Rodrigo Vivi | 843db71 | 2014-08-01 09:12:27 -0700 | [diff] [blame] | 1323 | error->ier = I915_READ(VLV_IER); |
Ville Syrjälä | 4018169 | 2015-10-22 15:34:57 +0300 | [diff] [blame] | 1324 | error->forcewake = I915_READ_FW(FORCEWAKE_VLV); |
Ben Widawsky | 654c90c | 2014-01-30 00:19:36 -0800 | [diff] [blame] | 1325 | } |
| 1326 | |
| 1327 | if (IS_GEN7(dev)) |
| 1328 | error->err_int = I915_READ(GEN7_ERR_INT); |
| 1329 | |
Mika Kuoppala | 6c826f3 | 2015-03-24 14:54:19 +0200 | [diff] [blame] | 1330 | if (INTEL_INFO(dev)->gen >= 8) { |
| 1331 | error->fault_data0 = I915_READ(GEN8_FAULT_TLB_DATA0); |
| 1332 | error->fault_data1 = I915_READ(GEN8_FAULT_TLB_DATA1); |
| 1333 | } |
| 1334 | |
Ben Widawsky | 91ec5d1 | 2014-01-30 00:19:39 -0800 | [diff] [blame] | 1335 | if (IS_GEN6(dev)) { |
Ville Syrjälä | 4018169 | 2015-10-22 15:34:57 +0300 | [diff] [blame] | 1336 | error->forcewake = I915_READ_FW(FORCEWAKE); |
Ben Widawsky | 91ec5d1 | 2014-01-30 00:19:39 -0800 | [diff] [blame] | 1337 | error->gab_ctl = I915_READ(GAB_CTL); |
| 1338 | error->gfx_mode = I915_READ(GFX_MODE); |
| 1339 | } |
Ben Widawsky | 654c90c | 2014-01-30 00:19:36 -0800 | [diff] [blame] | 1340 | |
Ben Widawsky | 654c90c | 2014-01-30 00:19:36 -0800 | [diff] [blame] | 1341 | /* 2: Registers which belong to multiple generations */ |
| 1342 | if (INTEL_INFO(dev)->gen >= 7) |
Ville Syrjälä | 4018169 | 2015-10-22 15:34:57 +0300 | [diff] [blame] | 1343 | error->forcewake = I915_READ_FW(FORCEWAKE_MT); |
Ben Widawsky | 654c90c | 2014-01-30 00:19:36 -0800 | [diff] [blame] | 1344 | |
| 1345 | if (INTEL_INFO(dev)->gen >= 6) { |
| 1346 | error->derrmr = I915_READ(DERRMR); |
| 1347 | error->error = I915_READ(ERROR_GEN6); |
| 1348 | error->done_reg = I915_READ(DONE_REG); |
| 1349 | } |
| 1350 | |
| 1351 | /* 3: Feature specific registers */ |
Ben Widawsky | 91ec5d1 | 2014-01-30 00:19:39 -0800 | [diff] [blame] | 1352 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
| 1353 | error->gam_ecochk = I915_READ(GAM_ECOCHK); |
| 1354 | error->gac_eco = I915_READ(GAC_ECO_BITS); |
| 1355 | } |
| 1356 | |
| 1357 | /* 4: Everything else */ |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1358 | if (HAS_HW_CONTEXTS(dev)) |
| 1359 | error->ccid = I915_READ(CCID); |
| 1360 | |
Rodrigo Vivi | 885ea5a | 2014-08-05 10:07:13 -0700 | [diff] [blame] | 1361 | if (INTEL_INFO(dev)->gen >= 8) { |
| 1362 | error->ier = I915_READ(GEN8_DE_MISC_IER); |
| 1363 | for (i = 0; i < 4; i++) |
| 1364 | error->gtier[i] = I915_READ(GEN8_GT_IER(i)); |
| 1365 | } else if (HAS_PCH_SPLIT(dev)) { |
Rodrigo Vivi | 843db71 | 2014-08-01 09:12:27 -0700 | [diff] [blame] | 1366 | error->ier = I915_READ(DEIER); |
Rodrigo Vivi | 885ea5a | 2014-08-05 10:07:13 -0700 | [diff] [blame] | 1367 | error->gtier[0] = I915_READ(GTIER); |
Rodrigo Vivi | 843db71 | 2014-08-01 09:12:27 -0700 | [diff] [blame] | 1368 | } else if (IS_GEN2(dev)) { |
| 1369 | error->ier = I915_READ16(IER); |
| 1370 | } else if (!IS_VALLEYVIEW(dev)) { |
| 1371 | error->ier = I915_READ(IER); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1372 | } |
Ben Widawsky | 654c90c | 2014-01-30 00:19:36 -0800 | [diff] [blame] | 1373 | error->eir = I915_READ(EIR); |
| 1374 | error->pgtbl_er = I915_READ(PGTBL_ER); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1375 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1376 | i915_get_extra_instdone(dev_priv, error->extra_instdone); |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1377 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1378 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1379 | static void i915_error_capture_msg(struct drm_i915_private *dev_priv, |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1380 | struct drm_i915_error_state *error, |
arun.siluvery@linux.intel.com | 14b730f | 2016-03-18 20:07:55 +0000 | [diff] [blame] | 1381 | u32 engine_mask, |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1382 | const char *error_msg) |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1383 | { |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1384 | u32 ecode; |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1385 | int engine_id = -1, len; |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1386 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1387 | ecode = i915_error_generate_code(dev_priv, error, &engine_id); |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1388 | |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1389 | len = scnprintf(error->error_msg, sizeof(error->error_msg), |
Mika Kuoppala | 0b5492d | 2014-11-06 13:03:46 +0200 | [diff] [blame] | 1390 | "GPU HANG: ecode %d:%d:0x%08x", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1391 | INTEL_GEN(dev_priv), engine_id, ecode); |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1392 | |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1393 | if (engine_id != -1 && error->engine[engine_id].pid != -1) |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1394 | len += scnprintf(error->error_msg + len, |
| 1395 | sizeof(error->error_msg) - len, |
| 1396 | ", in %s [%d]", |
Chris Wilson | 6361f4b | 2016-07-27 09:07:28 +0100 | [diff] [blame] | 1397 | error->engine[engine_id].comm, |
| 1398 | error->engine[engine_id].pid); |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1399 | |
| 1400 | scnprintf(error->error_msg + len, sizeof(error->error_msg) - len, |
| 1401 | ", reason: %s, action: %s", |
| 1402 | error_msg, |
arun.siluvery@linux.intel.com | 14b730f | 2016-03-18 20:07:55 +0000 | [diff] [blame] | 1403 | engine_mask ? "reset" : "continue"); |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1404 | } |
| 1405 | |
Mika Kuoppala | 48b031e | 2014-02-25 17:11:27 +0200 | [diff] [blame] | 1406 | static void i915_capture_gen_state(struct drm_i915_private *dev_priv, |
| 1407 | struct drm_i915_error_state *error) |
| 1408 | { |
Chris Wilson | eb5be9d | 2015-08-07 20:24:15 +0100 | [diff] [blame] | 1409 | error->iommu = -1; |
| 1410 | #ifdef CONFIG_INTEL_IOMMU |
| 1411 | error->iommu = intel_iommu_gfx_mapped; |
| 1412 | #endif |
Mika Kuoppala | 48b031e | 2014-02-25 17:11:27 +0200 | [diff] [blame] | 1413 | error->reset_count = i915_reset_count(&dev_priv->gpu_error); |
Mika Kuoppala | 62d5d69 | 2014-02-25 17:11:28 +0200 | [diff] [blame] | 1414 | error->suspend_count = dev_priv->suspend_count; |
Chris Wilson | 2bd160a | 2016-08-15 10:48:45 +0100 | [diff] [blame] | 1415 | |
| 1416 | memcpy(&error->device_info, |
| 1417 | INTEL_INFO(dev_priv), |
| 1418 | sizeof(error->device_info)); |
Mika Kuoppala | 48b031e | 2014-02-25 17:11:27 +0200 | [diff] [blame] | 1419 | } |
| 1420 | |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1421 | /** |
| 1422 | * i915_capture_error_state - capture an error record for later analysis |
| 1423 | * @dev: drm device |
| 1424 | * |
| 1425 | * Should be called when an error is detected (either a hang or an error |
| 1426 | * interrupt) to capture error state from the time of the error. Fills |
| 1427 | * out a structure which becomes available in debugfs for user level tools |
| 1428 | * to pick up. |
| 1429 | */ |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1430 | void i915_capture_error_state(struct drm_i915_private *dev_priv, |
| 1431 | u32 engine_mask, |
Mika Kuoppala | 5817446 | 2014-02-25 17:11:26 +0200 | [diff] [blame] | 1432 | const char *error_msg) |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1433 | { |
Chris Wilson | 53a4c6b | 2014-01-30 14:38:15 +0000 | [diff] [blame] | 1434 | static bool warned; |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1435 | struct drm_i915_error_state *error; |
| 1436 | unsigned long flags; |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1437 | |
Chris Wilson | 9777cca | 2016-07-04 08:48:33 +0100 | [diff] [blame] | 1438 | if (READ_ONCE(dev_priv->gpu_error.first_error)) |
| 1439 | return; |
| 1440 | |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1441 | /* Account for pipe specific data like PIPE*STAT */ |
| 1442 | error = kzalloc(sizeof(*error), GFP_ATOMIC); |
| 1443 | if (!error) { |
| 1444 | DRM_DEBUG_DRIVER("out of memory, not capturing error state\n"); |
| 1445 | return; |
| 1446 | } |
| 1447 | |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1448 | kref_init(&error->ref); |
| 1449 | |
Mika Kuoppala | 48b031e | 2014-02-25 17:11:27 +0200 | [diff] [blame] | 1450 | i915_capture_gen_state(dev_priv, error); |
Ben Widawsky | 1d762aa | 2014-01-30 00:19:35 -0800 | [diff] [blame] | 1451 | i915_capture_reg_state(dev_priv, error); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1452 | i915_gem_record_fences(dev_priv, error); |
| 1453 | i915_gem_record_rings(dev_priv, error); |
Chris Wilson | c0ce466 | 2016-08-15 10:48:41 +0100 | [diff] [blame] | 1454 | i915_capture_active_buffers(dev_priv, error); |
| 1455 | i915_capture_pinned_buffers(dev_priv, error); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1456 | |
| 1457 | do_gettimeofday(&error->time); |
| 1458 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1459 | error->overlay = intel_overlay_capture_error_state(dev_priv); |
| 1460 | error->display = intel_display_capture_error_state(dev_priv); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1461 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1462 | i915_error_capture_msg(dev_priv, error, engine_mask, error_msg); |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1463 | DRM_INFO("%s\n", error->error_msg); |
| 1464 | |
Chris Wilson | bc3d674 | 2016-07-04 08:08:39 +0100 | [diff] [blame] | 1465 | if (!error->simulated) { |
| 1466 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
| 1467 | if (!dev_priv->gpu_error.first_error) { |
| 1468 | dev_priv->gpu_error.first_error = error; |
| 1469 | error = NULL; |
| 1470 | } |
| 1471 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1472 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1473 | |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1474 | if (error) { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1475 | i915_error_state_free(&error->ref); |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1476 | return; |
| 1477 | } |
| 1478 | |
| 1479 | if (!warned) { |
| 1480 | DRM_INFO("GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.\n"); |
| 1481 | DRM_INFO("Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel\n"); |
| 1482 | DRM_INFO("drm/i915 developers can then reassign to the right component if it's not a kernel issue.\n"); |
| 1483 | DRM_INFO("The gpu crash dump is required to analyze gpu hangs, so please always attach it.\n"); |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 1484 | DRM_INFO("GPU crash dump saved to /sys/class/drm/card%d/error\n", |
| 1485 | dev_priv->drm.primary->index); |
Mika Kuoppala | cb38300 | 2014-02-25 17:11:25 +0200 | [diff] [blame] | 1486 | warned = true; |
| 1487 | } |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1488 | } |
| 1489 | |
| 1490 | void i915_error_state_get(struct drm_device *dev, |
| 1491 | struct i915_error_state_file_priv *error_priv) |
| 1492 | { |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 1493 | struct drm_i915_private *dev_priv = to_i915(dev); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1494 | |
Daniel Vetter | 5b254c5 | 2014-09-15 14:55:24 +0200 | [diff] [blame] | 1495 | spin_lock_irq(&dev_priv->gpu_error.lock); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1496 | error_priv->error = dev_priv->gpu_error.first_error; |
| 1497 | if (error_priv->error) |
| 1498 | kref_get(&error_priv->error->ref); |
Daniel Vetter | 5b254c5 | 2014-09-15 14:55:24 +0200 | [diff] [blame] | 1499 | spin_unlock_irq(&dev_priv->gpu_error.lock); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1500 | |
| 1501 | } |
| 1502 | |
| 1503 | void i915_error_state_put(struct i915_error_state_file_priv *error_priv) |
| 1504 | { |
| 1505 | if (error_priv->error) |
| 1506 | kref_put(&error_priv->error->ref, i915_error_state_free); |
| 1507 | } |
| 1508 | |
| 1509 | void i915_destroy_error_state(struct drm_device *dev) |
| 1510 | { |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 1511 | struct drm_i915_private *dev_priv = to_i915(dev); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1512 | struct drm_i915_error_state *error; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1513 | |
Daniel Vetter | 5b254c5 | 2014-09-15 14:55:24 +0200 | [diff] [blame] | 1514 | spin_lock_irq(&dev_priv->gpu_error.lock); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1515 | error = dev_priv->gpu_error.first_error; |
| 1516 | dev_priv->gpu_error.first_error = NULL; |
Daniel Vetter | 5b254c5 | 2014-09-15 14:55:24 +0200 | [diff] [blame] | 1517 | spin_unlock_irq(&dev_priv->gpu_error.lock); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1518 | |
| 1519 | if (error) |
| 1520 | kref_put(&error->ref, i915_error_state_free); |
| 1521 | } |
| 1522 | |
Chris Wilson | 0a4cd7c | 2014-08-22 14:41:39 +0100 | [diff] [blame] | 1523 | const char *i915_cache_level_str(struct drm_i915_private *i915, int type) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1524 | { |
| 1525 | switch (type) { |
| 1526 | case I915_CACHE_NONE: return " uncached"; |
Chris Wilson | 0a4cd7c | 2014-08-22 14:41:39 +0100 | [diff] [blame] | 1527 | case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped"; |
Chris Wilson | 350ec88 | 2013-08-06 13:17:02 +0100 | [diff] [blame] | 1528 | case I915_CACHE_L3_LLC: return " L3+LLC"; |
Chris Wilson | f56383c | 2013-09-25 10:23:19 +0100 | [diff] [blame] | 1529 | case I915_CACHE_WT: return " WT"; |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1530 | default: return ""; |
| 1531 | } |
| 1532 | } |
| 1533 | |
| 1534 | /* NB: please notice the memset */ |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1535 | void i915_get_extra_instdone(struct drm_i915_private *dev_priv, |
| 1536 | uint32_t *instdone) |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1537 | { |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1538 | memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); |
| 1539 | |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1540 | if (IS_GEN2(dev_priv) || IS_GEN3(dev_priv)) |
Imre Deak | bd93a50 | 2015-09-30 23:00:43 +0300 | [diff] [blame] | 1541 | instdone[0] = I915_READ(GEN2_INSTDONE); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1542 | else if (IS_GEN4(dev_priv) || IS_GEN5(dev_priv) || IS_GEN6(dev_priv)) { |
Imre Deak | f1d5434 | 2015-09-30 23:00:42 +0300 | [diff] [blame] | 1543 | instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE)); |
Imre Deak | 13d70b8 | 2015-09-30 23:00:44 +0300 | [diff] [blame] | 1544 | instdone[1] = I915_READ(GEN4_INSTDONE1); |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1545 | } else if (INTEL_GEN(dev_priv) >= 7) { |
Imre Deak | f1d5434 | 2015-09-30 23:00:42 +0300 | [diff] [blame] | 1546 | instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE)); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1547 | instdone[1] = I915_READ(GEN7_SC_INSTDONE); |
| 1548 | instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); |
| 1549 | instdone[3] = I915_READ(GEN7_ROW_INSTDONE); |
Mika Kuoppala | 84734a0 | 2013-07-12 16:50:57 +0300 | [diff] [blame] | 1550 | } |
| 1551 | } |