blob: b3a04b521b225900c8ef10cdc14ec05e9e96ca61 [file] [log] [blame]
Jesse Barnes2d2ef822009-10-26 13:06:31 -07001<?xml version="1.0" encoding="UTF-8"?>
2<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
4
Lukas Wunner7f817072015-10-11 11:26:26 +02005<book id="gpuDevelopersGuide">
Jesse Barnes2d2ef822009-10-26 13:06:31 -07006 <bookinfo>
Daniel Vetter3a4579b2015-10-07 09:55:28 +02007 <title>Linux GPU Driver Developer's Guide</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07008
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02009 <authorgroup>
10 <author>
11 <firstname>Jesse</firstname>
12 <surname>Barnes</surname>
13 <contrib>Initial version</contrib>
14 <affiliation>
15 <orgname>Intel Corporation</orgname>
16 <address>
17 <email>jesse.barnes@intel.com</email>
18 </address>
19 </affiliation>
20 </author>
21 <author>
22 <firstname>Laurent</firstname>
23 <surname>Pinchart</surname>
24 <contrib>Driver internals</contrib>
25 <affiliation>
26 <orgname>Ideas on board SPRL</orgname>
27 <address>
28 <email>laurent.pinchart@ideasonboard.com</email>
29 </address>
30 </affiliation>
31 </author>
Daniel Vetter3a057002014-01-22 22:38:57 +010032 <author>
33 <firstname>Daniel</firstname>
34 <surname>Vetter</surname>
35 <contrib>Contributions all over the place</contrib>
36 <affiliation>
37 <orgname>Intel Corporation</orgname>
38 <address>
39 <email>daniel.vetter@ffwll.ch</email>
40 </address>
41 </affiliation>
42 </author>
Lukas Wunner6648f482015-10-11 11:55:00 +020043 <author>
44 <firstname>Lukas</firstname>
45 <surname>Wunner</surname>
46 <contrib>vga_switcheroo documentation</contrib>
47 <affiliation>
48 <address>
49 <email>lukas@wunner.de</email>
50 </address>
51 </affiliation>
52 </author>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +020053 </authorgroup>
54
Jesse Barnes2d2ef822009-10-26 13:06:31 -070055 <copyright>
56 <year>2008-2009</year>
Daniel Vetter3a057002014-01-22 22:38:57 +010057 <year>2013-2014</year>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +020058 <holder>Intel Corporation</holder>
Daniel Vetter3a057002014-01-22 22:38:57 +010059 </copyright>
60 <copyright>
61 <year>2012</year>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +020062 <holder>Laurent Pinchart</holder>
Jesse Barnes2d2ef822009-10-26 13:06:31 -070063 </copyright>
Lukas Wunner6648f482015-10-11 11:55:00 +020064 <copyright>
65 <year>2015</year>
66 <holder>Lukas Wunner</holder>
67 </copyright>
Jesse Barnes2d2ef822009-10-26 13:06:31 -070068
69 <legalnotice>
70 <para>
71 The contents of this file may be used under the terms of the GNU
72 General Public License version 2 (the "GPL") as distributed in
73 the kernel source COPYING file.
74 </para>
75 </legalnotice>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +020076
77 <revhistory>
78 <!-- Put document revisions here, newest first. -->
79 <revision>
80 <revnumber>1.0</revnumber>
81 <date>2012-07-13</date>
82 <authorinitials>LP</authorinitials>
83 <revremark>Added extensive documentation about driver internals.
84 </revremark>
85 </revision>
Lukas Wunner6648f482015-10-11 11:55:00 +020086 <revision>
87 <revnumber>1.1</revnumber>
88 <date>2015-10-11</date>
89 <authorinitials>LW</authorinitials>
90 <revremark>Added vga_switcheroo documentation.
91 </revremark>
92 </revision>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +020093 </revhistory>
Jesse Barnes2d2ef822009-10-26 13:06:31 -070094 </bookinfo>
95
96<toc></toc>
97
Daniel Vetter3519f702014-01-22 12:21:16 +010098<part id="drmCore">
99 <title>DRM Core</title>
100 <partintro>
101 <para>
Lukas Wunner7f817072015-10-11 11:26:26 +0200102 This first part of the GPU Driver Developer's Guide documents core DRM
103 code, helper libraries for writing drivers and generic userspace
104 interfaces exposed by DRM drivers.
Daniel Vetter3519f702014-01-22 12:21:16 +0100105 </para>
106 </partintro>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700107
108 <chapter id="drmIntroduction">
109 <title>Introduction</title>
110 <para>
111 The Linux DRM layer contains code intended to support the needs
112 of complex graphics devices, usually containing programmable
113 pipelines well suited to 3D graphics acceleration. Graphics
Michael Wittenf11aca02011-08-25 17:21:31 +0000114 drivers in the kernel may make use of DRM functions to make
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700115 tasks like memory management, interrupt handling and DMA easier,
116 and provide a uniform interface to applications.
117 </para>
118 <para>
119 A note on versions: this guide covers features found in the DRM
120 tree, including the TTM memory manager, output configuration and
121 mode setting, and the new vblank internals, in addition to all
122 the regular features found in current kernels.
123 </para>
124 <para>
125 [Insert diagram of typical DRM stack here]
126 </para>
Daniel Vetterfb9f7a62015-12-08 09:49:17 +0100127 <sect1>
128 <title>Style Guidelines</title>
129 <para>
130 For consistency this documentation uses American English. Abbreviations
131 are written as all-uppercase, for example: DRM, KMS, IOCTL, CRTC, and so
132 on. To aid in reading, documentations make full use of the markup
133 characters kerneldoc provides: @parameter for function parameters, @member
134 for structure members, &amp;structure to reference structures and
135 function() for functions. These all get automatically hyperlinked if
136 kerneldoc for the referenced objects exists. When referencing entries in
137 function vtables please use -&gt;vfunc(). Note that kerneldoc does
138 not support referencing struct members directly, so please add a reference
139 to the vtable struct somewhere in the same paragraph or at least section.
140 </para>
141 <para>
142 Except in special situations (to separate locked from unlocked variants)
143 locking requirements for functions aren't documented in the kerneldoc.
144 Instead locking should be check at runtime using e.g.
145 <code>WARN_ON(!mutex_is_locked(...));</code>. Since it's much easier to
146 ignore documentation than runtime noise this provides more value. And on
147 top of that runtime checks do need to be updated when the locking rules
148 change, increasing the chances that they're correct. Within the
149 documentation the locking rules should be explained in the relevant
150 structures: Either in the comment for the lock explaining what it
151 protects, or data fields need a note about which lock protects them, or
152 both.
153 </para>
154 <para>
155 Functions which have a non-<code>void</code> return value should have a
156 section called "Returns" explaining the expected return values in
157 different cases and their meanings. Currently there's no consensus whether
158 that section name should be all upper-case or not, and whether it should
159 end in a colon or not. Go with the file-local style. Other common section
160 names are "Notes" with information for dangerous or tricky corner cases,
161 and "FIXME" where the interface could be cleaned up.
162 </para>
163 </sect1>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700164 </chapter>
165
166 <!-- Internals -->
167
168 <chapter id="drmInternals">
169 <title>DRM Internals</title>
170 <para>
171 This chapter documents DRM internals relevant to driver authors
172 and developers working to add support for the latest features to
173 existing drivers.
174 </para>
175 <para>
Michael Wittena78f6782011-08-25 17:18:08 +0000176 First, we go over some typical driver initialization
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700177 requirements, like setting up command buffers, creating an
178 initial output configuration, and initializing core services.
Michael Wittena78f6782011-08-25 17:18:08 +0000179 Subsequent sections cover core internals in more detail,
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700180 providing implementation notes and examples.
181 </para>
182 <para>
183 The DRM layer provides several services to graphics drivers,
184 many of them driven by the application interfaces it provides
185 through libdrm, the library that wraps most of the DRM ioctls.
186 These include vblank event handling, memory
187 management, output management, framebuffer management, command
188 submission &amp; fencing, suspend/resume support, and DMA
189 services.
190 </para>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700191
192 <!-- Internals: driver init -->
193
194 <sect1>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200195 <title>Driver Initialization</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700196 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200197 At the core of every DRM driver is a <structname>drm_driver</structname>
198 structure. Drivers typically statically initialize a drm_driver structure,
Daniel Vetter6e3f7972015-09-28 21:46:35 +0200199 and then pass it to <function>drm_dev_alloc()</function> to allocate a
200 device instance. After the device instance is fully initialized it can be
201 registered (which makes it accessible from userspace) using
202 <function>drm_dev_register()</function>.
Thierry Redingb528ae72014-04-23 11:52:10 +0200203 </para>
204 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200205 The <structname>drm_driver</structname> structure contains static
206 information that describes the driver and features it supports, and
207 pointers to methods that the DRM core will call to implement the DRM API.
208 We will first go through the <structname>drm_driver</structname> static
209 information fields, and will then describe individual operations in
210 details as they get used in later sections.
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700211 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200212 <sect2>
213 <title>Driver Information</title>
214 <sect3>
215 <title>Driver Features</title>
216 <para>
217 Drivers inform the DRM core about their requirements and supported
218 features by setting appropriate flags in the
219 <structfield>driver_features</structfield> field. Since those flags
220 influence the DRM core behaviour since registration time, most of them
221 must be set to registering the <structname>drm_driver</structname>
222 instance.
223 </para>
224 <synopsis>u32 driver_features;</synopsis>
225 <variablelist>
226 <title>Driver Feature Flags</title>
227 <varlistentry>
228 <term>DRIVER_USE_AGP</term>
229 <listitem><para>
230 Driver uses AGP interface, the DRM core will manage AGP resources.
231 </para></listitem>
232 </varlistentry>
233 <varlistentry>
234 <term>DRIVER_REQUIRE_AGP</term>
235 <listitem><para>
236 Driver needs AGP interface to function. AGP initialization failure
237 will become a fatal error.
238 </para></listitem>
239 </varlistentry>
240 <varlistentry>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200241 <term>DRIVER_PCI_DMA</term>
242 <listitem><para>
243 Driver is capable of PCI DMA, mapping of PCI DMA buffers to
244 userspace will be enabled. Deprecated.
245 </para></listitem>
246 </varlistentry>
247 <varlistentry>
248 <term>DRIVER_SG</term>
249 <listitem><para>
250 Driver can perform scatter/gather DMA, allocation and mapping of
251 scatter/gather buffers will be enabled. Deprecated.
252 </para></listitem>
253 </varlistentry>
254 <varlistentry>
255 <term>DRIVER_HAVE_DMA</term>
256 <listitem><para>
257 Driver supports DMA, the userspace DMA API will be supported.
258 Deprecated.
259 </para></listitem>
260 </varlistentry>
261 <varlistentry>
262 <term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
263 <listitem><para>
Laurent Pinchart02b62982013-06-22 14:10:59 +0200264 DRIVER_HAVE_IRQ indicates whether the driver has an IRQ handler
265 managed by the DRM Core. The core will support simple IRQ handler
266 installation when the flag is set. The installation process is
267 described in <xref linkend="drm-irq-registration"/>.</para>
268 <para>DRIVER_IRQ_SHARED indicates whether the device &amp; handler
269 support shared IRQs (note that this is required of PCI drivers).
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200270 </para></listitem>
271 </varlistentry>
272 <varlistentry>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200273 <term>DRIVER_GEM</term>
274 <listitem><para>
275 Driver use the GEM memory manager.
276 </para></listitem>
277 </varlistentry>
278 <varlistentry>
279 <term>DRIVER_MODESET</term>
280 <listitem><para>
281 Driver supports mode setting interfaces (KMS).
282 </para></listitem>
283 </varlistentry>
284 <varlistentry>
285 <term>DRIVER_PRIME</term>
286 <listitem><para>
287 Driver implements DRM PRIME buffer sharing.
288 </para></listitem>
289 </varlistentry>
David Herrmann17931262013-08-25 18:29:00 +0200290 <varlistentry>
291 <term>DRIVER_RENDER</term>
292 <listitem><para>
293 Driver supports dedicated render nodes.
294 </para></listitem>
295 </varlistentry>
Rob Clark88a48e22014-12-18 16:01:50 -0500296 <varlistentry>
297 <term>DRIVER_ATOMIC</term>
298 <listitem><para>
299 Driver supports atomic properties. In this case the driver
300 must implement appropriate obj->atomic_get_property() vfuncs
301 for any modeset objects with driver specific properties.
302 </para></listitem>
303 </varlistentry>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200304 </variablelist>
305 </sect3>
306 <sect3>
307 <title>Major, Minor and Patchlevel</title>
308 <synopsis>int major;
309int minor;
310int patchlevel;</synopsis>
311 <para>
312 The DRM core identifies driver versions by a major, minor and patch
313 level triplet. The information is printed to the kernel log at
314 initialization time and passed to userspace through the
315 DRM_IOCTL_VERSION ioctl.
316 </para>
317 <para>
318 The major and minor numbers are also used to verify the requested driver
319 API version passed to DRM_IOCTL_SET_VERSION. When the driver API changes
320 between minor versions, applications can call DRM_IOCTL_SET_VERSION to
321 select a specific version of the API. If the requested major isn't equal
322 to the driver major, or the requested minor is larger than the driver
323 minor, the DRM_IOCTL_SET_VERSION call will return an error. Otherwise
324 the driver's set_version() method will be called with the requested
325 version.
326 </para>
327 </sect3>
328 <sect3>
329 <title>Name, Description and Date</title>
330 <synopsis>char *name;
331char *desc;
332char *date;</synopsis>
333 <para>
334 The driver name is printed to the kernel log at initialization time,
335 used for IRQ registration and passed to userspace through
336 DRM_IOCTL_VERSION.
337 </para>
338 <para>
339 The driver description is a purely informative string passed to
340 userspace through the DRM_IOCTL_VERSION ioctl and otherwise unused by
341 the kernel.
342 </para>
343 <para>
344 The driver date, formatted as YYYYMMDD, is meant to identify the date of
345 the latest modification to the driver. However, as most drivers fail to
346 update it, its value is mostly useless. The DRM core prints it to the
347 kernel log at initialization time and passes it to userspace through the
348 DRM_IOCTL_VERSION ioctl.
349 </para>
350 </sect3>
351 </sect2>
352 <sect2>
Daniel Vetter6e3f7972015-09-28 21:46:35 +0200353 <title>Device Instance and Driver Handling</title>
354!Pdrivers/gpu/drm/drm_drv.c driver instance overview
Thierry Reding25196482014-08-08 11:33:12 +0200355!Edrivers/gpu/drm/drm_drv.c
Thierry Redingc6a1af8a2014-05-19 13:39:07 +0200356 </sect2>
357 <sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200358 <title>Driver Load</title>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200359 <sect3 id="drm-irq-registration">
360 <title>IRQ Registration</title>
361 <para>
362 The DRM core tries to facilitate IRQ handler registration and
363 unregistration by providing <function>drm_irq_install</function> and
364 <function>drm_irq_uninstall</function> functions. Those functions only
Laurent Pinchart02b62982013-06-22 14:10:59 +0200365 support a single interrupt per device, devices that use more than one
366 IRQs need to be handled manually.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200367 </para>
Laurent Pinchart02b62982013-06-22 14:10:59 +0200368 <sect4>
369 <title>Managed IRQ Registration</title>
370 <para>
Laurent Pinchart02b62982013-06-22 14:10:59 +0200371 <function>drm_irq_install</function> starts by calling the
372 <methodname>irq_preinstall</methodname> driver operation. The operation
373 is optional and must make sure that the interrupt will not get fired by
374 clearing all pending interrupt flags or disabling the interrupt.
375 </para>
376 <para>
Daniel Vetterbb0f1b52013-11-03 21:09:27 +0100377 The passed-in IRQ will then be requested by a call to
Laurent Pinchart02b62982013-06-22 14:10:59 +0200378 <function>request_irq</function>. If the DRIVER_IRQ_SHARED driver
379 feature flag is set, a shared (IRQF_SHARED) IRQ handler will be
380 requested.
381 </para>
382 <para>
383 The IRQ handler function must be provided as the mandatory irq_handler
384 driver operation. It will get passed directly to
385 <function>request_irq</function> and thus has the same prototype as all
386 IRQ handlers. It will get called with a pointer to the DRM device as the
387 second argument.
388 </para>
389 <para>
390 Finally the function calls the optional
391 <methodname>irq_postinstall</methodname> driver operation. The operation
392 usually enables interrupts (excluding the vblank interrupt, which is
393 enabled separately), but drivers may choose to enable/disable interrupts
394 at a different time.
395 </para>
396 <para>
397 <function>drm_irq_uninstall</function> is similarly used to uninstall an
398 IRQ handler. It starts by waking up all processes waiting on a vblank
399 interrupt to make sure they don't hang, and then calls the optional
400 <methodname>irq_uninstall</methodname> driver operation. The operation
401 must disable all hardware interrupts. Finally the function frees the IRQ
402 by calling <function>free_irq</function>.
403 </para>
404 </sect4>
405 <sect4>
406 <title>Manual IRQ Registration</title>
407 <para>
408 Drivers that require multiple interrupt handlers can't use the managed
409 IRQ registration functions. In that case IRQs must be registered and
410 unregistered manually (usually with the <function>request_irq</function>
411 and <function>free_irq</function> functions, or their devm_* equivalent).
412 </para>
413 <para>
414 When manually registering IRQs, drivers must not set the DRIVER_HAVE_IRQ
415 driver feature flag, and must not provide the
416 <methodname>irq_handler</methodname> driver operation. They must set the
417 <structname>drm_device</structname> <structfield>irq_enabled</structfield>
418 field to 1 upon registration of the IRQs, and clear it to 0 after
419 unregistering the IRQs.
420 </para>
421 </sect4>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200422 </sect3>
423 <sect3>
424 <title>Memory Manager Initialization</title>
425 <para>
426 Every DRM driver requires a memory manager which must be initialized at
427 load time. DRM currently contains two memory managers, the Translation
428 Table Manager (TTM) and the Graphics Execution Manager (GEM).
429 This document describes the use of the GEM memory manager only. See
430 <xref linkend="drm-memory-management"/> for details.
431 </para>
432 </sect3>
433 <sect3>
434 <title>Miscellaneous Device Configuration</title>
435 <para>
436 Another task that may be necessary for PCI devices during configuration
437 is mapping the video BIOS. On many devices, the VBIOS describes device
438 configuration, LCD panel timings (if any), and contains flags indicating
439 device state. Mapping the BIOS can be done using the pci_map_rom() call,
440 a convenience function that takes care of mapping the actual ROM,
441 whether it has been shadowed into memory (typically at address 0xc0000)
442 or exists on the PCI device in the ROM BAR. Note that after the ROM has
443 been mapped and any necessary information has been extracted, it should
444 be unmapped; on many devices, the ROM address decoder is shared with
445 other BARs, so leaving it mapped could cause undesired behaviour like
446 hangs or memory corruption.
447 <!--!Fdrivers/pci/rom.c pci_map_rom-->
448 </para>
449 </sect3>
450 </sect2>
Daniel Vetter6e3f7972015-09-28 21:46:35 +0200451 <sect2>
452 <title>Bus-specific Device Registration and PCI Support</title>
453 <para>
454 A number of functions are provided to help with device registration.
455 The functions deal with PCI and platform devices respectively and are
456 only provided for historical reasons. These are all deprecated and
457 shouldn't be used in new drivers. Besides that there's a few
458 helpers for pci drivers.
459 </para>
460!Edrivers/gpu/drm/drm_pci.c
461!Edrivers/gpu/drm/drm_platform.c
462 </sect2>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700463 </sect1>
464
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200465 <!-- Internals: memory management -->
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700466
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200467 <sect1 id="drm-memory-management">
468 <title>Memory management</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700469 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200470 Modern Linux systems require large amount of graphics memory to store
471 frame buffers, textures, vertices and other graphics-related data. Given
472 the very dynamic nature of many of that data, managing graphics memory
473 efficiently is thus crucial for the graphics stack and plays a central
474 role in the DRM infrastructure.
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700475 </para>
476 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200477 The DRM core includes two memory managers, namely Translation Table Maps
478 (TTM) and Graphics Execution Manager (GEM). TTM was the first DRM memory
479 manager to be developed and tried to be a one-size-fits-them all
Anatol Pomozovf884ab12013-05-08 16:56:16 -0700480 solution. It provides a single userspace API to accommodate the need of
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200481 all hardware, supporting both Unified Memory Architecture (UMA) devices
482 and devices with dedicated video RAM (i.e. most discrete video cards).
483 This resulted in a large, complex piece of code that turned out to be
484 hard to use for driver development.
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700485 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200486 <para>
487 GEM started as an Intel-sponsored project in reaction to TTM's
488 complexity. Its design philosophy is completely different: instead of
489 providing a solution to every graphics memory-related problems, GEM
490 identified common code between drivers and created a support library to
491 share it. GEM has simpler initialization and execution requirements than
Masanari Iida9a6594f2014-05-15 13:54:06 -0700492 TTM, but has no video RAM management capabilities and is thus limited to
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200493 UMA devices.
494 </para>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700495 <sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200496 <title>The Translation Table Manager (TTM)</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700497 <para>
Thierry Reding79058102014-11-03 14:45:44 +0100498 TTM design background and information belongs here.
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700499 </para>
500 <sect3>
Thierry Reding79058102014-11-03 14:45:44 +0100501 <title>TTM initialization</title>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200502 <warning><para>This section is outdated.</para></warning>
503 <para>
504 Drivers wishing to support TTM must fill out a drm_bo_driver
505 structure. The structure contains several fields with function
506 pointers for initializing the TTM, allocating and freeing memory,
507 waiting for command completion and fence synchronization, and memory
508 migration. See the radeon_ttm.c file for an example of usage.
Thierry Reding79058102014-11-03 14:45:44 +0100509 </para>
510 <para>
511 The ttm_global_reference structure is made up of several fields:
512 </para>
513 <programlisting>
514 struct ttm_global_reference {
515 enum ttm_global_types global_type;
516 size_t size;
517 void *object;
518 int (*init) (struct ttm_global_reference *);
519 void (*release) (struct ttm_global_reference *);
520 };
521 </programlisting>
522 <para>
523 There should be one global reference structure for your memory
524 manager as a whole, and there will be others for each object
525 created by the memory manager at runtime. Your global TTM should
526 have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
527 object should be sizeof(struct ttm_mem_global), and the init and
528 release hooks should point at your driver-specific init and
529 release routines, which probably eventually call
530 ttm_mem_global_init and ttm_mem_global_release, respectively.
531 </para>
532 <para>
533 Once your global TTM accounting structure is set up and initialized
534 by calling ttm_global_item_ref() on it,
535 you need to create a buffer object TTM to
536 provide a pool for buffer object allocation by clients and the
537 kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
538 and its size should be sizeof(struct ttm_bo_global). Again,
539 driver-specific init and release functions may be provided,
540 likely eventually calling ttm_bo_global_init() and
541 ttm_bo_global_release(), respectively. Also, like the previous
542 object, ttm_global_item_ref() is used to create an initial reference
543 count for the TTM, which will call your initialization function.
544 </para>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700545 </sect3>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700546 </sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200547 <sect2 id="drm-gem">
548 <title>The Graphics Execution Manager (GEM)</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700549 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200550 The GEM design approach has resulted in a memory manager that doesn't
551 provide full coverage of all (or even all common) use cases in its
552 userspace or kernel API. GEM exposes a set of standard memory-related
553 operations to userspace and a set of helper functions to drivers, and let
554 drivers implement hardware-specific operations with their own private API.
555 </para>
556 <para>
557 The GEM userspace API is described in the
558 <ulink url="http://lwn.net/Articles/283798/"><citetitle>GEM - the Graphics
559 Execution Manager</citetitle></ulink> article on LWN. While slightly
560 outdated, the document provides a good overview of the GEM API principles.
561 Buffer allocation and read and write operations, described as part of the
562 common GEM API, are currently implemented using driver-specific ioctls.
563 </para>
564 <para>
565 GEM is data-agnostic. It manages abstract buffer objects without knowing
566 what individual buffers contain. APIs that require knowledge of buffer
567 contents or purpose, such as buffer allocation or synchronization
568 primitives, are thus outside of the scope of GEM and must be implemented
569 using driver-specific ioctls.
570 </para>
571 <para>
Thierry Reding79058102014-11-03 14:45:44 +0100572 On a fundamental level, GEM involves several operations:
573 <itemizedlist>
574 <listitem>Memory allocation and freeing</listitem>
575 <listitem>Command execution</listitem>
576 <listitem>Aperture management at command execution time</listitem>
577 </itemizedlist>
578 Buffer object allocation is relatively straightforward and largely
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200579 provided by Linux's shmem layer, which provides memory to back each
580 object.
581 </para>
582 <para>
583 Device-specific operations, such as command execution, pinning, buffer
Thierry Reding79058102014-11-03 14:45:44 +0100584 read &amp; write, mapping, and domain ownership transfers are left to
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200585 driver-specific ioctls.
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700586 </para>
587 <sect3>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200588 <title>GEM Initialization</title>
589 <para>
590 Drivers that use GEM must set the DRIVER_GEM bit in the struct
591 <structname>drm_driver</structname>
592 <structfield>driver_features</structfield> field. The DRM core will
593 then automatically initialize the GEM core before calling the
594 <methodname>load</methodname> operation. Behind the scene, this will
595 create a DRM Memory Manager object which provides an address space
596 pool for object allocation.
597 </para>
598 <para>
599 In a KMS configuration, drivers need to allocate and initialize a
600 command ring buffer following core GEM initialization if required by
601 the hardware. UMA devices usually have what is called a "stolen"
602 memory region, which provides space for the initial framebuffer and
603 large, contiguous memory regions required by the device. This space is
604 typically not managed by GEM, and must be initialized separately into
605 its own DRM MM object.
606 </para>
607 </sect3>
608 <sect3>
609 <title>GEM Objects Creation</title>
610 <para>
611 GEM splits creation of GEM objects and allocation of the memory that
612 backs them in two distinct operations.
613 </para>
614 <para>
615 GEM objects are represented by an instance of struct
616 <structname>drm_gem_object</structname>. Drivers usually need to extend
617 GEM objects with private information and thus create a driver-specific
618 GEM object structure type that embeds an instance of struct
619 <structname>drm_gem_object</structname>.
620 </para>
621 <para>
622 To create a GEM object, a driver allocates memory for an instance of its
623 specific GEM object type and initializes the embedded struct
624 <structname>drm_gem_object</structname> with a call to
625 <function>drm_gem_object_init</function>. The function takes a pointer to
626 the DRM device, a pointer to the GEM object and the buffer object size
627 in bytes.
628 </para>
629 <para>
630 GEM uses shmem to allocate anonymous pageable memory.
631 <function>drm_gem_object_init</function> will create an shmfs file of
632 the requested size and store it into the struct
633 <structname>drm_gem_object</structname> <structfield>filp</structfield>
634 field. The memory is used as either main storage for the object when the
635 graphics hardware uses system memory directly or as a backing store
636 otherwise.
637 </para>
638 <para>
639 Drivers are responsible for the actual physical pages allocation by
640 calling <function>shmem_read_mapping_page_gfp</function> for each page.
641 Note that they can decide to allocate pages when initializing the GEM
642 object, or to delay allocation until the memory is needed (for instance
643 when a page fault occurs as a result of a userspace memory access or
644 when the driver needs to start a DMA transfer involving the memory).
645 </para>
646 <para>
647 Anonymous pageable memory allocation is not always desired, for instance
648 when the hardware requires physically contiguous system memory as is
649 often the case in embedded devices. Drivers can create GEM objects with
650 no shmfs backing (called private GEM objects) by initializing them with
651 a call to <function>drm_gem_private_object_init</function> instead of
652 <function>drm_gem_object_init</function>. Storage for private GEM
653 objects must be managed by drivers.
654 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200655 </sect3>
656 <sect3>
657 <title>GEM Objects Lifetime</title>
658 <para>
659 All GEM objects are reference-counted by the GEM core. References can be
660 acquired and release by <function>calling drm_gem_object_reference</function>
661 and <function>drm_gem_object_unreference</function> respectively. The
662 caller must hold the <structname>drm_device</structname>
Daniel Vetterdecc60b2015-10-22 19:11:27 +0200663 <structfield>struct_mutex</structfield> lock when calling
664 <function>drm_gem_object_reference</function>. As a convenience, GEM
665 provides <function>drm_gem_object_unreference_unlocked</function>
666 functions that can be called without holding the lock.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200667 </para>
668 <para>
669 When the last reference to a GEM object is released the GEM core calls
670 the <structname>drm_driver</structname>
671 <methodname>gem_free_object</methodname> operation. That operation is
672 mandatory for GEM-enabled drivers and must free the GEM object and all
673 associated resources.
674 </para>
675 <para>
676 <synopsis>void (*gem_free_object) (struct drm_gem_object *obj);</synopsis>
Daniel Vetterdf2e0902015-10-22 19:11:29 +0200677 Drivers are responsible for freeing all GEM object resources. This includes
678 the resources created by the GEM core, which need to be released with
679 <function>drm_gem_object_release</function>.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200680 </para>
681 </sect3>
682 <sect3>
683 <title>GEM Objects Naming</title>
684 <para>
685 Communication between userspace and the kernel refers to GEM objects
686 using local handles, global names or, more recently, file descriptors.
687 All of those are 32-bit integer values; the usual Linux kernel limits
688 apply to the file descriptors.
689 </para>
690 <para>
691 GEM handles are local to a DRM file. Applications get a handle to a GEM
692 object through a driver-specific ioctl, and can use that handle to refer
693 to the GEM object in other standard or driver-specific ioctls. Closing a
694 DRM file handle frees all its GEM handles and dereferences the
695 associated GEM objects.
696 </para>
697 <para>
698 To create a handle for a GEM object drivers call
699 <function>drm_gem_handle_create</function>. The function takes a pointer
700 to the DRM file and the GEM object and returns a locally unique handle.
701 When the handle is no longer needed drivers delete it with a call to
702 <function>drm_gem_handle_delete</function>. Finally the GEM object
703 associated with a handle can be retrieved by a call to
704 <function>drm_gem_object_lookup</function>.
705 </para>
706 <para>
707 Handles don't take ownership of GEM objects, they only take a reference
708 to the object that will be dropped when the handle is destroyed. To
709 avoid leaking GEM objects, drivers must make sure they drop the
710 reference(s) they own (such as the initial reference taken at object
711 creation time) as appropriate, without any special consideration for the
712 handle. For example, in the particular case of combined GEM object and
713 handle creation in the implementation of the
714 <methodname>dumb_create</methodname> operation, drivers must drop the
715 initial reference to the GEM object before returning the handle.
716 </para>
717 <para>
718 GEM names are similar in purpose to handles but are not local to DRM
719 files. They can be passed between processes to reference a GEM object
720 globally. Names can't be used directly to refer to objects in the DRM
721 API, applications must convert handles to names and names to handles
722 using the DRM_IOCTL_GEM_FLINK and DRM_IOCTL_GEM_OPEN ioctls
723 respectively. The conversion is handled by the DRM core without any
724 driver-specific support.
725 </para>
Thierry Reding79058102014-11-03 14:45:44 +0100726 <para>
727 GEM also supports buffer sharing with dma-buf file descriptors through
728 PRIME. GEM-based drivers must use the provided helpers functions to
729 implement the exporting and importing correctly. See <xref linkend="drm-prime-support" />.
730 Since sharing file descriptors is inherently more secure than the
731 easily guessable and global GEM names it is the preferred buffer
732 sharing mechanism. Sharing buffers through GEM names is only supported
733 for legacy userspace. Furthermore PRIME also allows cross-device
734 buffer sharing since it is based on dma-bufs.
735 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200736 </sect3>
737 <sect3 id="drm-gem-objects-mapping">
738 <title>GEM Objects Mapping</title>
739 <para>
740 Because mapping operations are fairly heavyweight GEM favours
741 read/write-like access to buffers, implemented through driver-specific
742 ioctls, over mapping buffers to userspace. However, when random access
743 to the buffer is needed (to perform software rendering for instance),
744 direct access to the object can be more efficient.
745 </para>
746 <para>
747 The mmap system call can't be used directly to map GEM objects, as they
748 don't have their own file handle. Two alternative methods currently
749 co-exist to map GEM objects to userspace. The first method uses a
750 driver-specific ioctl to perform the mapping operation, calling
751 <function>do_mmap</function> under the hood. This is often considered
752 dubious, seems to be discouraged for new GEM-enabled drivers, and will
753 thus not be described here.
754 </para>
755 <para>
756 The second method uses the mmap system call on the DRM file handle.
757 <synopsis>void *mmap(void *addr, size_t length, int prot, int flags, int fd,
758 off_t offset);</synopsis>
759 DRM identifies the GEM object to be mapped by a fake offset passed
760 through the mmap offset argument. Prior to being mapped, a GEM object
761 must thus be associated with a fake offset. To do so, drivers must call
Daniel Vetterdf2e0902015-10-22 19:11:29 +0200762 <function>drm_gem_create_mmap_offset</function> on the object.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200763 </para>
764 <para>
765 Once allocated, the fake offset value
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200766 must be passed to the application in a driver-specific way and can then
767 be used as the mmap offset argument.
768 </para>
769 <para>
770 The GEM core provides a helper method <function>drm_gem_mmap</function>
771 to handle object mapping. The method can be set directly as the mmap
772 file operation handler. It will look up the GEM object based on the
773 offset value and set the VMA operations to the
774 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
775 field. Note that <function>drm_gem_mmap</function> doesn't map memory to
776 userspace, but relies on the driver-provided fault handler to map pages
777 individually.
778 </para>
779 <para>
780 To use <function>drm_gem_mmap</function>, drivers must fill the struct
781 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
782 field with a pointer to VM operations.
783 </para>
784 <para>
785 <synopsis>struct vm_operations_struct *gem_vm_ops
786
787 struct vm_operations_struct {
788 void (*open)(struct vm_area_struct * area);
789 void (*close)(struct vm_area_struct * area);
790 int (*fault)(struct vm_area_struct *vma, struct vm_fault *vmf);
791 };</synopsis>
792 </para>
793 <para>
794 The <methodname>open</methodname> and <methodname>close</methodname>
795 operations must update the GEM object reference count. Drivers can use
796 the <function>drm_gem_vm_open</function> and
797 <function>drm_gem_vm_close</function> helper functions directly as open
798 and close handlers.
799 </para>
800 <para>
801 The fault operation handler is responsible for mapping individual pages
802 to userspace when a page fault occurs. Depending on the memory
803 allocation scheme, drivers can allocate pages at fault time, or can
804 decide to allocate memory for the GEM object at the time the object is
805 created.
806 </para>
807 <para>
808 Drivers that want to map the GEM object upfront instead of handling page
809 faults can implement their own mmap file operation handler.
810 </para>
811 </sect3>
812 <sect3>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200813 <title>Memory Coherency</title>
814 <para>
815 When mapped to the device or used in a command buffer, backing pages
816 for an object are flushed to memory and marked write combined so as to
817 be coherent with the GPU. Likewise, if the CPU accesses an object
818 after the GPU has finished rendering to the object, then the object
819 must be made coherent with the CPU's view of memory, usually involving
820 GPU cache flushing of various kinds. This core CPU&lt;-&gt;GPU
821 coherency management is provided by a device-specific ioctl, which
822 evaluates an object's current domain and performs any necessary
823 flushing or synchronization to put the object into the desired
824 coherency domain (note that the object may be busy, i.e. an active
825 render target; in that case, setting the domain blocks the client and
826 waits for rendering to complete before performing any necessary
827 flushing operations).
828 </para>
829 </sect3>
830 <sect3>
831 <title>Command Execution</title>
832 <para>
Thierry Reding79058102014-11-03 14:45:44 +0100833 Perhaps the most important GEM function for GPU devices is providing a
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200834 command execution interface to clients. Client programs construct
835 command buffers containing references to previously allocated memory
836 objects, and then submit them to GEM. At that point, GEM takes care to
837 bind all the objects into the GTT, execute the buffer, and provide
838 necessary synchronization between clients accessing the same buffers.
839 This often involves evicting some objects from the GTT and re-binding
840 others (a fairly expensive operation), and providing relocation
841 support which hides fixed GTT offsets from clients. Clients must take
842 care not to submit command buffers that reference more objects than
843 can fit in the GTT; otherwise, GEM will reject them and no rendering
844 will occur. Similarly, if several objects in the buffer require fence
845 registers to be allocated for correct rendering (e.g. 2D blits on
846 pre-965 chips), care must be taken not to require more fence registers
847 than are available to the client. Such resource management should be
848 abstracted from the client in libdrm.
849 </para>
850 </sect3>
Daniel Vetterdecc60b2015-10-22 19:11:27 +0200851 </sect2>
852 <sect2>
853 <title>GEM Function Reference</title>
Daniel Vetter89d61fc2014-01-21 12:39:00 +0100854!Edrivers/gpu/drm/drm_gem.c
Daniel Vetterdecc60b2015-10-22 19:11:27 +0200855!Iinclude/drm/drm_gem.h
Thierry Reding79058102014-11-03 14:45:44 +0100856 </sect2>
857 <sect2>
858 <title>VMA Offset Manager</title>
Daniel Vetter4c5acf32014-01-22 12:28:42 +0100859!Pdrivers/gpu/drm/drm_vma_manager.c vma offset manager
860!Edrivers/gpu/drm/drm_vma_manager.c
861!Iinclude/drm/drm_vma_manager.h
Thierry Reding79058102014-11-03 14:45:44 +0100862 </sect2>
863 <sect2 id="drm-prime-support">
864 <title>PRIME Buffer Sharing</title>
865 <para>
866 PRIME is the cross device buffer sharing framework in drm, originally
867 created for the OPTIMUS range of multi-gpu platforms. To userspace
868 PRIME buffers are dma-buf based file descriptors.
869 </para>
870 <sect3>
871 <title>Overview and Driver Interface</title>
872 <para>
873 Similar to GEM global names, PRIME file descriptors are
874 also used to share buffer objects across processes. They offer
875 additional security: as file descriptors must be explicitly sent over
876 UNIX domain sockets to be shared between applications, they can't be
877 guessed like the globally unique GEM names.
878 </para>
879 <para>
880 Drivers that support the PRIME
881 API must set the DRIVER_PRIME bit in the struct
882 <structname>drm_driver</structname>
883 <structfield>driver_features</structfield> field, and implement the
884 <methodname>prime_handle_to_fd</methodname> and
885 <methodname>prime_fd_to_handle</methodname> operations.
886 </para>
887 <para>
888 <synopsis>int (*prime_handle_to_fd)(struct drm_device *dev,
889 struct drm_file *file_priv, uint32_t handle,
890 uint32_t flags, int *prime_fd);
Daniel Vetter251261d2014-01-22 18:46:33 +0100891int (*prime_fd_to_handle)(struct drm_device *dev,
Thierry Reding79058102014-11-03 14:45:44 +0100892 struct drm_file *file_priv, int prime_fd,
893 uint32_t *handle);</synopsis>
894 Those two operations convert a handle to a PRIME file descriptor and
895 vice versa. Drivers must use the kernel dma-buf buffer sharing framework
896 to manage the PRIME file descriptors. Similar to the mode setting
897 API PRIME is agnostic to the underlying buffer object manager, as
898 long as handles are 32bit unsigned integers.
899 </para>
900 <para>
901 While non-GEM drivers must implement the operations themselves, GEM
902 drivers must use the <function>drm_gem_prime_handle_to_fd</function>
903 and <function>drm_gem_prime_fd_to_handle</function> helper functions.
904 Those helpers rely on the driver
905 <methodname>gem_prime_export</methodname> and
906 <methodname>gem_prime_import</methodname> operations to create a dma-buf
907 instance from a GEM object (dma-buf exporter role) and to create a GEM
908 object from a dma-buf instance (dma-buf importer role).
909 </para>
910 <para>
911 <synopsis>struct dma_buf * (*gem_prime_export)(struct drm_device *dev,
912 struct drm_gem_object *obj,
913 int flags);
Daniel Vetter251261d2014-01-22 18:46:33 +0100914struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev,
Thierry Reding79058102014-11-03 14:45:44 +0100915 struct dma_buf *dma_buf);</synopsis>
916 These two operations are mandatory for GEM drivers that support
917 PRIME.
918 </para>
Daniel Vetter251261d2014-01-22 18:46:33 +0100919 </sect3>
Thierry Reding79058102014-11-03 14:45:44 +0100920 <sect3>
921 <title>PRIME Helper Functions</title>
922!Pdrivers/gpu/drm/drm_prime.c PRIME Helpers
923 </sect3>
924 </sect2>
925 <sect2>
926 <title>PRIME Function References</title>
Daniel Vetter39cc3442014-01-22 19:16:30 +0100927!Edrivers/gpu/drm/drm_prime.c
Thierry Reding79058102014-11-03 14:45:44 +0100928 </sect2>
929 <sect2>
930 <title>DRM MM Range Allocator</title>
931 <sect3>
932 <title>Overview</title>
Daniel Vetter93110be2014-01-23 00:31:48 +0100933!Pdrivers/gpu/drm/drm_mm.c Overview
Thierry Reding79058102014-11-03 14:45:44 +0100934 </sect3>
935 <sect3>
936 <title>LRU Scan/Eviction Support</title>
Daniel Vetter93110be2014-01-23 00:31:48 +0100937!Pdrivers/gpu/drm/drm_mm.c lru scan roaster
Thierry Reding79058102014-11-03 14:45:44 +0100938 </sect3>
Daniel Vetter93110be2014-01-23 00:31:48 +0100939 </sect2>
Thierry Reding79058102014-11-03 14:45:44 +0100940 <sect2>
941 <title>DRM MM Range Allocator Function References</title>
Daniel Vettere18c0412014-01-23 00:39:13 +0100942!Edrivers/gpu/drm/drm_mm.c
943!Iinclude/drm/drm_mm.h
Thierry Reding79058102014-11-03 14:45:44 +0100944 </sect2>
Thierry Redingd7883f82014-11-03 13:56:55 +0100945 <sect2>
946 <title>CMA Helper Functions Reference</title>
947!Pdrivers/gpu/drm/drm_gem_cma_helper.c cma helpers
948!Edrivers/gpu/drm/drm_gem_cma_helper.c
949!Iinclude/drm/drm_gem_cma_helper.h
950 </sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200951 </sect1>
952
953 <!-- Internals: mode setting -->
954
955 <sect1 id="drm-mode-setting">
956 <title>Mode Setting</title>
957 <para>
958 Drivers must initialize the mode setting core by calling
959 <function>drm_mode_config_init</function> on the DRM device. The function
960 initializes the <structname>drm_device</structname>
961 <structfield>mode_config</structfield> field and never fails. Once done,
962 mode configuration must be setup by initializing the following fields.
963 </para>
964 <itemizedlist>
965 <listitem>
966 <synopsis>int min_width, min_height;
967int max_width, max_height;</synopsis>
968 <para>
969 Minimum and maximum width and height of the frame buffers in pixel
970 units.
Jesse Barnes2d2ef822009-10-26 13:06:31 -0700971 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200972 </listitem>
973 <listitem>
974 <synopsis>struct drm_mode_config_funcs *funcs;</synopsis>
975 <para>Mode setting functions.</para>
976 </listitem>
977 </itemizedlist>
978 <sect2>
Daniel Vetter3ec0db82014-01-23 15:06:15 +0100979 <title>Display Modes Function Reference</title>
Daniel Vetterf5aabb92014-01-23 20:05:00 +0100980!Iinclude/drm/drm_modes.h
Daniel Vetter3ec0db82014-01-23 15:06:15 +0100981!Edrivers/gpu/drm/drm_modes.c
982 </sect2>
983 <sect2>
Daniel Vettercc4ceb42014-07-25 21:30:38 +0200984 <title>Atomic Mode Setting Function Reference</title>
985!Edrivers/gpu/drm/drm_atomic.c
Daniel Vetterc0714fc2015-12-04 09:45:57 +0100986!Idrivers/gpu/drm/drm_atomic.c
Daniel Vettercc4ceb42014-07-25 21:30:38 +0200987 </sect2>
988 <sect2>
Daniel Vetterd55f5322015-12-08 09:49:19 +0100989 <title>Frame Buffer Abstraction</title>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +0200990 <para>
991 Frame buffers are abstract memory objects that provide a source of
992 pixels to scanout to a CRTC. Applications explicitly request the
993 creation of frame buffers through the DRM_IOCTL_MODE_ADDFB(2) ioctls and
994 receive an opaque handle that can be passed to the KMS CRTC control,
995 plane configuration and page flip functions.
996 </para>
997 <para>
998 Frame buffers rely on the underneath memory manager for low-level memory
999 operations. When creating a frame buffer applications pass a memory
1000 handle (or a list of memory handles for multi-planar formats) through
Daniel Vetter065a5022014-01-21 12:01:41 +01001001 the <parameter>drm_mode_fb_cmd2</parameter> argument. For drivers using
1002 GEM as their userspace buffer management interface this would be a GEM
1003 handle. Drivers are however free to use their own backing storage object
1004 handles, e.g. vmwgfx directly exposes special TTM handles to userspace
1005 and so expects TTM handles in the create ioctl and not GEM handles.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001006 </para>
1007 <para>
Daniel Vetter5d7a9512013-01-04 22:31:20 +01001008 The lifetime of a drm framebuffer is controlled with a reference count,
1009 drivers can grab additional references with
Daniel Vetter9ee984a2014-01-23 21:57:37 +01001010 <function>drm_framebuffer_reference</function>and drop them
Daniel Vetter5d7a9512013-01-04 22:31:20 +01001011 again with <function>drm_framebuffer_unreference</function>. For
1012 driver-private framebuffers for which the last reference is never
1013 dropped (e.g. for the fbdev framebuffer when the struct
1014 <structname>drm_framebuffer</structname> is embedded into the fbdev
1015 helper struct) drivers can manually clean up a framebuffer at module
1016 unload time with
1017 <function>drm_framebuffer_unregister_private</function>.
Daniel Vetter9ee984a2014-01-23 21:57:37 +01001018 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001019 </sect2>
1020 <sect2>
Daniel Vetter065a5022014-01-21 12:01:41 +01001021 <title>Dumb Buffer Objects</title>
1022 <para>
1023 The KMS API doesn't standardize backing storage object creation and
1024 leaves it to driver-specific ioctls. Furthermore actually creating a
1025 buffer object even for GEM-based drivers is done through a
1026 driver-specific ioctl - GEM only has a common userspace interface for
1027 sharing and destroying objects. While not an issue for full-fledged
1028 graphics stacks that include device-specific userspace components (in
1029 libdrm for instance), this limit makes DRM-based early boot graphics
1030 unnecessarily complex.
1031 </para>
1032 <para>
1033 Dumb objects partly alleviate the problem by providing a standard
1034 API to create dumb buffers suitable for scanout, which can then be used
1035 to create KMS frame buffers.
1036 </para>
1037 <para>
1038 To support dumb objects drivers must implement the
1039 <methodname>dumb_create</methodname>,
1040 <methodname>dumb_destroy</methodname> and
1041 <methodname>dumb_map_offset</methodname> operations.
1042 </para>
1043 <itemizedlist>
1044 <listitem>
1045 <synopsis>int (*dumb_create)(struct drm_file *file_priv, struct drm_device *dev,
1046 struct drm_mode_create_dumb *args);</synopsis>
1047 <para>
1048 The <methodname>dumb_create</methodname> operation creates a driver
1049 object (GEM or TTM handle) suitable for scanout based on the
1050 width, height and depth from the struct
1051 <structname>drm_mode_create_dumb</structname> argument. It fills the
1052 argument's <structfield>handle</structfield>,
1053 <structfield>pitch</structfield> and <structfield>size</structfield>
1054 fields with a handle for the newly created object and its line
1055 pitch and size in bytes.
1056 </para>
1057 </listitem>
1058 <listitem>
1059 <synopsis>int (*dumb_destroy)(struct drm_file *file_priv, struct drm_device *dev,
1060 uint32_t handle);</synopsis>
1061 <para>
1062 The <methodname>dumb_destroy</methodname> operation destroys a dumb
1063 object created by <methodname>dumb_create</methodname>.
1064 </para>
1065 </listitem>
1066 <listitem>
1067 <synopsis>int (*dumb_map_offset)(struct drm_file *file_priv, struct drm_device *dev,
1068 uint32_t handle, uint64_t *offset);</synopsis>
1069 <para>
1070 The <methodname>dumb_map_offset</methodname> operation associates an
1071 mmap fake offset with the object given by the handle and returns
1072 it. Drivers must use the
1073 <function>drm_gem_create_mmap_offset</function> function to
1074 associate the fake offset as described in
1075 <xref linkend="drm-gem-objects-mapping"/>.
1076 </para>
1077 </listitem>
1078 </itemizedlist>
1079 <para>
1080 Note that dumb objects may not be used for gpu acceleration, as has been
1081 attempted on some ARM embedded platforms. Such drivers really must have
1082 a hardware-specific ioctl to allocate suitable buffer objects.
1083 </para>
1084 </sect2>
1085 <sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001086 <title>Output Polling</title>
1087 <synopsis>void (*output_poll_changed)(struct drm_device *dev);</synopsis>
1088 <para>
1089 This operation notifies the driver that the status of one or more
1090 connectors has changed. Drivers that use the fb helper can just call the
1091 <function>drm_fb_helper_hotplug_event</function> function to handle this
1092 operation.
1093 </para>
1094 </sect2>
1095 </sect1>
1096
1097 <!-- Internals: kms initialization and cleanup -->
1098
1099 <sect1 id="drm-kms-init">
1100 <title>KMS Initialization and Cleanup</title>
1101 <para>
1102 A KMS device is abstracted and exposed as a set of planes, CRTCs, encoders
1103 and connectors. KMS drivers must thus create and initialize all those
1104 objects at load time after initializing mode setting.
1105 </para>
1106 <sect2>
1107 <title>CRTCs (struct <structname>drm_crtc</structname>)</title>
1108 <para>
1109 A CRTC is an abstraction representing a part of the chip that contains a
1110 pointer to a scanout buffer. Therefore, the number of CRTCs available
1111 determines how many independent scanout buffers can be active at any
1112 given time. The CRTC structure contains several fields to support this:
1113 a pointer to some video memory (abstracted as a frame buffer object), a
1114 display mode, and an (x, y) offset into the video memory to support
1115 panning or configurations where one piece of video memory spans multiple
1116 CRTCs.
1117 </para>
1118 <sect3>
1119 <title>CRTC Initialization</title>
1120 <para>
1121 A KMS device must create and register at least one struct
1122 <structname>drm_crtc</structname> instance. The instance is allocated
1123 and zeroed by the driver, possibly as part of a larger structure, and
1124 registered with a call to <function>drm_crtc_init</function> with a
1125 pointer to CRTC functions.
1126 </para>
1127 </sect3>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001128 </sect2>
1129 <sect2>
1130 <title>Planes (struct <structname>drm_plane</structname>)</title>
1131 <para>
1132 A plane represents an image source that can be blended with or overlayed
1133 on top of a CRTC during the scanout process. Planes are associated with
1134 a frame buffer to crop a portion of the image memory (source) and
1135 optionally scale it to a destination size. The result is then blended
1136 with or overlayed on top of a CRTC.
1137 </para>
Matt Roper6efa1f22014-04-01 15:22:43 -07001138 <para>
1139 The DRM core recognizes three types of planes:
1140 <itemizedlist>
1141 <listitem>
1142 DRM_PLANE_TYPE_PRIMARY represents a "main" plane for a CRTC. Primary
Thierry Redingef21bf72014-12-17 16:13:17 +01001143 planes are the planes operated upon by CRTC modesetting and flipping
Daniel Vetterf6da8c62015-12-04 09:46:00 +01001144 operations described in the page_flip hook in <structname>drm_crtc_funcs</structname>.
Matt Roper6efa1f22014-04-01 15:22:43 -07001145 </listitem>
1146 <listitem>
1147 DRM_PLANE_TYPE_CURSOR represents a "cursor" plane for a CRTC. Cursor
1148 planes are the planes operated upon by the DRM_IOCTL_MODE_CURSOR and
1149 DRM_IOCTL_MODE_CURSOR2 ioctls.
1150 </listitem>
1151 <listitem>
1152 DRM_PLANE_TYPE_OVERLAY represents all non-primary, non-cursor planes.
1153 Some drivers refer to these types of planes as "sprites" internally.
1154 </listitem>
1155 </itemizedlist>
1156 For compatibility with legacy userspace, only overlay planes are made
1157 available to userspace by default. Userspace clients may set the
1158 DRM_CLIENT_CAP_UNIVERSAL_PLANES client capability bit to indicate that
1159 they wish to receive a universal plane list containing all plane types.
1160 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001161 <sect3>
1162 <title>Plane Initialization</title>
1163 <para>
Matt Roper6efa1f22014-04-01 15:22:43 -07001164 To create a plane, a KMS drivers allocates and
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001165 zeroes an instances of struct <structname>drm_plane</structname>
1166 (possibly as part of a larger structure) and registers it with a call
Matt Roper6efa1f22014-04-01 15:22:43 -07001167 to <function>drm_universal_plane_init</function>. The function takes a bitmask
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001168 of the CRTCs that can be associated with the plane, a pointer to the
Matt Roper6efa1f22014-04-01 15:22:43 -07001169 plane functions, a list of format supported formats, and the type of
1170 plane (primary, cursor, or overlay) being initialized.
1171 </para>
1172 <para>
1173 Cursor and overlay planes are optional. All drivers should provide
1174 one primary plane per CRTC (although this requirement may change in
1175 the future); drivers that do not wish to provide special handling for
1176 primary planes may make use of the helper functions described in
1177 <xref linkend="drm-kms-planehelpers"/> to create and register a
1178 primary plane with standard capabilities.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001179 </para>
1180 </sect3>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001181 </sect2>
1182 <sect2>
1183 <title>Encoders (struct <structname>drm_encoder</structname>)</title>
1184 <para>
1185 An encoder takes pixel data from a CRTC and converts it to a format
1186 suitable for any attached connectors. On some devices, it may be
1187 possible to have a CRTC send data to more than one encoder. In that
1188 case, both encoders would receive data from the same scanout buffer,
1189 resulting in a "cloned" display configuration across the connectors
1190 attached to each encoder.
1191 </para>
1192 <sect3>
1193 <title>Encoder Initialization</title>
1194 <para>
1195 As for CRTCs, a KMS driver must create, initialize and register at
1196 least one struct <structname>drm_encoder</structname> instance. The
1197 instance is allocated and zeroed by the driver, possibly as part of a
1198 larger structure.
1199 </para>
1200 <para>
1201 Drivers must initialize the struct <structname>drm_encoder</structname>
1202 <structfield>possible_crtcs</structfield> and
1203 <structfield>possible_clones</structfield> fields before registering the
1204 encoder. Both fields are bitmasks of respectively the CRTCs that the
1205 encoder can be connected to, and sibling encoders candidate for cloning.
1206 </para>
1207 <para>
1208 After being initialized, the encoder must be registered with a call to
1209 <function>drm_encoder_init</function>. The function takes a pointer to
1210 the encoder functions and an encoder type. Supported types are
1211 <itemizedlist>
1212 <listitem>
1213 DRM_MODE_ENCODER_DAC for VGA and analog on DVI-I/DVI-A
1214 </listitem>
1215 <listitem>
1216 DRM_MODE_ENCODER_TMDS for DVI, HDMI and (embedded) DisplayPort
1217 </listitem>
1218 <listitem>
1219 DRM_MODE_ENCODER_LVDS for display panels
1220 </listitem>
1221 <listitem>
1222 DRM_MODE_ENCODER_TVDAC for TV output (Composite, S-Video, Component,
1223 SCART)
1224 </listitem>
1225 <listitem>
1226 DRM_MODE_ENCODER_VIRTUAL for virtual machine displays
1227 </listitem>
1228 </itemizedlist>
1229 </para>
1230 <para>
1231 Encoders must be attached to a CRTC to be used. DRM drivers leave
1232 encoders unattached at initialization time. Applications (or the fbdev
1233 compatibility layer when implemented) are responsible for attaching the
1234 encoders they want to use to a CRTC.
1235 </para>
1236 </sect3>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001237 </sect2>
1238 <sect2>
1239 <title>Connectors (struct <structname>drm_connector</structname>)</title>
1240 <para>
1241 A connector is the final destination for pixel data on a device, and
1242 usually connects directly to an external display device like a monitor
1243 or laptop panel. A connector can only be attached to one encoder at a
1244 time. The connector is also the structure where information about the
1245 attached display is kept, so it contains fields for display data, EDID
1246 data, DPMS &amp; connection status, and information about modes
1247 supported on the attached displays.
1248 </para>
1249 <sect3>
1250 <title>Connector Initialization</title>
1251 <para>
1252 Finally a KMS driver must create, initialize, register and attach at
1253 least one struct <structname>drm_connector</structname> instance. The
1254 instance is created as other KMS objects and initialized by setting the
1255 following fields.
1256 </para>
1257 <variablelist>
1258 <varlistentry>
1259 <term><structfield>interlace_allowed</structfield></term>
1260 <listitem><para>
1261 Whether the connector can handle interlaced modes.
1262 </para></listitem>
1263 </varlistentry>
1264 <varlistentry>
1265 <term><structfield>doublescan_allowed</structfield></term>
1266 <listitem><para>
1267 Whether the connector can handle doublescan.
1268 </para></listitem>
1269 </varlistentry>
1270 <varlistentry>
1271 <term><structfield>display_info
1272 </structfield></term>
1273 <listitem><para>
1274 Display information is filled from EDID information when a display
1275 is detected. For non hot-pluggable displays such as flat panels in
1276 embedded systems, the driver should initialize the
1277 <structfield>display_info</structfield>.<structfield>width_mm</structfield>
1278 and
1279 <structfield>display_info</structfield>.<structfield>height_mm</structfield>
1280 fields with the physical size of the display.
1281 </para></listitem>
1282 </varlistentry>
1283 <varlistentry>
1284 <term id="drm-kms-connector-polled"><structfield>polled</structfield></term>
1285 <listitem><para>
1286 Connector polling mode, a combination of
1287 <variablelist>
1288 <varlistentry>
1289 <term>DRM_CONNECTOR_POLL_HPD</term>
1290 <listitem><para>
1291 The connector generates hotplug events and doesn't need to be
1292 periodically polled. The CONNECT and DISCONNECT flags must not
1293 be set together with the HPD flag.
1294 </para></listitem>
1295 </varlistentry>
1296 <varlistentry>
1297 <term>DRM_CONNECTOR_POLL_CONNECT</term>
1298 <listitem><para>
1299 Periodically poll the connector for connection.
1300 </para></listitem>
1301 </varlistentry>
1302 <varlistentry>
1303 <term>DRM_CONNECTOR_POLL_DISCONNECT</term>
1304 <listitem><para>
1305 Periodically poll the connector for disconnection.
1306 </para></listitem>
1307 </varlistentry>
1308 </variablelist>
1309 Set to 0 for connectors that don't support connection status
1310 discovery.
1311 </para></listitem>
1312 </varlistentry>
1313 </variablelist>
1314 <para>
1315 The connector is then registered with a call to
1316 <function>drm_connector_init</function> with a pointer to the connector
1317 functions and a connector type, and exposed through sysfs with a call to
Thomas Wood34ea3d32014-05-29 16:57:41 +01001318 <function>drm_connector_register</function>.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001319 </para>
1320 <para>
1321 Supported connector types are
1322 <itemizedlist>
1323 <listitem>DRM_MODE_CONNECTOR_VGA</listitem>
1324 <listitem>DRM_MODE_CONNECTOR_DVII</listitem>
1325 <listitem>DRM_MODE_CONNECTOR_DVID</listitem>
1326 <listitem>DRM_MODE_CONNECTOR_DVIA</listitem>
1327 <listitem>DRM_MODE_CONNECTOR_Composite</listitem>
1328 <listitem>DRM_MODE_CONNECTOR_SVIDEO</listitem>
1329 <listitem>DRM_MODE_CONNECTOR_LVDS</listitem>
1330 <listitem>DRM_MODE_CONNECTOR_Component</listitem>
1331 <listitem>DRM_MODE_CONNECTOR_9PinDIN</listitem>
1332 <listitem>DRM_MODE_CONNECTOR_DisplayPort</listitem>
1333 <listitem>DRM_MODE_CONNECTOR_HDMIA</listitem>
1334 <listitem>DRM_MODE_CONNECTOR_HDMIB</listitem>
1335 <listitem>DRM_MODE_CONNECTOR_TV</listitem>
1336 <listitem>DRM_MODE_CONNECTOR_eDP</listitem>
1337 <listitem>DRM_MODE_CONNECTOR_VIRTUAL</listitem>
1338 </itemizedlist>
1339 </para>
1340 <para>
1341 Connectors must be attached to an encoder to be used. For devices that
1342 map connectors to encoders 1:1, the connector should be attached at
1343 initialization time with a call to
1344 <function>drm_mode_connector_attach_encoder</function>. The driver must
1345 also set the <structname>drm_connector</structname>
1346 <structfield>encoder</structfield> field to point to the attached
1347 encoder.
1348 </para>
1349 <para>
1350 Finally, drivers must initialize the connectors state change detection
1351 with a call to <function>drm_kms_helper_poll_init</function>. If at
1352 least one connector is pollable but can't generate hotplug interrupts
1353 (indicated by the DRM_CONNECTOR_POLL_CONNECT and
1354 DRM_CONNECTOR_POLL_DISCONNECT connector flags), a delayed work will
1355 automatically be queued to periodically poll for changes. Connectors
1356 that can generate hotplug interrupts must be marked with the
1357 DRM_CONNECTOR_POLL_HPD flag instead, and their interrupt handler must
1358 call <function>drm_helper_hpd_irq_event</function>. The function will
1359 queue a delayed work to check the state of all connectors, but no
1360 periodic polling will be done.
1361 </para>
1362 </sect3>
1363 <sect3>
1364 <title>Connector Operations</title>
1365 <note><para>
1366 Unless otherwise state, all operations are mandatory.
1367 </para></note>
1368 <sect4>
1369 <title>DPMS</title>
1370 <synopsis>void (*dpms)(struct drm_connector *connector, int mode);</synopsis>
1371 <para>
1372 The DPMS operation sets the power state of a connector. The mode
1373 argument is one of
1374 <itemizedlist>
1375 <listitem><para>DRM_MODE_DPMS_ON</para></listitem>
1376 <listitem><para>DRM_MODE_DPMS_STANDBY</para></listitem>
1377 <listitem><para>DRM_MODE_DPMS_SUSPEND</para></listitem>
1378 <listitem><para>DRM_MODE_DPMS_OFF</para></listitem>
1379 </itemizedlist>
1380 </para>
1381 <para>
1382 In all but DPMS_ON mode the encoder to which the connector is attached
1383 should put the display in low-power mode by driving its signals
1384 appropriately. If more than one connector is attached to the encoder
1385 care should be taken not to change the power state of other displays as
1386 a side effect. Low-power mode should be propagated to the encoders and
1387 CRTCs when all related connectors are put in low-power mode.
1388 </para>
1389 </sect4>
1390 <sect4>
1391 <title>Modes</title>
1392 <synopsis>int (*fill_modes)(struct drm_connector *connector, uint32_t max_width,
1393 uint32_t max_height);</synopsis>
1394 <para>
1395 Fill the mode list with all supported modes for the connector. If the
1396 <parameter>max_width</parameter> and <parameter>max_height</parameter>
1397 arguments are non-zero, the implementation must ignore all modes wider
1398 than <parameter>max_width</parameter> or higher than
1399 <parameter>max_height</parameter>.
1400 </para>
1401 <para>
1402 The connector must also fill in this operation its
1403 <structfield>display_info</structfield>
1404 <structfield>width_mm</structfield> and
1405 <structfield>height_mm</structfield> fields with the connected display
1406 physical size in millimeters. The fields should be set to 0 if the value
1407 isn't known or is not applicable (for instance for projector devices).
1408 </para>
1409 </sect4>
1410 <sect4>
1411 <title>Connection Status</title>
1412 <para>
1413 The connection status is updated through polling or hotplug events when
1414 supported (see <xref linkend="drm-kms-connector-polled"/>). The status
1415 value is reported to userspace through ioctls and must not be used
1416 inside the driver, as it only gets initialized by a call to
1417 <function>drm_mode_getconnector</function> from userspace.
1418 </para>
1419 <synopsis>enum drm_connector_status (*detect)(struct drm_connector *connector,
1420 bool force);</synopsis>
1421 <para>
1422 Check to see if anything is attached to the connector. The
1423 <parameter>force</parameter> parameter is set to false whilst polling or
1424 to true when checking the connector due to user request.
1425 <parameter>force</parameter> can be used by the driver to avoid
1426 expensive, destructive operations during automated probing.
1427 </para>
1428 <para>
1429 Return connector_status_connected if something is connected to the
1430 connector, connector_status_disconnected if nothing is connected and
1431 connector_status_unknown if the connection state isn't known.
1432 </para>
1433 <para>
1434 Drivers should only return connector_status_connected if the connection
1435 status has really been probed as connected. Connectors that can't detect
1436 the connection status, or failed connection status probes, should return
1437 connector_status_unknown.
1438 </para>
1439 </sect4>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001440 </sect3>
1441 </sect2>
1442 <sect2>
1443 <title>Cleanup</title>
1444 <para>
1445 The DRM core manages its objects' lifetime. When an object is not needed
1446 anymore the core calls its destroy function, which must clean up and
1447 free every resource allocated for the object. Every
1448 <function>drm_*_init</function> call must be matched with a
1449 corresponding <function>drm_*_cleanup</function> call to cleanup CRTCs
1450 (<function>drm_crtc_cleanup</function>), planes
1451 (<function>drm_plane_cleanup</function>), encoders
1452 (<function>drm_encoder_cleanup</function>) and connectors
1453 (<function>drm_connector_cleanup</function>). Furthermore, connectors
1454 that have been added to sysfs must be removed by a call to
Thomas Wood34ea3d32014-05-29 16:57:41 +01001455 <function>drm_connector_unregister</function> before calling
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001456 <function>drm_connector_cleanup</function>.
1457 </para>
1458 <para>
1459 Connectors state change detection must be cleanup up with a call to
1460 <function>drm_kms_helper_poll_fini</function>.
1461 </para>
1462 </sect2>
1463 <sect2>
1464 <title>Output discovery and initialization example</title>
1465 <programlisting><![CDATA[
Jesse Barnes2d2ef822009-10-26 13:06:31 -07001466void intel_crt_init(struct drm_device *dev)
1467{
1468 struct drm_connector *connector;
1469 struct intel_output *intel_output;
1470
1471 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
1472 if (!intel_output)
1473 return;
1474
1475 connector = &intel_output->base;
1476 drm_connector_init(dev, &intel_output->base,
1477 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
1478
1479 drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
1480 DRM_MODE_ENCODER_DAC);
1481
1482 drm_mode_connector_attach_encoder(&intel_output->base,
1483 &intel_output->enc);
1484
1485 /* Set up the DDC bus. */
1486 intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
1487 if (!intel_output->ddc_bus) {
1488 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1489 "failed.\n");
1490 return;
1491 }
1492
1493 intel_output->type = INTEL_OUTPUT_ANALOG;
1494 connector->interlace_allowed = 0;
1495 connector->doublescan_allowed = 0;
1496
1497 drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
1498 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
1499
Thomas Wood34ea3d32014-05-29 16:57:41 +01001500 drm_connector_register(connector);
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001501}]]></programlisting>
1502 <para>
1503 In the example above (taken from the i915 driver), a CRTC, connector and
1504 encoder combination is created. A device-specific i2c bus is also
1505 created for fetching EDID data and performing monitor detection. Once
1506 the process is complete, the new connector is registered with sysfs to
1507 make its properties available to applications.
1508 </para>
1509 </sect2>
Daniel Vetter065a50ed2012-12-02 00:09:18 +01001510 <sect2>
1511 <title>KMS API Functions</title>
1512!Edrivers/gpu/drm/drm_crtc.c
1513 </sect2>
Rob Clark51fd3712013-11-19 12:10:12 -05001514 <sect2>
Daniel Vetter3bf04012014-10-27 16:54:27 +01001515 <title>KMS Data Structures</title>
1516!Iinclude/drm/drm_crtc.h
1517 </sect2>
1518 <sect2>
Rob Clark51fd3712013-11-19 12:10:12 -05001519 <title>KMS Locking</title>
1520!Pdrivers/gpu/drm/drm_modeset_lock.c kms locking
1521!Iinclude/drm/drm_modeset_lock.h
1522!Edrivers/gpu/drm/drm_modeset_lock.c
1523 </sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001524 </sect1>
1525
Daniel Vettere4949f22012-11-01 14:45:15 +01001526 <!-- Internals: kms helper functions -->
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001527
1528 <sect1>
Daniel Vettere4949f22012-11-01 14:45:15 +01001529 <title>Mode Setting Helper Functions</title>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001530 <para>
Matt Roper6efa1f22014-04-01 15:22:43 -07001531 The plane, CRTC, encoder and connector functions provided by the drivers
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001532 implement the DRM API. They're called by the DRM core and ioctl handlers
1533 to handle device state changes and configuration request. As implementing
1534 those functions often requires logic not specific to drivers, mid-layer
1535 helper functions are available to avoid duplicating boilerplate code.
1536 </para>
1537 <para>
1538 The DRM core contains one mid-layer implementation. The mid-layer provides
Matt Roper6efa1f22014-04-01 15:22:43 -07001539 implementations of several plane, CRTC, encoder and connector functions
1540 (called from the top of the mid-layer) that pre-process requests and call
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001541 lower-level functions provided by the driver (at the bottom of the
1542 mid-layer). For instance, the
1543 <function>drm_crtc_helper_set_config</function> function can be used to
1544 fill the struct <structname>drm_crtc_funcs</structname>
1545 <structfield>set_config</structfield> field. When called, it will split
1546 the <methodname>set_config</methodname> operation in smaller, simpler
1547 operations and call the driver to handle them.
1548 </para>
1549 <para>
1550 To use the mid-layer, drivers call <function>drm_crtc_helper_add</function>,
1551 <function>drm_encoder_helper_add</function> and
1552 <function>drm_connector_helper_add</function> functions to install their
1553 mid-layer bottom operations handlers, and fill the
1554 <structname>drm_crtc_funcs</structname>,
1555 <structname>drm_encoder_funcs</structname> and
1556 <structname>drm_connector_funcs</structname> structures with pointers to
1557 the mid-layer top API functions. Installing the mid-layer bottom operation
1558 handlers is best done right after registering the corresponding KMS object.
1559 </para>
1560 <para>
1561 The mid-layer is not split between CRTC, encoder and connector operations.
1562 To use it, a driver must provide bottom functions for all of the three KMS
1563 entities.
1564 </para>
1565 <sect2>
Daniel Vetter3150c7d2014-11-06 20:53:29 +01001566 <title>Atomic Modeset Helper Functions Reference</title>
1567 <sect3>
1568 <title>Overview</title>
1569!Pdrivers/gpu/drm/drm_atomic_helper.c overview
1570 </sect3>
1571 <sect3>
1572 <title>Implementing Asynchronous Atomic Commit</title>
1573!Pdrivers/gpu/drm/drm_atomic_helper.c implementing async commit
1574 </sect3>
1575 <sect3>
1576 <title>Atomic State Reset and Initialization</title>
1577!Pdrivers/gpu/drm/drm_atomic_helper.c atomic state reset and initialization
1578 </sect3>
Rob Clarkdd275952014-11-25 20:29:46 -05001579!Iinclude/drm/drm_atomic_helper.h
Daniel Vetter3150c7d2014-11-06 20:53:29 +01001580!Edrivers/gpu/drm/drm_atomic_helper.c
1581 </sect2>
1582 <sect2>
Daniel Vetter092d01d2015-12-04 09:45:44 +01001583 <title>Modeset Helper Reference for Common Vtables</title>
1584!Iinclude/drm/drm_modeset_helper_vtables.h
1585!Pinclude/drm/drm_modeset_helper_vtables.h overview
1586 </sect2>
1587 <sect2>
Daniel Vetter2be94972015-12-04 09:45:46 +01001588 <title>Legacy CRTC/Modeset Helper Functions Reference</title>
Daniel Vetter0d4ed4c2012-11-01 14:45:16 +01001589!Edrivers/gpu/drm/drm_crtc_helper.c
Daniel Vetter3150c7d2014-11-06 20:53:29 +01001590!Pdrivers/gpu/drm/drm_crtc_helper.c overview
Daniel Vetter0d4ed4c2012-11-01 14:45:16 +01001591 </sect2>
Daniel Vetterd0ddc0332012-11-01 14:45:17 +01001592 <sect2>
Daniel Vetter8d754542014-04-10 10:51:11 +02001593 <title>Output Probing Helper Functions Reference</title>
1594!Pdrivers/gpu/drm/drm_probe_helper.c output probing helper overview
1595!Edrivers/gpu/drm/drm_probe_helper.c
1596 </sect2>
1597 <sect2>
Daniel Vetterd0ddc0332012-11-01 14:45:17 +01001598 <title>fbdev Helper Functions Reference</title>
1599!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers
1600!Edrivers/gpu/drm/drm_fb_helper.c
Daniel Vetter207fd322013-01-20 22:13:14 +01001601!Iinclude/drm/drm_fb_helper.h
Daniel Vetterd0ddc0332012-11-01 14:45:17 +01001602 </sect2>
Daniel Vetter28164fd2012-11-01 14:45:18 +01001603 <sect2>
Noralf Trønnes02da16d2016-05-11 18:09:18 +02001604 <title>Framebuffer CMA Helper Functions Reference</title>
1605!Pdrivers/gpu/drm/drm_fb_cma_helper.c framebuffer cma helper functions
1606!Edrivers/gpu/drm/drm_fb_cma_helper.c
1607 </sect2>
1608 <sect2>
Daniel Vetter28164fd2012-11-01 14:45:18 +01001609 <title>Display Port Helper Functions Reference</title>
1610!Pdrivers/gpu/drm/drm_dp_helper.c dp helpers
1611!Iinclude/drm/drm_dp_helper.h
1612!Edrivers/gpu/drm/drm_dp_helper.c
1613 </sect2>
Thierry Reding5e308592013-01-14 09:00:31 +01001614 <sect2>
Ville Syrjäläb3daa5e2016-05-06 16:46:52 +03001615 <title>Display Port Dual Mode Adaptor Helper Functions Reference</title>
1616!Pdrivers/gpu/drm/drm_dp_dual_mode_helper.c dp dual mode helpers
1617!Iinclude/drm/drm_dp_dual_mode_helper.h
1618!Edrivers/gpu/drm/drm_dp_dual_mode_helper.c
1619 </sect2>
1620 <sect2>
Dave Airliead7f8a12014-06-05 14:01:32 +10001621 <title>Display Port MST Helper Functions Reference</title>
1622!Pdrivers/gpu/drm/drm_dp_mst_topology.c dp mst helper
1623!Iinclude/drm/drm_dp_mst_helper.h
1624!Edrivers/gpu/drm/drm_dp_mst_topology.c
1625 </sect2>
1626 <sect2>
Thierry Reding009081e2014-08-05 10:41:13 +02001627 <title>MIPI DSI Helper Functions Reference</title>
1628!Pdrivers/gpu/drm/drm_mipi_dsi.c dsi helpers
1629!Iinclude/drm/drm_mipi_dsi.h
1630!Edrivers/gpu/drm/drm_mipi_dsi.c
1631 </sect2>
1632 <sect2>
Thierry Reding5e308592013-01-14 09:00:31 +01001633 <title>EDID Helper Functions Reference</title>
1634!Edrivers/gpu/drm/drm_edid.c
1635 </sect2>
Ville Syrjälä03973532013-05-08 17:16:45 +03001636 <sect2>
1637 <title>Rectangle Utilities Reference</title>
1638!Pinclude/drm/drm_rect.h rect utils
1639!Iinclude/drm/drm_rect.h
1640!Edrivers/gpu/drm/drm_rect.c
1641 </sect2>
David Herrmannfe3078f2013-07-24 21:06:15 +02001642 <sect2>
Rob Clarkcabaafc2013-08-07 14:41:54 -04001643 <title>Flip-work Helper Reference</title>
1644!Pinclude/drm/drm_flip_work.h flip utils
1645!Iinclude/drm/drm_flip_work.h
1646!Edrivers/gpu/drm/drm_flip_work.c
1647 </sect2>
Daniel Vetter2d123f42014-01-22 18:26:16 +01001648 <sect2>
1649 <title>HDMI Infoframes Helper Reference</title>
1650 <para>
1651 Strictly speaking this is not a DRM helper library but generally useable
1652 by any driver interfacing with HDMI outputs like v4l or alsa drivers.
1653 But it nicely fits into the overall topic of mode setting helper
1654 libraries and hence is also included here.
1655 </para>
1656!Iinclude/linux/hdmi.h
1657!Edrivers/video/hdmi.c
1658 </sect2>
Matt Roper6efa1f22014-04-01 15:22:43 -07001659 <sect2>
1660 <title id="drm-kms-planehelpers">Plane Helper Reference</title>
Daniel Vetter3150c7d2014-11-06 20:53:29 +01001661!Edrivers/gpu/drm/drm_plane_helper.c
1662!Pdrivers/gpu/drm/drm_plane_helper.c overview
Matt Roper6efa1f22014-04-01 15:22:43 -07001663 </sect2>
Dave Airlie138f9eb2014-10-20 16:17:17 +10001664 <sect2>
1665 <title>Tile group</title>
1666!Pdrivers/gpu/drm/drm_crtc.c Tile group
1667 </sect2>
Archit Taneja2331b4e2015-05-21 11:03:17 +05301668 <sect2>
Thierry Reding83127f62016-05-06 16:01:37 +02001669 <title>Bridges</title>
Archit Taneja2331b4e2015-05-21 11:03:17 +05301670 <sect3>
Thierry Reding83127f62016-05-06 16:01:37 +02001671 <title>Overview</title>
Archit Taneja2331b4e2015-05-21 11:03:17 +05301672!Pdrivers/gpu/drm/drm_bridge.c overview
1673 </sect3>
1674 <sect3>
Thierry Reding83127f62016-05-06 16:01:37 +02001675 <title>Default bridge callback sequence</title>
Archit Taneja2331b4e2015-05-21 11:03:17 +05301676!Pdrivers/gpu/drm/drm_bridge.c bridge callbacks
1677 </sect3>
1678!Edrivers/gpu/drm/drm_bridge.c
1679 </sect2>
Thierry Reding83127f62016-05-06 16:01:37 +02001680 <sect2>
1681 <title>Panel Helper Reference</title>
1682!Iinclude/drm/drm_panel.h
1683!Edrivers/gpu/drm/drm_panel.c
1684!Pdrivers/gpu/drm/drm_panel.c drm panel
1685 </sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02001686 </sect1>
1687
Laurent Pinchart421cda32013-06-22 16:10:30 +02001688 <!-- Internals: kms properties -->
1689
1690 <sect1 id="drm-kms-properties">
1691 <title>KMS Properties</title>
1692 <para>
1693 Drivers may need to expose additional parameters to applications than
1694 those described in the previous sections. KMS supports attaching
1695 properties to CRTCs, connectors and planes and offers a userspace API to
1696 list, get and set the property values.
1697 </para>
1698 <para>
1699 Properties are identified by a name that uniquely defines the property
1700 purpose, and store an associated value. For all property types except blob
1701 properties the value is a 64-bit unsigned integer.
1702 </para>
1703 <para>
1704 KMS differentiates between properties and property instances. Drivers
1705 first create properties and then create and associate individual instances
1706 of those properties to objects. A property can be instantiated multiple
1707 times and associated with different objects. Values are stored in property
Masanari Iida9a6594f2014-05-15 13:54:06 -07001708 instances, and all other property information are stored in the property
Laurent Pinchart421cda32013-06-22 16:10:30 +02001709 and shared between all instances of the property.
1710 </para>
1711 <para>
1712 Every property is created with a type that influences how the KMS core
1713 handles the property. Supported property types are
1714 <variablelist>
1715 <varlistentry>
1716 <term>DRM_MODE_PROP_RANGE</term>
1717 <listitem><para>Range properties report their minimum and maximum
1718 admissible values. The KMS core verifies that values set by
1719 application fit in that range.</para></listitem>
1720 </varlistentry>
1721 <varlistentry>
1722 <term>DRM_MODE_PROP_ENUM</term>
1723 <listitem><para>Enumerated properties take a numerical value that
1724 ranges from 0 to the number of enumerated values defined by the
1725 property minus one, and associate a free-formed string name to each
1726 value. Applications can retrieve the list of defined value-name pairs
1727 and use the numerical value to get and set property instance values.
1728 </para></listitem>
1729 </varlistentry>
1730 <varlistentry>
1731 <term>DRM_MODE_PROP_BITMASK</term>
1732 <listitem><para>Bitmask properties are enumeration properties that
1733 additionally restrict all enumerated values to the 0..63 range.
1734 Bitmask property instance values combine one or more of the
1735 enumerated bits defined by the property.</para></listitem>
1736 </varlistentry>
1737 <varlistentry>
1738 <term>DRM_MODE_PROP_BLOB</term>
1739 <listitem><para>Blob properties store a binary blob without any format
1740 restriction. The binary blobs are created as KMS standalone objects,
1741 and blob property instance values store the ID of their associated
1742 blob object.</para>
1743 <para>Blob properties are only used for the connector EDID property
1744 and cannot be created by drivers.</para></listitem>
1745 </varlistentry>
1746 </variablelist>
1747 </para>
1748 <para>
1749 To create a property drivers call one of the following functions depending
1750 on the property type. All property creation functions take property flags
1751 and name, as well as type-specific arguments.
1752 <itemizedlist>
1753 <listitem>
1754 <synopsis>struct drm_property *drm_property_create_range(struct drm_device *dev, int flags,
1755 const char *name,
1756 uint64_t min, uint64_t max);</synopsis>
1757 <para>Create a range property with the given minimum and maximum
1758 values.</para>
1759 </listitem>
1760 <listitem>
1761 <synopsis>struct drm_property *drm_property_create_enum(struct drm_device *dev, int flags,
1762 const char *name,
1763 const struct drm_prop_enum_list *props,
1764 int num_values);</synopsis>
1765 <para>Create an enumerated property. The <parameter>props</parameter>
1766 argument points to an array of <parameter>num_values</parameter>
1767 value-name pairs.</para>
1768 </listitem>
1769 <listitem>
1770 <synopsis>struct drm_property *drm_property_create_bitmask(struct drm_device *dev,
1771 int flags, const char *name,
1772 const struct drm_prop_enum_list *props,
1773 int num_values);</synopsis>
1774 <para>Create a bitmask property. The <parameter>props</parameter>
1775 argument points to an array of <parameter>num_values</parameter>
1776 value-name pairs.</para>
1777 </listitem>
1778 </itemizedlist>
1779 </para>
1780 <para>
1781 Properties can additionally be created as immutable, in which case they
1782 will be read-only for applications but can be modified by the driver. To
1783 create an immutable property drivers must set the DRM_MODE_PROP_IMMUTABLE
1784 flag at property creation time.
1785 </para>
1786 <para>
1787 When no array of value-name pairs is readily available at property
1788 creation time for enumerated or range properties, drivers can create
1789 the property using the <function>drm_property_create</function> function
1790 and manually add enumeration value-name pairs by calling the
1791 <function>drm_property_add_enum</function> function. Care must be taken to
1792 properly specify the property type through the <parameter>flags</parameter>
1793 argument.
1794 </para>
1795 <para>
1796 After creating properties drivers can attach property instances to CRTC,
1797 connector and plane objects by calling the
1798 <function>drm_object_attach_property</function>. The function takes a
1799 pointer to the target object, a pointer to the previously created property
1800 and an initial instance value.
1801 </para>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05301802 <sect2>
1803 <title>Existing KMS Properties</title>
1804 <para>
1805 The following table gives description of drm properties exposed by various
1806 modules/drivers.
1807 </para>
1808 <table border="1" cellpadding="0" cellspacing="0">
1809 <tbody>
1810 <tr style="font-weight: bold;">
1811 <td valign="top" >Owner Module/Drivers</td>
1812 <td valign="top" >Group</td>
1813 <td valign="top" >Property Name</td>
1814 <td valign="top" >Type</td>
1815 <td valign="top" >Property Values</td>
1816 <td valign="top" >Object attached</td>
1817 <td valign="top" >Description/Restrictions</td>
1818 </tr>
1819 <tr>
Lionel Landwerlin5488dc12016-02-26 17:05:00 +00001820 <td rowspan="42" valign="top" >DRM</td>
Robert Fossfcbcb3b2016-05-02 15:13:01 -04001821 <td rowspan="2" valign="top" >Generic</td>
Sonika Jindal712a0dd2015-05-28 16:35:07 +05301822 <td valign="top" >“rotation”</td>
1823 <td valign="top" >BITMASK</td>
1824 <td valign="top" >{ 0, "rotate-0" },
1825 { 1, "rotate-90" },
1826 { 2, "rotate-180" },
1827 { 3, "rotate-270" },
1828 { 4, "reflect-x" },
1829 { 5, "reflect-y" }</td>
1830 <td valign="top" >CRTC, Plane</td>
1831 <td valign="top" >rotate-(degrees) rotates the image by the specified amount in degrees
1832 in counter clockwise direction. reflect-x and reflect-y reflects the
1833 image along the specified axis prior to rotation</td>
1834 </tr>
1835 <tr>
Robert Fossfcbcb3b2016-05-02 15:13:01 -04001836 <td valign="top" >“scaling mode”</td>
1837 <td valign="top" >ENUM</td>
1838 <td valign="top" >{ "None", "Full", "Center", "Full aspect" }</td>
1839 <td valign="top" >Connector</td>
1840 <td valign="top" >Supported by: amdgpu, gma500, i915, nouveau and radeon.</td>
1841 </tr>
1842 <tr>
Rob Clarkae16c592014-12-18 16:01:54 -05001843 <td rowspan="5" valign="top" >Connector</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05301844 <td valign="top" >“EDID”</td>
1845 <td valign="top" >BLOB | IMMUTABLE</td>
1846 <td valign="top" >0</td>
1847 <td valign="top" >Connector</td>
1848 <td valign="top" >Contains id of edid blob ptr object.</td>
1849 </tr>
1850 <tr>
1851 <td valign="top" >“DPMS”</td>
1852 <td valign="top" >ENUM</td>
1853 <td valign="top" >{ “On”, “Standby”, “Suspend”, “Off” }</td>
1854 <td valign="top" >Connector</td>
1855 <td valign="top" >Contains DPMS operation mode value.</td>
1856 </tr>
1857 <tr>
Dave Airliecc7096f2014-10-22 12:03:04 +10001858 <td valign="top" >“PATH”</td>
1859 <td valign="top" >BLOB | IMMUTABLE</td>
1860 <td valign="top" >0</td>
1861 <td valign="top" >Connector</td>
1862 <td valign="top" >Contains topology path to a connector.</td>
1863 </tr>
1864 <tr>
Dave Airlie6f134d72014-10-20 16:30:50 +10001865 <td valign="top" >“TILE”</td>
1866 <td valign="top" >BLOB | IMMUTABLE</td>
1867 <td valign="top" >0</td>
1868 <td valign="top" >Connector</td>
1869 <td valign="top" >Contains tiling information for a connector.</td>
1870 </tr>
1871 <tr>
Rob Clarkae16c592014-12-18 16:01:54 -05001872 <td valign="top" >“CRTC_ID”</td>
1873 <td valign="top" >OBJECT</td>
1874 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
1875 <td valign="top" >Connector</td>
1876 <td valign="top" >CRTC that connector is attached to (atomic)</td>
1877 </tr>
1878 <tr>
Rob Clark6b4959f2014-12-18 16:01:53 -05001879 <td rowspan="11" valign="top" >Plane</td>
Damien Lespiau59748612014-06-09 14:20:22 +01001880 <td valign="top" >“type”</td>
1881 <td valign="top" >ENUM | IMMUTABLE</td>
1882 <td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
1883 <td valign="top" >Plane</td>
1884 <td valign="top" >Plane type</td>
1885 </tr>
1886 <tr>
Rob Clark6b4959f2014-12-18 16:01:53 -05001887 <td valign="top" >“SRC_X”</td>
1888 <td valign="top" >RANGE</td>
1889 <td valign="top" >Min=0, Max=UINT_MAX</td>
1890 <td valign="top" >Plane</td>
1891 <td valign="top" >Scanout source x coordinate in 16.16 fixed point (atomic)</td>
1892 </tr>
1893 <tr>
1894 <td valign="top" >“SRC_Y”</td>
1895 <td valign="top" >RANGE</td>
1896 <td valign="top" >Min=0, Max=UINT_MAX</td>
1897 <td valign="top" >Plane</td>
1898 <td valign="top" >Scanout source y coordinate in 16.16 fixed point (atomic)</td>
1899 </tr>
1900 <tr>
1901 <td valign="top" >“SRC_W”</td>
1902 <td valign="top" >RANGE</td>
1903 <td valign="top" >Min=0, Max=UINT_MAX</td>
1904 <td valign="top" >Plane</td>
1905 <td valign="top" >Scanout source width in 16.16 fixed point (atomic)</td>
1906 </tr>
1907 <tr>
1908 <td valign="top" >“SRC_H”</td>
1909 <td valign="top" >RANGE</td>
1910 <td valign="top" >Min=0, Max=UINT_MAX</td>
1911 <td valign="top" >Plane</td>
1912 <td valign="top" >Scanout source height in 16.16 fixed point (atomic)</td>
1913 </tr>
1914 <tr>
1915 <td valign="top" >“CRTC_X”</td>
1916 <td valign="top" >SIGNED_RANGE</td>
1917 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
1918 <td valign="top" >Plane</td>
1919 <td valign="top" >Scanout CRTC (destination) x coordinate (atomic)</td>
1920 </tr>
1921 <tr>
1922 <td valign="top" >“CRTC_Y”</td>
1923 <td valign="top" >SIGNED_RANGE</td>
1924 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
1925 <td valign="top" >Plane</td>
1926 <td valign="top" >Scanout CRTC (destination) y coordinate (atomic)</td>
1927 </tr>
1928 <tr>
1929 <td valign="top" >“CRTC_W”</td>
1930 <td valign="top" >RANGE</td>
1931 <td valign="top" >Min=0, Max=UINT_MAX</td>
1932 <td valign="top" >Plane</td>
1933 <td valign="top" >Scanout CRTC (destination) width (atomic)</td>
1934 </tr>
1935 <tr>
1936 <td valign="top" >“CRTC_H”</td>
1937 <td valign="top" >RANGE</td>
1938 <td valign="top" >Min=0, Max=UINT_MAX</td>
1939 <td valign="top" >Plane</td>
1940 <td valign="top" >Scanout CRTC (destination) height (atomic)</td>
1941 </tr>
1942 <tr>
1943 <td valign="top" >“FB_ID”</td>
1944 <td valign="top" >OBJECT</td>
1945 <td valign="top" >DRM_MODE_OBJECT_FB</td>
1946 <td valign="top" >Plane</td>
1947 <td valign="top" >Scanout framebuffer (atomic)</td>
1948 </tr>
1949 <tr>
1950 <td valign="top" >“CRTC_ID”</td>
1951 <td valign="top" >OBJECT</td>
1952 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
1953 <td valign="top" >Plane</td>
1954 <td valign="top" >CRTC that plane is attached to (atomic)</td>
1955 </tr>
1956 <tr>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05301957 <td rowspan="2" valign="top" >DVI-I</td>
1958 <td valign="top" >“subconnector”</td>
1959 <td valign="top" >ENUM</td>
1960 <td valign="top" >{ “Unknown”, “DVI-D”, “DVI-A” }</td>
1961 <td valign="top" >Connector</td>
1962 <td valign="top" >TBD</td>
1963 </tr>
1964 <tr>
1965 <td valign="top" >“select subconnector”</td>
1966 <td valign="top" >ENUM</td>
1967 <td valign="top" >{ “Automatic”, “DVI-D”, “DVI-A” }</td>
1968 <td valign="top" >Connector</td>
1969 <td valign="top" >TBD</td>
1970 </tr>
1971 <tr>
1972 <td rowspan="13" valign="top" >TV</td>
1973 <td valign="top" >“subconnector”</td>
1974 <td valign="top" >ENUM</td>
1975 <td valign="top" >{ "Unknown", "Composite", "SVIDEO", "Component", "SCART" }</td>
1976 <td valign="top" >Connector</td>
1977 <td valign="top" >TBD</td>
1978 </tr>
1979 <tr>
1980 <td valign="top" >“select subconnector”</td>
1981 <td valign="top" >ENUM</td>
1982 <td valign="top" >{ "Automatic", "Composite", "SVIDEO", "Component", "SCART" }</td>
1983 <td valign="top" >Connector</td>
1984 <td valign="top" >TBD</td>
1985 </tr>
1986 <tr>
1987 <td valign="top" >“mode”</td>
1988 <td valign="top" >ENUM</td>
1989 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
1990 <td valign="top" >Connector</td>
1991 <td valign="top" >TBD</td>
1992 </tr>
1993 <tr>
1994 <td valign="top" >“left margin”</td>
1995 <td valign="top" >RANGE</td>
1996 <td valign="top" >Min=0, Max=100</td>
1997 <td valign="top" >Connector</td>
1998 <td valign="top" >TBD</td>
1999 </tr>
2000 <tr>
2001 <td valign="top" >“right margin”</td>
2002 <td valign="top" >RANGE</td>
2003 <td valign="top" >Min=0, Max=100</td>
2004 <td valign="top" >Connector</td>
2005 <td valign="top" >TBD</td>
2006 </tr>
2007 <tr>
2008 <td valign="top" >“top margin”</td>
2009 <td valign="top" >RANGE</td>
2010 <td valign="top" >Min=0, Max=100</td>
2011 <td valign="top" >Connector</td>
2012 <td valign="top" >TBD</td>
2013 </tr>
2014 <tr>
2015 <td valign="top" >“bottom margin”</td>
2016 <td valign="top" >RANGE</td>
2017 <td valign="top" >Min=0, Max=100</td>
2018 <td valign="top" >Connector</td>
2019 <td valign="top" >TBD</td>
2020 </tr>
2021 <tr>
2022 <td valign="top" >“brightness”</td>
2023 <td valign="top" >RANGE</td>
2024 <td valign="top" >Min=0, Max=100</td>
2025 <td valign="top" >Connector</td>
2026 <td valign="top" >TBD</td>
2027 </tr>
2028 <tr>
2029 <td valign="top" >“contrast”</td>
2030 <td valign="top" >RANGE</td>
2031 <td valign="top" >Min=0, Max=100</td>
2032 <td valign="top" >Connector</td>
2033 <td valign="top" >TBD</td>
2034 </tr>
2035 <tr>
2036 <td valign="top" >“flicker reduction”</td>
2037 <td valign="top" >RANGE</td>
2038 <td valign="top" >Min=0, Max=100</td>
2039 <td valign="top" >Connector</td>
2040 <td valign="top" >TBD</td>
2041 </tr>
2042 <tr>
2043 <td valign="top" >“overscan”</td>
2044 <td valign="top" >RANGE</td>
2045 <td valign="top" >Min=0, Max=100</td>
2046 <td valign="top" >Connector</td>
2047 <td valign="top" >TBD</td>
2048 </tr>
2049 <tr>
2050 <td valign="top" >“saturation”</td>
2051 <td valign="top" >RANGE</td>
2052 <td valign="top" >Min=0, Max=100</td>
2053 <td valign="top" >Connector</td>
2054 <td valign="top" >TBD</td>
2055 </tr>
2056 <tr>
2057 <td valign="top" >“hue”</td>
2058 <td valign="top" >RANGE</td>
2059 <td valign="top" >Min=0, Max=100</td>
2060 <td valign="top" >Connector</td>
2061 <td valign="top" >TBD</td>
2062 </tr>
2063 <tr>
Dave Airlie5bb2bbf2014-11-10 10:18:15 +10002064 <td rowspan="2" valign="top" >Virtual GPU</td>
2065 <td valign="top" >“suggested X”</td>
2066 <td valign="top" >RANGE</td>
2067 <td valign="top" >Min=0, Max=0xffffffff</td>
2068 <td valign="top" >Connector</td>
2069 <td valign="top" >property to suggest an X offset for a connector</td>
2070 </tr>
2071 <tr>
2072 <td valign="top" >“suggested Y”</td>
2073 <td valign="top" >RANGE</td>
2074 <td valign="top" >Min=0, Max=0xffffffff</td>
2075 <td valign="top" >Connector</td>
2076 <td valign="top" >property to suggest an Y offset for a connector</td>
2077 </tr>
2078 <tr>
Robert Fossfcbcb3b2016-05-02 15:13:01 -04002079 <td rowspan="7" valign="top" >Optional</td>
Vandana Kannan726a2802014-06-11 14:33:05 +05302080 <td valign="top" >"aspect ratio"</td>
2081 <td valign="top" >ENUM</td>
2082 <td valign="top" >{ "None", "4:3", "16:9" }</td>
2083 <td valign="top" >Connector</td>
Robert Fossfcbcb3b2016-05-02 15:13:01 -04002084 <td valign="top" >TDB</td>
Vandana Kannan726a2802014-06-11 14:33:05 +05302085 </tr>
2086 <tr>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302087 <td valign="top" >“dirty”</td>
2088 <td valign="top" >ENUM | IMMUTABLE</td>
2089 <td valign="top" >{ "Off", "On", "Annotate" }</td>
2090 <td valign="top" >Connector</td>
2091 <td valign="top" >TBD</td>
2092 </tr>
2093 <tr>
Lionel Landwerlin5488dc12016-02-26 17:05:00 +00002094 <td valign="top" >“DEGAMMA_LUT”</td>
2095 <td valign="top" >BLOB</td>
2096 <td valign="top" >0</td>
2097 <td valign="top" >CRTC</td>
2098 <td valign="top" >DRM property to set the degamma lookup table
2099 (LUT) mapping pixel data from the framebuffer before it is
2100 given to the transformation matrix. The data is an interpreted
2101 as an array of struct drm_color_lut elements. Hardware might
2102 choose not to use the full precision of the LUT elements nor
2103 use all the elements of the LUT (for example the hardware
2104 might choose to interpolate between LUT[0] and LUT[4]). </td>
2105 </tr>
2106 <tr>
2107 <td valign="top" >“DEGAMMA_LUT_SIZE”</td>
2108 <td valign="top" >RANGE | IMMUTABLE</td>
2109 <td valign="top" >Min=0, Max=UINT_MAX</td>
2110 <td valign="top" >CRTC</td>
2111 <td valign="top" >DRM property to gives the size of the lookup
2112 table to be set on the DEGAMMA_LUT property (the size depends
2113 on the underlying hardware).</td>
2114 </tr>
2115 <tr>
2116 <td valign="top" >“CTM”</td>
2117 <td valign="top" >BLOB</td>
2118 <td valign="top" >0</td>
2119 <td valign="top" >CRTC</td>
2120 <td valign="top" >DRM property to set the current
2121 transformation matrix (CTM) apply to pixel data after the
2122 lookup through the degamma LUT and before the lookup through
2123 the gamma LUT. The data is an interpreted as a struct
2124 drm_color_ctm.</td>
2125 </tr>
2126 <tr>
2127 <td valign="top" >“GAMMA_LUT”</td>
2128 <td valign="top" >BLOB</td>
2129 <td valign="top" >0</td>
2130 <td valign="top" >CRTC</td>
2131 <td valign="top" >DRM property to set the gamma lookup table
2132 (LUT) mapping pixel data after to the transformation matrix to
2133 data sent to the connector. The data is an interpreted as an
2134 array of struct drm_color_lut elements. Hardware might choose
2135 not to use the full precision of the LUT elements nor use all
2136 the elements of the LUT (for example the hardware might choose
2137 to interpolate between LUT[0] and LUT[4]).</td>
2138 </tr>
2139 <tr>
2140 <td valign="top" >“GAMMA_LUT_SIZE”</td>
2141 <td valign="top" >RANGE | IMMUTABLE</td>
2142 <td valign="top" >Min=0, Max=UINT_MAX</td>
2143 <td valign="top" >CRTC</td>
2144 <td valign="top" >DRM property to gives the size of the lookup
2145 table to be set on the GAMMA_LUT property (the size depends on
2146 the underlying hardware).</td>
2147 </tr>
2148 <tr>
Sonika Jindal712a0dd2015-05-28 16:35:07 +05302149 <td rowspan="20" valign="top" >i915</td>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302150 <td rowspan="2" valign="top" >Generic</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302151 <td valign="top" >"Broadcast RGB"</td>
2152 <td valign="top" >ENUM</td>
2153 <td valign="top" >{ "Automatic", "Full", "Limited 16:235" }</td>
2154 <td valign="top" >Connector</td>
Lionel Landwerlin82cf4352016-03-16 10:57:16 +00002155 <td valign="top" >When this property is set to Limited 16:235
2156 and CTM is set, the hardware will be programmed with the
2157 result of the multiplication of CTM by the limited range
2158 matrix to ensure the pixels normaly in the range 0..1.0 are
2159 remapped to the range 16/255..235/255.</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302160 </tr>
2161 <tr>
2162 <td valign="top" >“audio”</td>
2163 <td valign="top" >ENUM</td>
2164 <td valign="top" >{ "force-dvi", "off", "auto", "on" }</td>
2165 <td valign="top" >Connector</td>
2166 <td valign="top" >TBD</td>
2167 </tr>
2168 <tr>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302169 <td rowspan="17" valign="top" >SDVO-TV</td>
2170 <td valign="top" >“mode”</td>
2171 <td valign="top" >ENUM</td>
2172 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2173 <td valign="top" >Connector</td>
2174 <td valign="top" >TBD</td>
2175 </tr>
2176 <tr>
2177 <td valign="top" >"left_margin"</td>
2178 <td valign="top" >RANGE</td>
2179 <td valign="top" >Min=0, Max= SDVO dependent</td>
2180 <td valign="top" >Connector</td>
2181 <td valign="top" >TBD</td>
2182 </tr>
2183 <tr>
2184 <td valign="top" >"right_margin"</td>
2185 <td valign="top" >RANGE</td>
2186 <td valign="top" >Min=0, Max= SDVO dependent</td>
2187 <td valign="top" >Connector</td>
2188 <td valign="top" >TBD</td>
2189 </tr>
2190 <tr>
2191 <td valign="top" >"top_margin"</td>
2192 <td valign="top" >RANGE</td>
2193 <td valign="top" >Min=0, Max= SDVO dependent</td>
2194 <td valign="top" >Connector</td>
2195 <td valign="top" >TBD</td>
2196 </tr>
2197 <tr>
2198 <td valign="top" >"bottom_margin"</td>
2199 <td valign="top" >RANGE</td>
2200 <td valign="top" >Min=0, Max= SDVO dependent</td>
2201 <td valign="top" >Connector</td>
2202 <td valign="top" >TBD</td>
2203 </tr>
2204 <tr>
2205 <td valign="top" >“hpos”</td>
2206 <td valign="top" >RANGE</td>
2207 <td valign="top" >Min=0, Max= SDVO dependent</td>
2208 <td valign="top" >Connector</td>
2209 <td valign="top" >TBD</td>
2210 </tr>
2211 <tr>
2212 <td valign="top" >“vpos”</td>
2213 <td valign="top" >RANGE</td>
2214 <td valign="top" >Min=0, Max= SDVO dependent</td>
2215 <td valign="top" >Connector</td>
2216 <td valign="top" >TBD</td>
2217 </tr>
2218 <tr>
2219 <td valign="top" >“contrast”</td>
2220 <td valign="top" >RANGE</td>
2221 <td valign="top" >Min=0, Max= SDVO dependent</td>
2222 <td valign="top" >Connector</td>
2223 <td valign="top" >TBD</td>
2224 </tr>
2225 <tr>
2226 <td valign="top" >“saturation”</td>
2227 <td valign="top" >RANGE</td>
2228 <td valign="top" >Min=0, Max= SDVO dependent</td>
2229 <td valign="top" >Connector</td>
2230 <td valign="top" >TBD</td>
2231 </tr>
2232 <tr>
2233 <td valign="top" >“hue”</td>
2234 <td valign="top" >RANGE</td>
2235 <td valign="top" >Min=0, Max= SDVO dependent</td>
2236 <td valign="top" >Connector</td>
2237 <td valign="top" >TBD</td>
2238 </tr>
2239 <tr>
2240 <td valign="top" >“sharpness”</td>
2241 <td valign="top" >RANGE</td>
2242 <td valign="top" >Min=0, Max= SDVO dependent</td>
2243 <td valign="top" >Connector</td>
2244 <td valign="top" >TBD</td>
2245 </tr>
2246 <tr>
2247 <td valign="top" >“flicker_filter”</td>
2248 <td valign="top" >RANGE</td>
2249 <td valign="top" >Min=0, Max= SDVO dependent</td>
2250 <td valign="top" >Connector</td>
2251 <td valign="top" >TBD</td>
2252 </tr>
2253 <tr>
2254 <td valign="top" >“flicker_filter_adaptive”</td>
2255 <td valign="top" >RANGE</td>
2256 <td valign="top" >Min=0, Max= SDVO dependent</td>
2257 <td valign="top" >Connector</td>
2258 <td valign="top" >TBD</td>
2259 </tr>
2260 <tr>
2261 <td valign="top" >“flicker_filter_2d”</td>
2262 <td valign="top" >RANGE</td>
2263 <td valign="top" >Min=0, Max= SDVO dependent</td>
2264 <td valign="top" >Connector</td>
2265 <td valign="top" >TBD</td>
2266 </tr>
2267 <tr>
2268 <td valign="top" >“tv_chroma_filter”</td>
2269 <td valign="top" >RANGE</td>
2270 <td valign="top" >Min=0, Max= SDVO dependent</td>
2271 <td valign="top" >Connector</td>
2272 <td valign="top" >TBD</td>
2273 </tr>
2274 <tr>
2275 <td valign="top" >“tv_luma_filter”</td>
2276 <td valign="top" >RANGE</td>
2277 <td valign="top" >Min=0, Max= SDVO dependent</td>
2278 <td valign="top" >Connector</td>
2279 <td valign="top" >TBD</td>
2280 </tr>
2281 <tr>
2282 <td valign="top" >“dot_crawl”</td>
2283 <td valign="top" >RANGE</td>
2284 <td valign="top" >Min=0, Max=1</td>
2285 <td valign="top" >Connector</td>
2286 <td valign="top" >TBD</td>
2287 </tr>
2288 <tr>
2289 <td valign="top" >SDVO-TV/LVDS</td>
2290 <td valign="top" >“brightness”</td>
2291 <td valign="top" >RANGE</td>
2292 <td valign="top" >Min=0, Max= SDVO dependent</td>
2293 <td valign="top" >Connector</td>
2294 <td valign="top" >TBD</td>
2295 </tr>
2296 <tr>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302297 <td rowspan="2" valign="top" >CDV gma-500</td>
2298 <td rowspan="2" valign="top" >Generic</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302299 <td valign="top" >"Broadcast RGB"</td>
2300 <td valign="top" >ENUM</td>
2301 <td valign="top" >{ “Full”, “Limited 16:235” }</td>
2302 <td valign="top" >Connector</td>
2303 <td valign="top" >TBD</td>
2304 </tr>
2305 <tr>
2306 <td valign="top" >"Broadcast RGB"</td>
2307 <td valign="top" >ENUM</td>
2308 <td valign="top" >{ “off”, “auto”, “on” }</td>
2309 <td valign="top" >Connector</td>
2310 <td valign="top" >TBD</td>
2311 </tr>
2312 <tr>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302313 <td rowspan="19" valign="top" >Poulsbo</td>
2314 <td rowspan="1" valign="top" >Generic</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302315 <td valign="top" >“backlight”</td>
2316 <td valign="top" >RANGE</td>
2317 <td valign="top" >Min=0, Max=100</td>
2318 <td valign="top" >Connector</td>
2319 <td valign="top" >TBD</td>
2320 </tr>
2321 <tr>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302322 <td rowspan="17" valign="top" >SDVO-TV</td>
2323 <td valign="top" >“mode”</td>
2324 <td valign="top" >ENUM</td>
2325 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2326 <td valign="top" >Connector</td>
2327 <td valign="top" >TBD</td>
2328 </tr>
2329 <tr>
2330 <td valign="top" >"left_margin"</td>
2331 <td valign="top" >RANGE</td>
2332 <td valign="top" >Min=0, Max= SDVO dependent</td>
2333 <td valign="top" >Connector</td>
2334 <td valign="top" >TBD</td>
2335 </tr>
2336 <tr>
2337 <td valign="top" >"right_margin"</td>
2338 <td valign="top" >RANGE</td>
2339 <td valign="top" >Min=0, Max= SDVO dependent</td>
2340 <td valign="top" >Connector</td>
2341 <td valign="top" >TBD</td>
2342 </tr>
2343 <tr>
2344 <td valign="top" >"top_margin"</td>
2345 <td valign="top" >RANGE</td>
2346 <td valign="top" >Min=0, Max= SDVO dependent</td>
2347 <td valign="top" >Connector</td>
2348 <td valign="top" >TBD</td>
2349 </tr>
2350 <tr>
2351 <td valign="top" >"bottom_margin"</td>
2352 <td valign="top" >RANGE</td>
2353 <td valign="top" >Min=0, Max= SDVO dependent</td>
2354 <td valign="top" >Connector</td>
2355 <td valign="top" >TBD</td>
2356 </tr>
2357 <tr>
2358 <td valign="top" >“hpos”</td>
2359 <td valign="top" >RANGE</td>
2360 <td valign="top" >Min=0, Max= SDVO dependent</td>
2361 <td valign="top" >Connector</td>
2362 <td valign="top" >TBD</td>
2363 </tr>
2364 <tr>
2365 <td valign="top" >“vpos”</td>
2366 <td valign="top" >RANGE</td>
2367 <td valign="top" >Min=0, Max= SDVO dependent</td>
2368 <td valign="top" >Connector</td>
2369 <td valign="top" >TBD</td>
2370 </tr>
2371 <tr>
2372 <td valign="top" >“contrast”</td>
2373 <td valign="top" >RANGE</td>
2374 <td valign="top" >Min=0, Max= SDVO dependent</td>
2375 <td valign="top" >Connector</td>
2376 <td valign="top" >TBD</td>
2377 </tr>
2378 <tr>
2379 <td valign="top" >“saturation”</td>
2380 <td valign="top" >RANGE</td>
2381 <td valign="top" >Min=0, Max= SDVO dependent</td>
2382 <td valign="top" >Connector</td>
2383 <td valign="top" >TBD</td>
2384 </tr>
2385 <tr>
2386 <td valign="top" >“hue”</td>
2387 <td valign="top" >RANGE</td>
2388 <td valign="top" >Min=0, Max= SDVO dependent</td>
2389 <td valign="top" >Connector</td>
2390 <td valign="top" >TBD</td>
2391 </tr>
2392 <tr>
2393 <td valign="top" >“sharpness”</td>
2394 <td valign="top" >RANGE</td>
2395 <td valign="top" >Min=0, Max= SDVO dependent</td>
2396 <td valign="top" >Connector</td>
2397 <td valign="top" >TBD</td>
2398 </tr>
2399 <tr>
2400 <td valign="top" >“flicker_filter”</td>
2401 <td valign="top" >RANGE</td>
2402 <td valign="top" >Min=0, Max= SDVO dependent</td>
2403 <td valign="top" >Connector</td>
2404 <td valign="top" >TBD</td>
2405 </tr>
2406 <tr>
2407 <td valign="top" >“flicker_filter_adaptive”</td>
2408 <td valign="top" >RANGE</td>
2409 <td valign="top" >Min=0, Max= SDVO dependent</td>
2410 <td valign="top" >Connector</td>
2411 <td valign="top" >TBD</td>
2412 </tr>
2413 <tr>
2414 <td valign="top" >“flicker_filter_2d”</td>
2415 <td valign="top" >RANGE</td>
2416 <td valign="top" >Min=0, Max= SDVO dependent</td>
2417 <td valign="top" >Connector</td>
2418 <td valign="top" >TBD</td>
2419 </tr>
2420 <tr>
2421 <td valign="top" >“tv_chroma_filter”</td>
2422 <td valign="top" >RANGE</td>
2423 <td valign="top" >Min=0, Max= SDVO dependent</td>
2424 <td valign="top" >Connector</td>
2425 <td valign="top" >TBD</td>
2426 </tr>
2427 <tr>
2428 <td valign="top" >“tv_luma_filter”</td>
2429 <td valign="top" >RANGE</td>
2430 <td valign="top" >Min=0, Max= SDVO dependent</td>
2431 <td valign="top" >Connector</td>
2432 <td valign="top" >TBD</td>
2433 </tr>
2434 <tr>
2435 <td valign="top" >“dot_crawl”</td>
2436 <td valign="top" >RANGE</td>
2437 <td valign="top" >Min=0, Max=1</td>
2438 <td valign="top" >Connector</td>
2439 <td valign="top" >TBD</td>
2440 </tr>
2441 <tr>
2442 <td valign="top" >SDVO-TV/LVDS</td>
2443 <td valign="top" >“brightness”</td>
2444 <td valign="top" >RANGE</td>
2445 <td valign="top" >Min=0, Max= SDVO dependent</td>
2446 <td valign="top" >Connector</td>
2447 <td valign="top" >TBD</td>
2448 </tr>
2449 <tr>
2450 <td rowspan="11" valign="top" >armada</td>
2451 <td rowspan="2" valign="top" >CRTC</td>
2452 <td valign="top" >"CSC_YUV"</td>
2453 <td valign="top" >ENUM</td>
2454 <td valign="top" >{ "Auto" , "CCIR601", "CCIR709" }</td>
2455 <td valign="top" >CRTC</td>
2456 <td valign="top" >TBD</td>
2457 </tr>
2458 <tr>
2459 <td valign="top" >"CSC_RGB"</td>
2460 <td valign="top" >ENUM</td>
2461 <td valign="top" >{ "Auto", "Computer system", "Studio" }</td>
2462 <td valign="top" >CRTC</td>
2463 <td valign="top" >TBD</td>
2464 </tr>
2465 <tr>
2466 <td rowspan="9" valign="top" >Overlay</td>
2467 <td valign="top" >"colorkey"</td>
2468 <td valign="top" >RANGE</td>
2469 <td valign="top" >Min=0, Max=0xffffff</td>
2470 <td valign="top" >Plane</td>
2471 <td valign="top" >TBD</td>
2472 </tr>
2473 <tr>
2474 <td valign="top" >"colorkey_min"</td>
2475 <td valign="top" >RANGE</td>
2476 <td valign="top" >Min=0, Max=0xffffff</td>
2477 <td valign="top" >Plane</td>
2478 <td valign="top" >TBD</td>
2479 </tr>
2480 <tr>
2481 <td valign="top" >"colorkey_max"</td>
2482 <td valign="top" >RANGE</td>
2483 <td valign="top" >Min=0, Max=0xffffff</td>
2484 <td valign="top" >Plane</td>
2485 <td valign="top" >TBD</td>
2486 </tr>
2487 <tr>
2488 <td valign="top" >"colorkey_val"</td>
2489 <td valign="top" >RANGE</td>
2490 <td valign="top" >Min=0, Max=0xffffff</td>
2491 <td valign="top" >Plane</td>
2492 <td valign="top" >TBD</td>
2493 </tr>
2494 <tr>
2495 <td valign="top" >"colorkey_alpha"</td>
2496 <td valign="top" >RANGE</td>
2497 <td valign="top" >Min=0, Max=0xffffff</td>
2498 <td valign="top" >Plane</td>
2499 <td valign="top" >TBD</td>
2500 </tr>
2501 <tr>
2502 <td valign="top" >"colorkey_mode"</td>
2503 <td valign="top" >ENUM</td>
2504 <td valign="top" >{ "disabled", "Y component", "U component"
2505 , "V component", "RGB", “R component", "G component", "B component" }</td>
2506 <td valign="top" >Plane</td>
2507 <td valign="top" >TBD</td>
2508 </tr>
2509 <tr>
2510 <td valign="top" >"brightness"</td>
2511 <td valign="top" >RANGE</td>
2512 <td valign="top" >Min=0, Max=256 + 255</td>
2513 <td valign="top" >Plane</td>
2514 <td valign="top" >TBD</td>
2515 </tr>
2516 <tr>
2517 <td valign="top" >"contrast"</td>
2518 <td valign="top" >RANGE</td>
2519 <td valign="top" >Min=0, Max=0x7fff</td>
2520 <td valign="top" >Plane</td>
2521 <td valign="top" >TBD</td>
2522 </tr>
2523 <tr>
2524 <td valign="top" >"saturation"</td>
2525 <td valign="top" >RANGE</td>
2526 <td valign="top" >Min=0, Max=0x7fff</td>
2527 <td valign="top" >Plane</td>
2528 <td valign="top" >TBD</td>
2529 </tr>
2530 <tr>
2531 <td rowspan="2" valign="top" >exynos</td>
2532 <td valign="top" >CRTC</td>
2533 <td valign="top" >“mode”</td>
2534 <td valign="top" >ENUM</td>
2535 <td valign="top" >{ "normal", "blank" }</td>
2536 <td valign="top" >CRTC</td>
2537 <td valign="top" >TBD</td>
2538 </tr>
2539 <tr>
2540 <td valign="top" >Overlay</td>
2541 <td valign="top" >“zpos”</td>
2542 <td valign="top" >RANGE</td>
2543 <td valign="top" >Min=0, Max=MAX_PLANE-1</td>
2544 <td valign="top" >Plane</td>
2545 <td valign="top" >TBD</td>
2546 </tr>
2547 <tr>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302548 <td rowspan="2" valign="top" >i2c/ch7006_drv</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302549 <td valign="top" >Generic</td>
2550 <td valign="top" >“scale”</td>
2551 <td valign="top" >RANGE</td>
2552 <td valign="top" >Min=0, Max=2</td>
2553 <td valign="top" >Connector</td>
2554 <td valign="top" >TBD</td>
2555 </tr>
2556 <tr>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302557 <td rowspan="1" valign="top" >TV</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302558 <td valign="top" >“mode”</td>
2559 <td valign="top" >ENUM</td>
2560 <td valign="top" >{ "PAL", "PAL-M","PAL-N"}, ”PAL-Nc"
2561 , "PAL-60", "NTSC-M", "NTSC-J" }</td>
2562 <td valign="top" >Connector</td>
2563 <td valign="top" >TBD</td>
2564 </tr>
2565 <tr>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302566 <td rowspan="15" valign="top" >nouveau</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302567 <td rowspan="6" valign="top" >NV10 Overlay</td>
2568 <td valign="top" >"colorkey"</td>
2569 <td valign="top" >RANGE</td>
2570 <td valign="top" >Min=0, Max=0x01ffffff</td>
2571 <td valign="top" >Plane</td>
2572 <td valign="top" >TBD</td>
2573 </tr>
2574 <tr>
2575 <td valign="top" >“contrast”</td>
2576 <td valign="top" >RANGE</td>
2577 <td valign="top" >Min=0, Max=8192-1</td>
2578 <td valign="top" >Plane</td>
2579 <td valign="top" >TBD</td>
2580 </tr>
2581 <tr>
2582 <td valign="top" >“brightness”</td>
2583 <td valign="top" >RANGE</td>
2584 <td valign="top" >Min=0, Max=1024</td>
2585 <td valign="top" >Plane</td>
2586 <td valign="top" >TBD</td>
2587 </tr>
2588 <tr>
2589 <td valign="top" >“hue”</td>
2590 <td valign="top" >RANGE</td>
2591 <td valign="top" >Min=0, Max=359</td>
2592 <td valign="top" >Plane</td>
2593 <td valign="top" >TBD</td>
2594 </tr>
2595 <tr>
2596 <td valign="top" >“saturation”</td>
2597 <td valign="top" >RANGE</td>
2598 <td valign="top" >Min=0, Max=8192-1</td>
2599 <td valign="top" >Plane</td>
2600 <td valign="top" >TBD</td>
2601 </tr>
2602 <tr>
2603 <td valign="top" >“iturbt_709”</td>
2604 <td valign="top" >RANGE</td>
2605 <td valign="top" >Min=0, Max=1</td>
2606 <td valign="top" >Plane</td>
2607 <td valign="top" >TBD</td>
2608 </tr>
2609 <tr>
2610 <td rowspan="2" valign="top" >Nv04 Overlay</td>
2611 <td valign="top" >“colorkey”</td>
2612 <td valign="top" >RANGE</td>
2613 <td valign="top" >Min=0, Max=0x01ffffff</td>
2614 <td valign="top" >Plane</td>
2615 <td valign="top" >TBD</td>
2616 </tr>
2617 <tr>
2618 <td valign="top" >“brightness”</td>
2619 <td valign="top" >RANGE</td>
2620 <td valign="top" >Min=0, Max=1024</td>
2621 <td valign="top" >Plane</td>
2622 <td valign="top" >TBD</td>
2623 </tr>
2624 <tr>
2625 <td rowspan="7" valign="top" >Display</td>
2626 <td valign="top" >“dithering mode”</td>
2627 <td valign="top" >ENUM</td>
2628 <td valign="top" >{ "auto", "off", "on" }</td>
2629 <td valign="top" >Connector</td>
2630 <td valign="top" >TBD</td>
2631 </tr>
2632 <tr>
2633 <td valign="top" >“dithering depth”</td>
2634 <td valign="top" >ENUM</td>
2635 <td valign="top" >{ "auto", "off", "on", "static 2x2", "dynamic 2x2", "temporal" }</td>
2636 <td valign="top" >Connector</td>
2637 <td valign="top" >TBD</td>
2638 </tr>
2639 <tr>
2640 <td valign="top" >“underscan”</td>
2641 <td valign="top" >ENUM</td>
2642 <td valign="top" >{ "auto", "6 bpc", "8 bpc" }</td>
2643 <td valign="top" >Connector</td>
2644 <td valign="top" >TBD</td>
2645 </tr>
2646 <tr>
2647 <td valign="top" >“underscan hborder”</td>
2648 <td valign="top" >RANGE</td>
2649 <td valign="top" >Min=0, Max=128</td>
2650 <td valign="top" >Connector</td>
2651 <td valign="top" >TBD</td>
2652 </tr>
2653 <tr>
2654 <td valign="top" >“underscan vborder”</td>
2655 <td valign="top" >RANGE</td>
2656 <td valign="top" >Min=0, Max=128</td>
2657 <td valign="top" >Connector</td>
2658 <td valign="top" >TBD</td>
2659 </tr>
2660 <tr>
2661 <td valign="top" >“vibrant hue”</td>
2662 <td valign="top" >RANGE</td>
2663 <td valign="top" >Min=0, Max=180</td>
2664 <td valign="top" >Connector</td>
2665 <td valign="top" >TBD</td>
2666 </tr>
2667 <tr>
2668 <td valign="top" >“color vibrance”</td>
2669 <td valign="top" >RANGE</td>
2670 <td valign="top" >Min=0, Max=200</td>
2671 <td valign="top" >Connector</td>
2672 <td valign="top" >TBD</td>
2673 </tr>
2674 <tr>
Graham Whaleyd4acc162015-07-07 19:13:37 +01002675 <td valign="top" >omap</td>
Sonika Jindal712a0dd2015-05-28 16:35:07 +05302676 <td valign="top" >Generic</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302677 <td valign="top" >“zorder”</td>
2678 <td valign="top" >RANGE</td>
2679 <td valign="top" >Min=0, Max=3</td>
2680 <td valign="top" >CRTC, Plane</td>
2681 <td valign="top" >TBD</td>
2682 </tr>
2683 <tr>
2684 <td valign="top" >qxl</td>
2685 <td valign="top" >Generic</td>
2686 <td valign="top" >“hotplug_mode_update"</td>
2687 <td valign="top" >RANGE</td>
2688 <td valign="top" >Min=0, Max=1</td>
2689 <td valign="top" >Connector</td>
2690 <td valign="top" >TBD</td>
2691 </tr>
2692 <tr>
Sagar Kamble4ba08fa2014-07-08 10:32:02 +05302693 <td rowspan="9" valign="top" >radeon</td>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302694 <td valign="top" >DVI-I</td>
2695 <td valign="top" >“coherent”</td>
2696 <td valign="top" >RANGE</td>
2697 <td valign="top" >Min=0, Max=1</td>
2698 <td valign="top" >Connector</td>
2699 <td valign="top" >TBD</td>
2700 </tr>
2701 <tr>
2702 <td valign="top" >DAC enable load detect</td>
2703 <td valign="top" >“load detection”</td>
2704 <td valign="top" >RANGE</td>
2705 <td valign="top" >Min=0, Max=1</td>
2706 <td valign="top" >Connector</td>
2707 <td valign="top" >TBD</td>
2708 </tr>
2709 <tr>
2710 <td valign="top" >TV Standard</td>
2711 <td valign="top" >"tv standard"</td>
2712 <td valign="top" >ENUM</td>
2713 <td valign="top" >{ "ntsc", "pal", "pal-m", "pal-60", "ntsc-j"
2714 , "scart-pal", "pal-cn", "secam" }</td>
2715 <td valign="top" >Connector</td>
2716 <td valign="top" >TBD</td>
2717 </tr>
2718 <tr>
2719 <td valign="top" >legacy TMDS PLL detect</td>
2720 <td valign="top" >"tmds_pll"</td>
2721 <td valign="top" >ENUM</td>
2722 <td valign="top" >{ "driver", "bios" }</td>
2723 <td valign="top" >-</td>
2724 <td valign="top" >TBD</td>
2725 </tr>
2726 <tr>
2727 <td rowspan="3" valign="top" >Underscan</td>
2728 <td valign="top" >"underscan"</td>
2729 <td valign="top" >ENUM</td>
2730 <td valign="top" >{ "off", "on", "auto" }</td>
2731 <td valign="top" >Connector</td>
2732 <td valign="top" >TBD</td>
2733 </tr>
2734 <tr>
2735 <td valign="top" >"underscan hborder"</td>
2736 <td valign="top" >RANGE</td>
2737 <td valign="top" >Min=0, Max=128</td>
2738 <td valign="top" >Connector</td>
2739 <td valign="top" >TBD</td>
2740 </tr>
2741 <tr>
2742 <td valign="top" >"underscan vborder"</td>
2743 <td valign="top" >RANGE</td>
2744 <td valign="top" >Min=0, Max=128</td>
2745 <td valign="top" >Connector</td>
2746 <td valign="top" >TBD</td>
2747 </tr>
2748 <tr>
2749 <td valign="top" >Audio</td>
2750 <td valign="top" >“audio”</td>
2751 <td valign="top" >ENUM</td>
2752 <td valign="top" >{ "off", "on", "auto" }</td>
2753 <td valign="top" >Connector</td>
2754 <td valign="top" >TBD</td>
2755 </tr>
2756 <tr>
2757 <td valign="top" >FMT Dithering</td>
2758 <td valign="top" >“dither”</td>
2759 <td valign="top" >ENUM</td>
2760 <td valign="top" >{ "off", "on" }</td>
2761 <td valign="top" >Connector</td>
2762 <td valign="top" >TBD</td>
2763 </tr>
2764 <tr>
Sagar Kamble6c6a3992014-03-11 19:55:29 +05302765 <td rowspan="3" valign="top" >rcar-du</td>
2766 <td rowspan="3" valign="top" >Generic</td>
2767 <td valign="top" >"alpha"</td>
2768 <td valign="top" >RANGE</td>
2769 <td valign="top" >Min=0, Max=255</td>
2770 <td valign="top" >Plane</td>
2771 <td valign="top" >TBD</td>
2772 </tr>
2773 <tr>
2774 <td valign="top" >"colorkey"</td>
2775 <td valign="top" >RANGE</td>
2776 <td valign="top" >Min=0, Max=0x01ffffff</td>
2777 <td valign="top" >Plane</td>
2778 <td valign="top" >TBD</td>
2779 </tr>
2780 <tr>
2781 <td valign="top" >"zpos"</td>
2782 <td valign="top" >RANGE</td>
2783 <td valign="top" >Min=1, Max=7</td>
2784 <td valign="top" >Plane</td>
2785 <td valign="top" >TBD</td>
2786 </tr>
2787 </tbody>
2788 </table>
2789 </sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002790 </sect1>
2791
2792 <!-- Internals: vertical blanking -->
2793
2794 <sect1 id="drm-vertical-blank">
2795 <title>Vertical Blanking</title>
2796 <para>
2797 Vertical blanking plays a major role in graphics rendering. To achieve
2798 tear-free display, users must synchronize page flips and/or rendering to
2799 vertical blanking. The DRM API offers ioctls to perform page flips
2800 synchronized to vertical blanking and wait for vertical blanking.
2801 </para>
2802 <para>
2803 The DRM core handles most of the vertical blanking management logic, which
2804 involves filtering out spurious interrupts, keeping race-free blanking
2805 counters, coping with counter wrap-around and resets and keeping use
2806 counts. It relies on the driver to generate vertical blanking interrupts
2807 and optionally provide a hardware vertical blanking counter. Drivers must
2808 implement the following operations.
2809 </para>
2810 <itemizedlist>
2811 <listitem>
2812 <synopsis>int (*enable_vblank) (struct drm_device *dev, int crtc);
2813void (*disable_vblank) (struct drm_device *dev, int crtc);</synopsis>
2814 <para>
2815 Enable or disable vertical blanking interrupts for the given CRTC.
2816 </para>
2817 </listitem>
2818 <listitem>
2819 <synopsis>u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);</synopsis>
2820 <para>
2821 Retrieve the value of the vertical blanking counter for the given
2822 CRTC. If the hardware maintains a vertical blanking counter its value
2823 should be returned. Otherwise drivers can use the
2824 <function>drm_vblank_count</function> helper function to handle this
2825 operation.
2826 </para>
2827 </listitem>
2828 </itemizedlist>
2829 <para>
2830 Drivers must initialize the vertical blanking handling core with a call to
2831 <function>drm_vblank_init</function> in their
Daniel Vetter14fe29e2016-05-24 14:45:15 +02002832 <methodname>load</methodname> operation.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002833 </para>
2834 <para>
2835 Vertical blanking interrupts can be enabled by the DRM core or by drivers
2836 themselves (for instance to handle page flipping operations). The DRM core
2837 maintains a vertical blanking use count to ensure that the interrupts are
2838 not disabled while a user still needs them. To increment the use count,
2839 drivers call <function>drm_vblank_get</function>. Upon return vertical
2840 blanking interrupts are guaranteed to be enabled.
2841 </para>
2842 <para>
2843 To decrement the use count drivers call
2844 <function>drm_vblank_put</function>. Only when the use count drops to zero
2845 will the DRM core disable the vertical blanking interrupts after a delay
2846 by scheduling a timer. The delay is accessible through the vblankoffdelay
2847 module parameter or the <varname>drm_vblank_offdelay</varname> global
2848 variable and expressed in milliseconds. Its default value is 5000 ms.
Ville Syrjälä4ed0ce32014-08-06 14:49:53 +03002849 Zero means never disable, and a negative value means disable immediately.
Ville Syrjälä00185e62014-08-06 14:49:54 +03002850 Drivers may override the behaviour by setting the
2851 <structname>drm_device</structname>
2852 <structfield>vblank_disable_immediate</structfield> flag, which when set
2853 causes vblank interrupts to be disabled immediately regardless of the
2854 drm_vblank_offdelay value. The flag should only be set if there's a
2855 properly working hardware vblank counter present.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002856 </para>
2857 <para>
2858 When a vertical blanking interrupt occurs drivers only need to call the
2859 <function>drm_handle_vblank</function> function to account for the
2860 interrupt.
2861 </para>
2862 <para>
2863 Resources allocated by <function>drm_vblank_init</function> must be freed
2864 with a call to <function>drm_vblank_cleanup</function> in the driver
2865 <methodname>unload</methodname> operation handler.
2866 </para>
Daniel Vetterf5752b32014-05-08 16:41:51 +02002867 <sect2>
2868 <title>Vertical Blanking and Interrupt Handling Functions Reference</title>
2869!Edrivers/gpu/drm/drm_irq.c
Daniel Vetterd743ecf2014-09-23 15:46:54 +02002870!Finclude/drm/drmP.h drm_crtc_vblank_waitqueue
Daniel Vetterf5752b32014-05-08 16:41:51 +02002871 </sect2>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002872 </sect1>
2873
2874 <!-- Internals: open/close, file operations and ioctls -->
2875
2876 <sect1>
2877 <title>Open/Close, File Operations and IOCTLs</title>
2878 <sect2>
2879 <title>Open and Close</title>
2880 <synopsis>int (*firstopen) (struct drm_device *);
2881void (*lastclose) (struct drm_device *);
2882int (*open) (struct drm_device *, struct drm_file *);
2883void (*preclose) (struct drm_device *, struct drm_file *);
2884void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
2885 <abstract>Open and close handlers. None of those methods are mandatory.
2886 </abstract>
2887 <para>
2888 The <methodname>firstopen</methodname> method is called by the DRM core
Daniel Vetter7d14bb6b2013-08-08 15:41:15 +02002889 for legacy UMS (User Mode Setting) drivers only when an application
2890 opens a device that has no other opened file handle. UMS drivers can
2891 implement it to acquire device resources. KMS drivers can't use the
2892 method and must acquire resources in the <methodname>load</methodname>
2893 method instead.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002894 </para>
2895 <para>
Daniel Vetter7d14bb6b2013-08-08 15:41:15 +02002896 Similarly the <methodname>lastclose</methodname> method is called when
2897 the last application holding a file handle opened on the device closes
2898 it, for both UMS and KMS drivers. Additionally, the method is also
2899 called at module unload time or, for hot-pluggable devices, when the
2900 device is unplugged. The <methodname>firstopen</methodname> and
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002901 <methodname>lastclose</methodname> calls can thus be unbalanced.
2902 </para>
2903 <para>
2904 The <methodname>open</methodname> method is called every time the device
2905 is opened by an application. Drivers can allocate per-file private data
2906 in this method and store them in the struct
2907 <structname>drm_file</structname> <structfield>driver_priv</structfield>
2908 field. Note that the <methodname>open</methodname> method is called
2909 before <methodname>firstopen</methodname>.
2910 </para>
2911 <para>
2912 The close operation is split into <methodname>preclose</methodname> and
2913 <methodname>postclose</methodname> methods. Drivers must stop and
2914 cleanup all per-file operations in the <methodname>preclose</methodname>
2915 method. For instance pending vertical blanking and page flip events must
2916 be cancelled. No per-file operation is allowed on the file handle after
2917 returning from the <methodname>preclose</methodname> method.
2918 </para>
2919 <para>
2920 Finally the <methodname>postclose</methodname> method is called as the
2921 last step of the close operation, right before calling the
2922 <methodname>lastclose</methodname> method if no other open file handle
2923 exists for the device. Drivers that have allocated per-file private data
2924 in the <methodname>open</methodname> method should free it here.
2925 </para>
2926 <para>
2927 The <methodname>lastclose</methodname> method should restore CRTC and
2928 plane properties to default value, so that a subsequent open of the
Daniel Vetter7d14bb6b2013-08-08 15:41:15 +02002929 device will not inherit state from the previous user. It can also be
2930 used to execute delayed power switching state changes, e.g. in
Lukas Wunner6648f482015-10-11 11:55:00 +02002931 conjunction with the vga_switcheroo infrastructure (see
2932 <xref linkend="vga_switcheroo"/>). Beyond that KMS drivers should not
2933 do any further cleanup. Only legacy UMS drivers might need to clean up
2934 device state so that the vga console or an independent fbdev driver
2935 could take over.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002936 </para>
2937 </sect2>
2938 <sect2>
2939 <title>File Operations</title>
Daniel Vetterbcb877e2016-01-11 22:40:55 +01002940!Pdrivers/gpu/drm/drm_fops.c file operations
2941!Edrivers/gpu/drm/drm_fops.c
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002942 </sect2>
2943 <sect2>
2944 <title>IOCTLs</title>
2945 <synopsis>struct drm_ioctl_desc *ioctls;
2946int num_ioctls;</synopsis>
2947 <abstract>Driver-specific ioctls descriptors table.</abstract>
2948 <para>
2949 Driver-specific ioctls numbers start at DRM_COMMAND_BASE. The ioctls
2950 descriptors table is indexed by the ioctl number offset from the base
2951 value. Drivers can use the DRM_IOCTL_DEF_DRV() macro to initialize the
2952 table entries.
2953 </para>
2954 <para>
2955 <programlisting>DRM_IOCTL_DEF_DRV(ioctl, func, flags)</programlisting>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002956 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002957 <parameter>ioctl</parameter> is the ioctl name. Drivers must define
2958 the DRM_##ioctl and DRM_IOCTL_##ioctl macros to the ioctl number
2959 offset from DRM_COMMAND_BASE and the ioctl number respectively. The
2960 first macro is private to the device while the second must be exposed
2961 to userspace in a public header.
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002962 </para>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002963 <para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002964 <parameter>func</parameter> is a pointer to the ioctl handler function
2965 compatible with the <type>drm_ioctl_t</type> type.
2966 <programlisting>typedef int drm_ioctl_t(struct drm_device *dev, void *data,
2967 struct drm_file *file_priv);</programlisting>
2968 </para>
2969 <para>
2970 <parameter>flags</parameter> is a bitmask combination of the following
2971 values. It restricts how the ioctl is allowed to be called.
Michael Witten65ffef52011-08-25 20:55:58 +00002972 <itemizedlist>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002973 <listitem><para>
2974 DRM_AUTH - Only authenticated callers allowed
2975 </para></listitem>
2976 <listitem><para>
2977 DRM_MASTER - The ioctl can only be called on the master file
2978 handle
2979 </para></listitem>
2980 <listitem><para>
2981 DRM_ROOT_ONLY - Only callers with the SYSADMIN capability allowed
2982 </para></listitem>
2983 <listitem><para>
2984 DRM_CONTROL_ALLOW - The ioctl can only be called on a control
2985 device
2986 </para></listitem>
2987 <listitem><para>
2988 DRM_UNLOCKED - The ioctl handler will be called without locking
Daniel Vetterea487832015-09-28 21:42:40 +02002989 the DRM global mutex. This is the enforced default for kms drivers
2990 (i.e. using the DRIVER_MODESET flag) and hence shouldn't be used
2991 any more for new drivers.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02002992 </para></listitem>
Michael Witten65ffef52011-08-25 20:55:58 +00002993 </itemizedlist>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002994 </para>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002995 </para>
Daniel Vetter0aaf20c2015-09-08 13:56:27 +02002996!Edrivers/gpu/drm/drm_ioctl.c
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002997 </sect2>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002998 </sect1>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07002999 <sect1>
Daniel Vetter4c6e2df2014-01-22 16:46:44 +01003000 <title>Legacy Support Code</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003001 <para>
Masanari Iida9a6594f2014-05-15 13:54:06 -07003002 The section very briefly covers some of the old legacy support code which
Daniel Vetter4c6e2df2014-01-22 16:46:44 +01003003 is only used by old DRM drivers which have done a so-called shadow-attach
3004 to the underlying device instead of registering as a real driver. This
Masanari Iida9a6594f2014-05-15 13:54:06 -07003005 also includes some of the old generic buffer management and command
Daniel Vetter4c6e2df2014-01-22 16:46:44 +01003006 submission code. Do not use any of this in new and modern drivers.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02003007 </para>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003008
Daniel Vetter4c6e2df2014-01-22 16:46:44 +01003009 <sect2>
3010 <title>Legacy Suspend/Resume</title>
3011 <para>
3012 The DRM core provides some suspend/resume code, but drivers wanting full
3013 suspend/resume support should provide save() and restore() functions.
3014 These are called at suspend, hibernate, or resume time, and should perform
3015 any state save or restore required by your device across suspend or
3016 hibernate states.
3017 </para>
3018 <synopsis>int (*suspend) (struct drm_device *, pm_message_t state);
3019 int (*resume) (struct drm_device *);</synopsis>
3020 <para>
3021 Those are legacy suspend and resume methods which
3022 <emphasis>only</emphasis> work with the legacy shadow-attach driver
3023 registration functions. New driver should use the power management
3024 interface provided by their bus type (usually through
3025 the struct <structname>device_driver</structname> dev_pm_ops) and set
3026 these methods to NULL.
3027 </para>
3028 </sect2>
3029
3030 <sect2>
3031 <title>Legacy DMA Services</title>
3032 <para>
3033 This should cover how DMA mapping etc. is supported by the core.
3034 These functions are deprecated and should not be used.
3035 </para>
3036 </sect2>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003037 </sect1>
3038 </chapter>
3039
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02003040<!-- TODO
3041
3042- Add a glossary
3043- Document the struct_mutex catch-all lock
3044- Document connector properties
3045
3046- Why is the load method optional?
3047- What are drivers supposed to set the initial display state to, and how?
3048 Connector's DPMS states are not initialized and are thus equal to
3049 DRM_MODE_DPMS_ON. The fbcon compatibility layer calls
3050 drm_helper_disable_unused_functions(), which disables unused encoders and
3051 CRTCs, but doesn't touch the connectors' DPMS state, and
3052 drm_helper_connector_dpms() in reaction to fbdev blanking events. Do drivers
3053 that don't implement (or just don't use) fbcon compatibility need to call
3054 those functions themselves?
3055- KMS drivers must call drm_vblank_pre_modeset() and drm_vblank_post_modeset()
3056 around mode setting. Should this be done in the DRM core?
3057- vblank_disable_allowed is set to 1 in the first drm_vblank_post_modeset()
3058 call and never set back to 0. It seems to be safe to permanently set it to 1
3059 in drm_vblank_init() for KMS driver, and it might be safe for UMS drivers as
3060 well. This should be investigated.
3061- crtc and connector .save and .restore operations are only used internally in
3062 drivers, should they be removed from the core?
3063- encoder mid-layer .save and .restore operations are only used internally in
3064 drivers, should they be removed from the core?
3065- encoder mid-layer .detect operation is only used internally in drivers,
3066 should it be removed from the core?
3067-->
3068
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003069 <!-- External interfaces -->
3070
3071 <chapter id="drmExternals">
3072 <title>Userland interfaces</title>
3073 <para>
3074 The DRM core exports several interfaces to applications,
3075 generally intended to be used through corresponding libdrm
Michael Wittena5294e02011-08-29 18:05:52 +00003076 wrapper functions. In addition, drivers export device-specific
Michael Witten7f0925a2011-08-29 18:07:13 +00003077 interfaces for use by userspace drivers &amp; device-aware
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003078 applications through ioctls and sysfs files.
3079 </para>
3080 <para>
3081 External interfaces include: memory mapping, context management,
3082 DMA operations, AGP management, vblank control, fence
3083 management, memory management, and output management.
3084 </para>
3085 <para>
Michael Wittenbcd3cfc2011-08-29 19:29:16 +00003086 Cover generic ioctls and sysfs layout here. We only need high-level
3087 info, since man pages should cover the rest.
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003088 </para>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02003089
David Herrmann17931262013-08-25 18:29:00 +02003090 <!-- External: render nodes -->
3091
3092 <sect1>
3093 <title>Render nodes</title>
3094 <para>
3095 DRM core provides multiple character-devices for user-space to use.
3096 Depending on which device is opened, user-space can perform a different
3097 set of operations (mainly ioctls). The primary node is always created
Daniel Vetter00153ae2014-01-21 12:51:43 +01003098 and called card&lt;num&gt;. Additionally, a currently
3099 unused control node, called controlD&lt;num&gt; is also
David Herrmann17931262013-08-25 18:29:00 +02003100 created. The primary node provides all legacy operations and
3101 historically was the only interface used by userspace. With KMS, the
3102 control node was introduced. However, the planned KMS control interface
3103 has never been written and so the control node stays unused to date.
3104 </para>
3105 <para>
3106 With the increased use of offscreen renderers and GPGPU applications,
3107 clients no longer require running compositors or graphics servers to
3108 make use of a GPU. But the DRM API required unprivileged clients to
3109 authenticate to a DRM-Master prior to getting GPU access. To avoid this
3110 step and to grant clients GPU access without authenticating, render
3111 nodes were introduced. Render nodes solely serve render clients, that
3112 is, no modesetting or privileged ioctls can be issued on render nodes.
3113 Only non-global rendering commands are allowed. If a driver supports
Daniel Vetter00153ae2014-01-21 12:51:43 +01003114 render nodes, it must advertise it via the DRIVER_RENDER
David Herrmann17931262013-08-25 18:29:00 +02003115 DRM driver capability. If not supported, the primary node must be used
3116 for render clients together with the legacy drmAuth authentication
3117 procedure.
3118 </para>
3119 <para>
3120 If a driver advertises render node support, DRM core will create a
Daniel Vetter00153ae2014-01-21 12:51:43 +01003121 separate render node called renderD&lt;num&gt;. There will
David Herrmann17931262013-08-25 18:29:00 +02003122 be one render node per device. No ioctls except PRIME-related ioctls
Daniel Vetter00153ae2014-01-21 12:51:43 +01003123 will be allowed on this node. Especially GEM_OPEN will be
David Herrmann17931262013-08-25 18:29:00 +02003124 explicitly prohibited. Render nodes are designed to avoid the
3125 buffer-leaks, which occur if clients guess the flink names or mmap
3126 offsets on the legacy interface. Additionally to this basic interface,
3127 drivers must mark their driver-dependent render-only ioctls as
Daniel Vetter00153ae2014-01-21 12:51:43 +01003128 DRM_RENDER_ALLOW so render clients can use them. Driver
David Herrmann17931262013-08-25 18:29:00 +02003129 authors must be careful not to allow any privileged ioctls on render
3130 nodes.
3131 </para>
3132 <para>
3133 With render nodes, user-space can now control access to the render node
3134 via basic file-system access-modes. A running graphics server which
3135 authenticates clients on the privileged primary/legacy node is no longer
3136 required. Instead, a client can open the render node and is immediately
3137 granted GPU access. Communication between clients (or servers) is done
3138 via PRIME. FLINK from render node to legacy node is not supported. New
3139 clients must not use the insecure FLINK interface.
3140 </para>
3141 <para>
3142 Besides dropping all modeset/global ioctls, render nodes also drop the
3143 DRM-Master concept. There is no reason to associate render clients with
3144 a DRM-Master as they are independent of any graphics server. Besides,
3145 they must work without any running master, anyway.
3146 Drivers must be able to run without a master object if they support
3147 render nodes. If, on the other hand, a driver requires shared state
3148 between clients which is visible to user-space and accessible beyond
3149 open-file boundaries, they cannot support render nodes.
3150 </para>
3151 </sect1>
3152
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02003153 <!-- External: vblank handling -->
3154
3155 <sect1>
3156 <title>VBlank event handling</title>
3157 <para>
3158 The DRM core exposes two vertical blank related ioctls:
3159 <variablelist>
3160 <varlistentry>
3161 <term>DRM_IOCTL_WAIT_VBLANK</term>
3162 <listitem>
3163 <para>
3164 This takes a struct drm_wait_vblank structure as its argument,
3165 and it is used to block or request a signal when a specified
3166 vblank event occurs.
3167 </para>
3168 </listitem>
3169 </varlistentry>
3170 <varlistentry>
3171 <term>DRM_IOCTL_MODESET_CTL</term>
3172 <listitem>
3173 <para>
Daniel Vetter8edffbb2014-05-08 15:39:19 +02003174 This was only used for user-mode-settind drivers around
3175 modesetting changes to allow the kernel to update the vblank
3176 interrupt after mode setting, since on many devices the vertical
3177 blank counter is reset to 0 at some point during modeset. Modern
3178 drivers should not call this any more since with kernel mode
3179 setting it is a no-op.
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02003180 </para>
3181 </listitem>
3182 </varlistentry>
3183 </variablelist>
Laurent Pinchart9cad9c92012-07-13 00:57:26 +02003184 </para>
3185 </sect1>
3186
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003187 </chapter>
Daniel Vetter3519f702014-01-22 12:21:16 +01003188</part>
3189<part id="drmDrivers">
3190 <title>DRM Drivers</title>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003191
Daniel Vetter3519f702014-01-22 12:21:16 +01003192 <partintro>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003193 <para>
Lukas Wunner7f817072015-10-11 11:26:26 +02003194 This second part of the GPU Driver Developer's Guide documents driver
3195 code, implementation details and also all the driver-specific userspace
Daniel Vetter3519f702014-01-22 12:21:16 +01003196 interfaces. Especially since all hardware-acceleration interfaces to
3197 userspace are driver specific for efficiency and other reasons these
3198 interfaces can be rather substantial. Hence every driver has its own
3199 chapter.
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003200 </para>
Daniel Vetter3519f702014-01-22 12:21:16 +01003201 </partintro>
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003202
Daniel Vetter3519f702014-01-22 12:21:16 +01003203 <chapter id="drmI915">
3204 <title>drm/i915 Intel GFX Driver</title>
3205 <para>
3206 The drm/i915 driver supports all (with the exception of some very early
3207 models) integrated GFX chipsets with both Intel display and rendering
3208 blocks. This excludes a set of SoC platforms with an SGX rendering unit,
3209 those have basic support through the gma500 drm driver.
3210 </para>
3211 <sect1>
Daniel Vettere4e76842014-09-30 10:56:42 +02003212 <title>Core Driver Infrastructure</title>
3213 <para>
3214 This section covers core driver infrastructure used by both the display
3215 and the GEM parts of the driver.
3216 </para>
3217 <sect2>
3218 <title>Runtime Power Management</title>
3219!Pdrivers/gpu/drm/i915/intel_runtime_pm.c runtime pm
3220!Idrivers/gpu/drm/i915/intel_runtime_pm.c
Mika Kuoppala397f6fa2015-01-28 17:47:58 +02003221!Idrivers/gpu/drm/i915/intel_uncore.c
Daniel Vettere4e76842014-09-30 10:56:42 +02003222 </sect2>
Daniel Vetterfca52a52014-09-30 10:56:45 +02003223 <sect2>
3224 <title>Interrupt Handling</title>
3225!Pdrivers/gpu/drm/i915/i915_irq.c interrupt handling
3226!Fdrivers/gpu/drm/i915/i915_irq.c intel_irq_init intel_irq_init_hw intel_hpd_init
Daniel Vetterfca52a52014-09-30 10:56:45 +02003227!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_disable_interrupts
3228!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_enable_interrupts
3229 </sect2>
Yu Zhangcf9d2892015-02-10 19:05:47 +08003230 <sect2>
3231 <title>Intel GVT-g Guest Support(vGPU)</title>
3232!Pdrivers/gpu/drm/i915/i915_vgpu.c Intel GVT-g guest support
3233!Idrivers/gpu/drm/i915/i915_vgpu.c
3234 </sect2>
Daniel Vettere4e76842014-09-30 10:56:42 +02003235 </sect1>
3236 <sect1>
Daniel Vetter3519f702014-01-22 12:21:16 +01003237 <title>Display Hardware Handling</title>
3238 <para>
3239 This section covers everything related to the display hardware including
3240 the mode setting infrastructure, plane, sprite and cursor handling and
3241 display, output probing and related topics.
3242 </para>
3243 <sect2>
3244 <title>Mode Setting Infrastructure</title>
3245 <para>
3246 The i915 driver is thus far the only DRM driver which doesn't use the
3247 common DRM helper code to implement mode setting sequences. Thus it
3248 has its own tailor-made infrastructure for executing a display
3249 configuration change.
3250 </para>
3251 </sect2>
3252 <sect2>
Daniel Vetterb680c372014-09-19 18:27:27 +02003253 <title>Frontbuffer Tracking</title>
3254!Pdrivers/gpu/drm/i915/intel_frontbuffer.c frontbuffer tracking
3255!Idrivers/gpu/drm/i915/intel_frontbuffer.c
Daniel Vetterb680c372014-09-19 18:27:27 +02003256!Fdrivers/gpu/drm/i915/i915_gem.c i915_gem_track_fb
3257 </sect2>
3258 <sect2>
Daniel Vetteref073882014-09-30 10:56:50 +02003259 <title>Display FIFO Underrun Reporting</title>
3260!Pdrivers/gpu/drm/i915/intel_fifo_underrun.c fifo underrun handling
3261!Idrivers/gpu/drm/i915/intel_fifo_underrun.c
3262 </sect2>
3263 <sect2>
Daniel Vetter3519f702014-01-22 12:21:16 +01003264 <title>Plane Configuration</title>
3265 <para>
3266 This section covers plane configuration and composition with the
3267 primary plane, sprites, cursors and overlays. This includes the
3268 infrastructure to do atomic vsync'ed updates of all this state and
3269 also tightly coupled topics like watermark setup and computation,
3270 framebuffer compression and panel self refresh.
3271 </para>
3272 </sect2>
3273 <sect2>
Matt Roperea2c67b2014-12-23 10:41:52 -08003274 <title>Atomic Plane Helpers</title>
3275!Pdrivers/gpu/drm/i915/intel_atomic_plane.c atomic plane helpers
3276!Idrivers/gpu/drm/i915/intel_atomic_plane.c
3277 </sect2>
3278 <sect2>
Daniel Vetter3519f702014-01-22 12:21:16 +01003279 <title>Output Probing</title>
3280 <para>
3281 This section covers output probing and related infrastructure like the
3282 hotplug interrupt storm detection and mitigation code. Note that the
3283 i915 driver still uses most of the common DRM helper code for output
3284 probing, so those sections fully apply.
3285 </para>
3286 </sect2>
Ville Syrjälä0e767182014-04-25 20:14:31 +03003287 <sect2>
Jani Nikula856974a2015-07-02 16:05:28 +03003288 <title>Hotplug</title>
3289!Pdrivers/gpu/drm/i915/intel_hotplug.c Hotplug
3290!Idrivers/gpu/drm/i915/intel_hotplug.c
3291 </sect2>
3292 <sect2>
Jani Nikula28855d22014-10-27 16:27:00 +02003293 <title>High Definition Audio</title>
3294!Pdrivers/gpu/drm/i915/intel_audio.c High Definition Audio over HDMI and Display Port
3295!Idrivers/gpu/drm/i915/intel_audio.c
Libin Yangcb422612015-10-01 17:01:09 +08003296!Iinclude/drm/i915_component.h
Jani Nikula28855d22014-10-27 16:27:00 +02003297 </sect2>
3298 <sect2>
Rodrigo Vivib2b89f52014-11-14 08:52:29 -08003299 <title>Panel Self Refresh PSR (PSR/SRD)</title>
3300!Pdrivers/gpu/drm/i915/intel_psr.c Panel Self Refresh (PSR/SRD)
3301!Idrivers/gpu/drm/i915/intel_psr.c
3302 </sect2>
3303 <sect2>
Rodrigo Vivi94b839572014-12-08 06:46:31 -08003304 <title>Frame Buffer Compression (FBC)</title>
3305!Pdrivers/gpu/drm/i915/intel_fbc.c Frame Buffer Compression (FBC)
3306!Idrivers/gpu/drm/i915/intel_fbc.c
3307 </sect2>
3308 <sect2>
Vandana Kannanb33a2812015-02-13 15:33:03 +05303309 <title>Display Refresh Rate Switching (DRRS)</title>
3310!Pdrivers/gpu/drm/i915/intel_dp.c Display Refresh Rate Switching (DRRS)
3311!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_set_drrs_state
3312!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_enable
3313!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_disable
3314!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_invalidate
3315!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_flush
3316!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_drrs_init
3317
3318 </sect2>
3319 <sect2>
Ville Syrjälä0e767182014-04-25 20:14:31 +03003320 <title>DPIO</title>
3321!Pdrivers/gpu/drm/i915/i915_reg.h DPIO
3322 </sect2>
Animesh Mannaaa9145c2015-05-13 22:13:29 +05303323
3324 <sect2>
3325 <title>CSR firmware support for DMC</title>
3326!Pdrivers/gpu/drm/i915/intel_csr.c csr support for dmc
3327!Idrivers/gpu/drm/i915/intel_csr.c
3328 </sect2>
Jani Nikuladd979502015-12-21 15:10:52 +02003329 <sect2>
3330 <title>Video BIOS Table (VBT)</title>
3331!Pdrivers/gpu/drm/i915/intel_bios.c Video BIOS Table (VBT)
3332!Idrivers/gpu/drm/i915/intel_bios.c
Jani Nikula72341af2016-03-16 12:43:35 +02003333!Idrivers/gpu/drm/i915/intel_vbt_defs.h
Jani Nikuladd979502015-12-21 15:10:52 +02003334 </sect2>
Daniel Vetter3519f702014-01-22 12:21:16 +01003335 </sect1>
3336
3337 <sect1>
3338 <title>Memory Management and Command Submission</title>
3339 <para>
3340 This sections covers all things related to the GEM implementation in the
3341 i915 driver.
3342 </para>
Daniel Vetter122b2502014-04-25 16:59:00 +02003343 <sect2>
3344 <title>Batchbuffer Parsing</title>
3345!Pdrivers/gpu/drm/i915/i915_cmd_parser.c batch buffer command parser
3346!Idrivers/gpu/drm/i915/i915_cmd_parser.c
3347 </sect2>
Oscar Mateo73e4d072014-07-24 17:04:48 +01003348 <sect2>
Brad Volkin493018d2014-12-11 12:13:08 -08003349 <title>Batchbuffer Pools</title>
3350!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
3351!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
3352 </sect2>
3353 <sect2>
Oscar Mateo73e4d072014-07-24 17:04:48 +01003354 <title>Logical Rings, Logical Ring Contexts and Execlists</title>
3355!Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and Execlists
3356!Idrivers/gpu/drm/i915/intel_lrc.c
3357 </sect2>
Tvrtko Ursulin45f8f692014-12-10 17:27:59 +00003358 <sect2>
3359 <title>Global GTT views</title>
3360!Pdrivers/gpu/drm/i915/i915_gem_gtt.c Global GTT views
3361!Idrivers/gpu/drm/i915/i915_gem_gtt.c
3362 </sect2>
Daniel Vetter7838a632015-01-05 14:36:59 +01003363 <sect2>
Daniel Vetter3271dca2015-07-24 17:40:15 +02003364 <title>GTT Fences and Swizzling</title>
Daniel Vettera794f622015-07-24 17:40:12 +02003365!Idrivers/gpu/drm/i915/i915_gem_fence.c
Daniel Vetter3271dca2015-07-24 17:40:15 +02003366 <sect3>
3367 <title>Global GTT Fence Handling</title>
3368!Pdrivers/gpu/drm/i915/i915_gem_fence.c fence register handling
3369 </sect3>
3370 <sect3>
3371 <title>Hardware Tiling and Swizzling Details</title>
3372!Pdrivers/gpu/drm/i915/i915_gem_fence.c tiling swizzling details
3373 </sect3>
3374 </sect2>
3375 <sect2>
3376 <title>Object Tiling IOCTLs</title>
3377!Idrivers/gpu/drm/i915/i915_gem_tiling.c
3378!Pdrivers/gpu/drm/i915/i915_gem_tiling.c buffer object tiling
Daniel Vettera794f622015-07-24 17:40:12 +02003379 </sect2>
3380 <sect2>
Daniel Vetter7838a632015-01-05 14:36:59 +01003381 <title>Buffer Object Eviction</title>
3382 <para>
Daniel Vettereb0b44a2015-03-18 14:47:59 +01003383 This section documents the interface functions for evicting buffer
Daniel Vetter7838a632015-01-05 14:36:59 +01003384 objects to make space available in the virtual gpu address spaces.
3385 Note that this is mostly orthogonal to shrinking buffer objects
3386 caches, which has the goal to make main memory (shared with the gpu
3387 through the unified memory architecture) available.
3388 </para>
3389!Idrivers/gpu/drm/i915/i915_gem_evict.c
3390 </sect2>
Daniel Vettereb0b44a2015-03-18 14:47:59 +01003391 <sect2>
3392 <title>Buffer Object Memory Shrinking</title>
3393 <para>
3394 This section documents the interface function for shrinking memory
3395 usage of buffer object caches. Shrinking is used to make main memory
3396 available. Note that this is mostly orthogonal to evicting buffer
3397 objects, which has the goal to make space in gpu virtual address
3398 spaces.
3399 </para>
3400!Idrivers/gpu/drm/i915/i915_gem_shrinker.c
3401 </sect2>
Daniel Vetter3519f702014-01-22 12:21:16 +01003402 </sect1>
Daniele Ceraolo Spurio198c9742014-11-10 13:44:31 +00003403 <sect1>
Daniel Vetter92907cb2015-11-23 09:04:05 +01003404 <title>GuC</title>
Alex Daid1675192015-08-12 15:43:43 +01003405 <sect2>
Daniel Vetter92907cb2015-11-23 09:04:05 +01003406 <title>GuC-specific firmware loader</title>
Alex Daid1675192015-08-12 15:43:43 +01003407!Pdrivers/gpu/drm/i915/intel_guc_loader.c GuC-specific firmware loader
3408!Idrivers/gpu/drm/i915/intel_guc_loader.c
3409 </sect2>
3410 <sect2>
Daniel Vetter92907cb2015-11-23 09:04:05 +01003411 <title>GuC-based command submission</title>
3412!Pdrivers/gpu/drm/i915/i915_guc_submission.c GuC-based command submission
Graham Whaleycff4f552015-08-24 14:41:21 +01003413!Idrivers/gpu/drm/i915/i915_guc_submission.c
Alex Daid1675192015-08-12 15:43:43 +01003414 </sect2>
Daniel Vetter92907cb2015-11-23 09:04:05 +01003415 <sect2>
3416 <title>GuC Firmware Layout</title>
3417!Pdrivers/gpu/drm/i915/intel_guc_fwif.h GuC Firmware Layout
3418 </sect2>
Alex Daid1675192015-08-12 15:43:43 +01003419 </sect1>
3420
3421 <sect1>
Daniele Ceraolo Spurio198c9742014-11-10 13:44:31 +00003422 <title> Tracing </title>
3423 <para>
3424 This sections covers all things related to the tracepoints implemented in
3425 the i915 driver.
3426 </para>
3427 <sect2>
3428 <title> i915_ppgtt_create and i915_ppgtt_release </title>
3429!Pdrivers/gpu/drm/i915/i915_trace.h i915_ppgtt_create and i915_ppgtt_release tracepoints
3430 </sect2>
3431 <sect2>
3432 <title> i915_context_create and i915_context_free </title>
3433!Pdrivers/gpu/drm/i915/i915_trace.h i915_context_create and i915_context_free tracepoints
3434 </sect2>
3435 <sect2>
3436 <title> switch_mm </title>
3437!Pdrivers/gpu/drm/i915/i915_trace.h switch_mm tracepoint
3438 </sect2>
3439 </sect1>
3440
Daniel Vetter3519f702014-01-22 12:21:16 +01003441 </chapter>
Daniel Vetterfca52a52014-09-30 10:56:45 +02003442!Cdrivers/gpu/drm/i915/i915_irq.c
Daniel Vetter3519f702014-01-22 12:21:16 +01003443</part>
Lukas Wunner6648f482015-10-11 11:55:00 +02003444
3445<part id="vga_switcheroo">
3446 <title>vga_switcheroo</title>
3447 <partintro>
3448!Pdrivers/gpu/vga/vga_switcheroo.c Overview
3449 </partintro>
3450
3451 <chapter id="modes_of_use">
3452 <title>Modes of Use</title>
Lukas Wunner3a848662016-01-02 18:47:17 +01003453 <sect1>
3454 <title>Manual switching and manual power control</title>
Lukas Wunner6648f482015-10-11 11:55:00 +02003455!Pdrivers/gpu/vga/vga_switcheroo.c Manual switching and manual power control
Lukas Wunner3a848662016-01-02 18:47:17 +01003456 </sect1>
3457 <sect1>
3458 <title>Driver power control</title>
Lukas Wunner6648f482015-10-11 11:55:00 +02003459!Pdrivers/gpu/vga/vga_switcheroo.c Driver power control
Lukas Wunner3a848662016-01-02 18:47:17 +01003460 </sect1>
Lukas Wunner6648f482015-10-11 11:55:00 +02003461 </chapter>
3462
Lukas Wunner3a848662016-01-02 18:47:17 +01003463 <chapter id="api">
3464 <title>API</title>
3465 <sect1>
3466 <title>Public functions</title>
Lukas Wunner6648f482015-10-11 11:55:00 +02003467!Edrivers/gpu/vga/vga_switcheroo.c
Lukas Wunner3a848662016-01-02 18:47:17 +01003468 </sect1>
3469 <sect1>
3470 <title>Public structures</title>
Lukas Wunner6648f482015-10-11 11:55:00 +02003471!Finclude/linux/vga_switcheroo.h vga_switcheroo_handler
3472!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_ops
Lukas Wunner3a848662016-01-02 18:47:17 +01003473 </sect1>
3474 <sect1>
3475 <title>Public constants</title>
Lukas Wunner156d7d42016-01-11 20:09:20 +01003476!Finclude/linux/vga_switcheroo.h vga_switcheroo_handler_flags_t
Lukas Wunner6648f482015-10-11 11:55:00 +02003477!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_id
3478!Finclude/linux/vga_switcheroo.h vga_switcheroo_state
Lukas Wunner3a848662016-01-02 18:47:17 +01003479 </sect1>
3480 <sect1>
3481 <title>Private structures</title>
Lukas Wunner6648f482015-10-11 11:55:00 +02003482!Fdrivers/gpu/vga/vga_switcheroo.c vgasr_priv
3483!Fdrivers/gpu/vga/vga_switcheroo.c vga_switcheroo_client
Lukas Wunner3a848662016-01-02 18:47:17 +01003484 </sect1>
Lukas Wunner6648f482015-10-11 11:55:00 +02003485 </chapter>
3486
Lukas Wunner3d7b75f2016-01-11 00:08:35 +01003487 <chapter id="handlers">
3488 <title>Handlers</title>
3489 <sect1>
3490 <title>apple-gmux Handler</title>
3491!Pdrivers/platform/x86/apple-gmux.c Overview
3492!Pdrivers/platform/x86/apple-gmux.c Interrupt
3493 <sect2>
3494 <title>Graphics mux</title>
3495!Pdrivers/platform/x86/apple-gmux.c Graphics mux
3496 </sect2>
3497 <sect2>
3498 <title>Power control</title>
3499!Pdrivers/platform/x86/apple-gmux.c Power control
3500 </sect2>
3501 <sect2>
3502 <title>Backlight control</title>
3503!Pdrivers/platform/x86/apple-gmux.c Backlight control
3504 </sect2>
Lukas Wunner24133062016-01-11 20:09:20 +01003505 <sect2>
3506 <title>Public functions</title>
3507!Iinclude/linux/apple-gmux.h
3508 </sect2>
Lukas Wunner3d7b75f2016-01-11 00:08:35 +01003509 </sect1>
Lukas Wunner6648f482015-10-11 11:55:00 +02003510 </chapter>
3511
3512!Cdrivers/gpu/vga/vga_switcheroo.c
3513!Cinclude/linux/vga_switcheroo.h
Lukas Wunner3d7b75f2016-01-11 00:08:35 +01003514!Cdrivers/platform/x86/apple-gmux.c
Lukas Wunner6648f482015-10-11 11:55:00 +02003515</part>
3516
Jesse Barnes2d2ef822009-10-26 13:06:31 -07003517</book>