| Maxime Ripard | 559482d | 2014-04-28 16:03:20 -0700 | [diff] [blame] | 1 | menuconfig ARCH_SUNXI |
| 2 | bool "Allwinner SoCs" if ARCH_MULTI_V7 |
| Maxime Ripard | 19a280a | 2013-05-12 15:06:51 +0200 | [diff] [blame] | 3 | select ARCH_REQUIRE_GPIOLIB |
| Maxime Ripard | 3b52634 | 2012-11-08 12:40:16 +0100 | [diff] [blame] | 4 | select CLKSRC_MMIO |
| Maxime Ripard | 3b52634 | 2012-11-08 12:40:16 +0100 | [diff] [blame] | 5 | select GENERIC_IRQ_CHIP |
| 6 | select PINCTRL |
| Maxime Ripard | b788bed | 2013-09-24 11:09:19 +0300 | [diff] [blame] | 7 | select PINCTRL_SUNXI |
| Maxime Ripard | 119fd63 | 2013-03-24 11:49:25 +0100 | [diff] [blame] | 8 | select SUN4I_TIMER |
| Maxime Ripard | 559482d | 2014-04-28 16:03:20 -0700 | [diff] [blame] | 9 | |
| 10 | if ARCH_SUNXI |
| 11 | |
| 12 | config MACH_SUN4I |
| 13 | bool "Allwinner A10 (sun4i) SoCs support" |
| 14 | default ARCH_SUNXI |
| 15 | |
| 16 | config MACH_SUN5I |
| 17 | bool "Allwinner A10s / A13 (sun5i) SoCs support" |
| 18 | default ARCH_SUNXI |
| Maxime Ripard | 6790554 | 2013-11-07 12:01:48 +0100 | [diff] [blame] | 19 | select SUN5I_HSTIMER |
| Maxime Ripard | 559482d | 2014-04-28 16:03:20 -0700 | [diff] [blame] | 20 | |
| 21 | config MACH_SUN6I |
| 22 | bool "Allwinner A31 (sun6i) SoCs support" |
| 23 | default ARCH_SUNXI |
| 24 | select ARCH_HAS_RESET_CONTROLLER |
| 25 | select ARM_GIC |
| Boris BREZILLON | 324da93 | 2014-05-15 10:55:13 +0200 | [diff] [blame^] | 26 | select MFD_SUN6I_PRCM |
| Maxime Ripard | 559482d | 2014-04-28 16:03:20 -0700 | [diff] [blame] | 27 | select RESET_CONTROLLER |
| 28 | select SUN5I_HSTIMER |
| 29 | |
| 30 | config MACH_SUN7I |
| 31 | bool "Allwinner A20 (sun7i) SoCs support" |
| 32 | default ARCH_SUNXI |
| 33 | select ARM_GIC |
| 34 | select ARM_PSCI |
| 35 | select HAVE_ARM_ARCH_TIMER |
| 36 | select SUN5I_HSTIMER |
| 37 | |
| 38 | endif |