| Andi Kleen | 7f47d8c | 2015-12-01 17:00:59 -0800 | [diff] [blame] | 1 | |
| 2 | The x86 kernel supports tracing most MSR (Model Specific Register) accesses. |
| 3 | To see the definition of the MSRs on Intel systems please see the SDM |
| 4 | at http://www.intel.com/sdm (Volume 3) |
| 5 | |
| 6 | Available trace points: |
| 7 | |
| 8 | /sys/kernel/debug/tracing/events/msr/ |
| 9 | |
| 10 | Trace MSR reads |
| 11 | |
| 12 | read_msr |
| 13 | |
| 14 | msr: MSR number |
| 15 | val: Value written |
| 16 | failed: 1 if the access failed, otherwise 0 |
| 17 | |
| 18 | |
| 19 | Trace MSR writes |
| 20 | |
| 21 | write_msr |
| 22 | |
| 23 | msr: MSR number |
| 24 | val: Value written |
| 25 | failed: 1 if the access failed, otherwise 0 |
| 26 | |
| 27 | |
| 28 | Trace RDPMC in kernel |
| 29 | |
| 30 | rdpmc |
| 31 | |
| 32 | The trace data can be post processed with the postprocess/decode_msr.py script |
| 33 | |
| 34 | cat /sys/kernel/debug/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h |
| 35 | |
| 36 | to add symbolic MSR names. |
| 37 | |