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Len Brown26717172010-03-08 14:07:30 -05001/*
2 * intel_idle.c - native hardware idle loop for modern Intel processors
3 *
Len Brownfab04b22013-11-09 00:30:17 -05004 * Copyright (c) 2013, Intel Corporation.
Len Brown26717172010-03-08 14:07:30 -05005 * Len Brown <len.brown@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21/*
22 * intel_idle is a cpuidle driver that loads on specific Intel processors
23 * in lieu of the legacy ACPI processor_idle driver. The intent is to
24 * make Linux more efficient on these processors, as intel_idle knows
25 * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
26 */
27
28/*
29 * Design Assumptions
30 *
31 * All CPUs have same idle states as boot CPU
32 *
33 * Chipset BM_STS (bus master status) bit is a NOP
34 * for preventing entry into deep C-stats
35 */
36
37/*
38 * Known limitations
39 *
40 * The driver currently initializes for_each_online_cpu() upon modprobe.
41 * It it unaware of subsequent processors hot-added to the system.
42 * This means that if you boot with maxcpus=n and later online
43 * processors above n, those processors will use C1 only.
44 *
45 * ACPI has a .suspend hack to turn off deep c-statees during suspend
46 * to avoid complications with the lapic timer workaround.
47 * Have not seen issues with suspend, but may need same workaround here.
48 *
49 * There is currently no kernel-based automatic probing/loading mechanism
50 * if the driver is built as a module.
51 */
52
53/* un-comment DEBUG to enable pr_debug() statements */
54#define DEBUG
55
56#include <linux/kernel.h>
57#include <linux/cpuidle.h>
58#include <linux/clockchips.h>
Len Brown26717172010-03-08 14:07:30 -050059#include <trace/events/power.h>
60#include <linux/sched.h>
Shaohua Li2a2d31c2011-01-10 09:38:12 +080061#include <linux/notifier.h>
62#include <linux/cpu.h>
Paul Gortmaker7c52d552011-05-27 12:33:10 -040063#include <linux/module.h>
Andi Kleenb66b8b92012-01-26 00:09:07 +010064#include <asm/cpu_device_id.h>
H. Peter Anvinbc83ccc2010-09-17 15:36:40 -070065#include <asm/mwait.h>
Len Brown14796fc2011-01-18 20:48:27 -050066#include <asm/msr.h>
Len Brown26717172010-03-08 14:07:30 -050067
68#define INTEL_IDLE_VERSION "0.4"
69#define PREFIX "intel_idle: "
70
Len Brown26717172010-03-08 14:07:30 -050071static struct cpuidle_driver intel_idle_driver = {
72 .name = "intel_idle",
73 .owner = THIS_MODULE,
74};
75/* intel_idle.max_cstate=0 disables driver */
Len Brown137ecc72013-02-01 21:35:35 -050076static int max_cstate = CPUIDLE_STATE_MAX - 1;
Len Brown26717172010-03-08 14:07:30 -050077
Len Brownc4236282010-05-28 02:22:03 -040078static unsigned int mwait_substates;
Len Brown26717172010-03-08 14:07:30 -050079
Shaohua Li2a2d31c2011-01-10 09:38:12 +080080#define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
Len Brown26717172010-03-08 14:07:30 -050081/* Reliable LAPIC Timer States, bit 1 for C1 etc. */
Len Brownd13780d2010-07-07 00:12:03 -040082static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */
Len Brown26717172010-03-08 14:07:30 -050083
Andi Kleenb66b8b92012-01-26 00:09:07 +010084struct idle_cpu {
85 struct cpuidle_state *state_table;
86
87 /*
88 * Hardware C-state auto-demotion may not always be optimal.
89 * Indicate which enable bits to clear here.
90 */
91 unsigned long auto_demotion_disable_flags;
Len Brown8c058d532014-07-31 15:21:24 -040092 bool byt_auto_demotion_disable_flag;
Len Brown32e95182013-02-02 01:31:56 -050093 bool disable_promotion_to_c1e;
Andi Kleenb66b8b92012-01-26 00:09:07 +010094};
95
96static const struct idle_cpu *icpu;
Namhyung Kim3265eba2010-08-08 03:10:03 +090097static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +053098static int intel_idle(struct cpuidle_device *dev,
99 struct cpuidle_driver *drv, int index);
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200100static int intel_idle_cpu_init(int cpu);
Len Brown26717172010-03-08 14:07:30 -0500101
102static struct cpuidle_state *cpuidle_state_table;
103
104/*
Len Brown956d0332011-01-12 02:51:20 -0500105 * Set this flag for states where the HW flushes the TLB for us
106 * and so we don't need cross-calls to keep it consistent.
107 * If this flag is set, SW flushes the TLB, so even if the
108 * HW doesn't do the flushing, this flag is safe to use.
109 */
110#define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
111
112/*
Len Brownb1beab42013-01-31 19:55:37 -0500113 * MWAIT takes an 8-bit "hint" in EAX "suggesting"
114 * the C-state (top nibble) and sub-state (bottom nibble)
115 * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc.
116 *
117 * We store the hint at the top of our "flags" for each state.
118 */
119#define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
120#define MWAIT2flg(eax) ((eax & 0xFF) << 24)
121
122/*
Len Brown26717172010-03-08 14:07:30 -0500123 * States are indexed by the cstate number,
124 * which is also the index into the MWAIT hint array.
125 * Thus C0 is a dummy.
126 */
Jiang Liuba0dc812014-01-09 15:30:26 +0800127static struct cpuidle_state nehalem_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500128 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100129 .name = "C1-NHM",
Len Brown26717172010-03-08 14:07:30 -0500130 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500131 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown26717172010-03-08 14:07:30 -0500132 .exit_latency = 3,
Len Brown26717172010-03-08 14:07:30 -0500133 .target_residency = 6,
134 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500135 {
Len Brown32e95182013-02-02 01:31:56 -0500136 .name = "C1E-NHM",
137 .desc = "MWAIT 0x01",
138 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
139 .exit_latency = 10,
140 .target_residency = 20,
141 .enter = &intel_idle },
142 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100143 .name = "C3-NHM",
Len Brown26717172010-03-08 14:07:30 -0500144 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500145 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500146 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500147 .target_residency = 80,
148 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500149 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100150 .name = "C6-NHM",
Len Brown26717172010-03-08 14:07:30 -0500151 .desc = "MWAIT 0x20",
Len Brownb1beab42013-01-31 19:55:37 -0500152 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500153 .exit_latency = 200,
Len Brown26717172010-03-08 14:07:30 -0500154 .target_residency = 800,
155 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500156 {
157 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500158};
159
Jiang Liuba0dc812014-01-09 15:30:26 +0800160static struct cpuidle_state snb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500161 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100162 .name = "C1-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400163 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500164 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown32e95182013-02-02 01:31:56 -0500165 .exit_latency = 2,
166 .target_residency = 2,
167 .enter = &intel_idle },
168 {
169 .name = "C1E-SNB",
170 .desc = "MWAIT 0x01",
171 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
172 .exit_latency = 10,
173 .target_residency = 20,
Len Brownd13780d2010-07-07 00:12:03 -0400174 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500175 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100176 .name = "C3-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400177 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500178 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400179 .exit_latency = 80,
Len Brownddbd5502010-12-13 18:28:22 -0500180 .target_residency = 211,
Len Brownd13780d2010-07-07 00:12:03 -0400181 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500182 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100183 .name = "C6-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400184 .desc = "MWAIT 0x20",
Len Brownb1beab42013-01-31 19:55:37 -0500185 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400186 .exit_latency = 104,
Len Brownddbd5502010-12-13 18:28:22 -0500187 .target_residency = 345,
Len Brownd13780d2010-07-07 00:12:03 -0400188 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500189 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100190 .name = "C7-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400191 .desc = "MWAIT 0x30",
Len Brownb1beab42013-01-31 19:55:37 -0500192 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400193 .exit_latency = 109,
Len Brownddbd5502010-12-13 18:28:22 -0500194 .target_residency = 345,
Len Brownd13780d2010-07-07 00:12:03 -0400195 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500196 {
197 .enter = NULL }
Len Brownd13780d2010-07-07 00:12:03 -0400198};
199
Len Brown718987d2014-02-14 02:30:00 -0500200static struct cpuidle_state byt_cstates[] = {
201 {
202 .name = "C1-BYT",
203 .desc = "MWAIT 0x00",
204 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
205 .exit_latency = 1,
206 .target_residency = 1,
207 .enter = &intel_idle },
208 {
209 .name = "C1E-BYT",
210 .desc = "MWAIT 0x01",
211 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
212 .exit_latency = 15,
213 .target_residency = 30,
214 .enter = &intel_idle },
215 {
216 .name = "C6N-BYT",
217 .desc = "MWAIT 0x58",
218 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
219 .exit_latency = 40,
220 .target_residency = 275,
221 .enter = &intel_idle },
222 {
223 .name = "C6S-BYT",
224 .desc = "MWAIT 0x52",
225 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
226 .exit_latency = 140,
227 .target_residency = 560,
228 .enter = &intel_idle },
229 {
230 .name = "C7-BYT",
231 .desc = "MWAIT 0x60",
232 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
233 .exit_latency = 1200,
234 .target_residency = 1500,
235 .enter = &intel_idle },
236 {
237 .name = "C7S-BYT",
238 .desc = "MWAIT 0x64",
239 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
240 .exit_latency = 10000,
241 .target_residency = 20000,
242 .enter = &intel_idle },
243 {
244 .enter = NULL }
245};
246
Jiang Liuba0dc812014-01-09 15:30:26 +0800247static struct cpuidle_state ivb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500248 {
Len Brown6edab082012-06-01 19:45:32 -0400249 .name = "C1-IVB",
250 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500251 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown6edab082012-06-01 19:45:32 -0400252 .exit_latency = 1,
253 .target_residency = 1,
254 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500255 {
Len Brown32e95182013-02-02 01:31:56 -0500256 .name = "C1E-IVB",
257 .desc = "MWAIT 0x01",
258 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
259 .exit_latency = 10,
260 .target_residency = 20,
261 .enter = &intel_idle },
262 {
Len Brown6edab082012-06-01 19:45:32 -0400263 .name = "C3-IVB",
264 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500265 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400266 .exit_latency = 59,
267 .target_residency = 156,
268 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500269 {
Len Brown6edab082012-06-01 19:45:32 -0400270 .name = "C6-IVB",
271 .desc = "MWAIT 0x20",
Len Brownb1beab42013-01-31 19:55:37 -0500272 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400273 .exit_latency = 80,
274 .target_residency = 300,
275 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500276 {
Len Brown6edab082012-06-01 19:45:32 -0400277 .name = "C7-IVB",
278 .desc = "MWAIT 0x30",
Len Brownb1beab42013-01-31 19:55:37 -0500279 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400280 .exit_latency = 87,
281 .target_residency = 300,
282 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500283 {
284 .enter = NULL }
Len Brown6edab082012-06-01 19:45:32 -0400285};
286
Len Brown0138d8f2014-04-04 01:21:07 -0400287static struct cpuidle_state ivt_cstates[] = {
288 {
289 .name = "C1-IVT",
290 .desc = "MWAIT 0x00",
291 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
292 .exit_latency = 1,
293 .target_residency = 1,
294 .enter = &intel_idle },
295 {
296 .name = "C1E-IVT",
297 .desc = "MWAIT 0x01",
298 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
299 .exit_latency = 10,
300 .target_residency = 80,
301 .enter = &intel_idle },
302 {
303 .name = "C3-IVT",
304 .desc = "MWAIT 0x10",
305 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
306 .exit_latency = 59,
307 .target_residency = 156,
308 .enter = &intel_idle },
309 {
310 .name = "C6-IVT",
311 .desc = "MWAIT 0x20",
312 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
313 .exit_latency = 82,
314 .target_residency = 300,
315 .enter = &intel_idle },
316 {
317 .enter = NULL }
318};
319
320static struct cpuidle_state ivt_cstates_4s[] = {
321 {
322 .name = "C1-IVT-4S",
323 .desc = "MWAIT 0x00",
324 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
325 .exit_latency = 1,
326 .target_residency = 1,
327 .enter = &intel_idle },
328 {
329 .name = "C1E-IVT-4S",
330 .desc = "MWAIT 0x01",
331 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
332 .exit_latency = 10,
333 .target_residency = 250,
334 .enter = &intel_idle },
335 {
336 .name = "C3-IVT-4S",
337 .desc = "MWAIT 0x10",
338 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
339 .exit_latency = 59,
340 .target_residency = 300,
341 .enter = &intel_idle },
342 {
343 .name = "C6-IVT-4S",
344 .desc = "MWAIT 0x20",
345 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
346 .exit_latency = 84,
347 .target_residency = 400,
348 .enter = &intel_idle },
349 {
350 .enter = NULL }
351};
352
353static struct cpuidle_state ivt_cstates_8s[] = {
354 {
355 .name = "C1-IVT-8S",
356 .desc = "MWAIT 0x00",
357 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
358 .exit_latency = 1,
359 .target_residency = 1,
360 .enter = &intel_idle },
361 {
362 .name = "C1E-IVT-8S",
363 .desc = "MWAIT 0x01",
364 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
365 .exit_latency = 10,
366 .target_residency = 500,
367 .enter = &intel_idle },
368 {
369 .name = "C3-IVT-8S",
370 .desc = "MWAIT 0x10",
371 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
372 .exit_latency = 59,
373 .target_residency = 600,
374 .enter = &intel_idle },
375 {
376 .name = "C6-IVT-8S",
377 .desc = "MWAIT 0x20",
378 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
379 .exit_latency = 88,
380 .target_residency = 700,
381 .enter = &intel_idle },
382 {
383 .enter = NULL }
384};
385
Jiang Liuba0dc812014-01-09 15:30:26 +0800386static struct cpuidle_state hsw_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500387 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500388 .name = "C1-HSW",
389 .desc = "MWAIT 0x00",
390 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
391 .exit_latency = 2,
392 .target_residency = 2,
393 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500394 {
Len Brown32e95182013-02-02 01:31:56 -0500395 .name = "C1E-HSW",
396 .desc = "MWAIT 0x01",
397 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
398 .exit_latency = 10,
399 .target_residency = 20,
400 .enter = &intel_idle },
401 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500402 .name = "C3-HSW",
403 .desc = "MWAIT 0x10",
404 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
405 .exit_latency = 33,
406 .target_residency = 100,
407 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500408 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500409 .name = "C6-HSW",
410 .desc = "MWAIT 0x20",
411 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
412 .exit_latency = 133,
413 .target_residency = 400,
414 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500415 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500416 .name = "C7s-HSW",
417 .desc = "MWAIT 0x32",
418 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
419 .exit_latency = 166,
420 .target_residency = 500,
421 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500422 {
Len Brown86239ce2013-02-27 13:18:50 -0500423 .name = "C8-HSW",
424 .desc = "MWAIT 0x40",
425 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
426 .exit_latency = 300,
427 .target_residency = 900,
428 .enter = &intel_idle },
429 {
430 .name = "C9-HSW",
431 .desc = "MWAIT 0x50",
432 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
433 .exit_latency = 600,
434 .target_residency = 1800,
435 .enter = &intel_idle },
436 {
437 .name = "C10-HSW",
438 .desc = "MWAIT 0x60",
439 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
440 .exit_latency = 2600,
441 .target_residency = 7700,
442 .enter = &intel_idle },
443 {
Len Browne022e7e2013-02-01 23:37:30 -0500444 .enter = NULL }
Len Brown85a4d2d2013-01-31 14:40:49 -0500445};
Len Browna138b562014-02-04 23:56:40 -0500446static struct cpuidle_state bdw_cstates[] = {
447 {
448 .name = "C1-BDW",
449 .desc = "MWAIT 0x00",
450 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
451 .exit_latency = 2,
452 .target_residency = 2,
453 .enter = &intel_idle },
454 {
455 .name = "C1E-BDW",
456 .desc = "MWAIT 0x01",
457 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
458 .exit_latency = 10,
459 .target_residency = 20,
460 .enter = &intel_idle },
461 {
462 .name = "C3-BDW",
463 .desc = "MWAIT 0x10",
464 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
465 .exit_latency = 40,
466 .target_residency = 100,
467 .enter = &intel_idle },
468 {
469 .name = "C6-BDW",
470 .desc = "MWAIT 0x20",
471 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
472 .exit_latency = 133,
473 .target_residency = 400,
474 .enter = &intel_idle },
475 {
476 .name = "C7s-BDW",
477 .desc = "MWAIT 0x32",
478 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
479 .exit_latency = 166,
480 .target_residency = 500,
481 .enter = &intel_idle },
482 {
483 .name = "C8-BDW",
484 .desc = "MWAIT 0x40",
485 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
486 .exit_latency = 300,
487 .target_residency = 900,
488 .enter = &intel_idle },
489 {
490 .name = "C9-BDW",
491 .desc = "MWAIT 0x50",
492 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
493 .exit_latency = 600,
494 .target_residency = 1800,
495 .enter = &intel_idle },
496 {
497 .name = "C10-BDW",
498 .desc = "MWAIT 0x60",
499 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
500 .exit_latency = 2600,
501 .target_residency = 7700,
502 .enter = &intel_idle },
503 {
504 .enter = NULL }
505};
Len Brown85a4d2d2013-01-31 14:40:49 -0500506
Jiang Liuba0dc812014-01-09 15:30:26 +0800507static struct cpuidle_state atom_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500508 {
Len Brown32e95182013-02-02 01:31:56 -0500509 .name = "C1E-ATM",
Len Brown26717172010-03-08 14:07:30 -0500510 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500511 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown32e95182013-02-02 01:31:56 -0500512 .exit_latency = 10,
513 .target_residency = 20,
Len Brown26717172010-03-08 14:07:30 -0500514 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500515 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100516 .name = "C2-ATM",
Len Brown26717172010-03-08 14:07:30 -0500517 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500518 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID,
Len Brown26717172010-03-08 14:07:30 -0500519 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500520 .target_residency = 80,
521 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500522 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100523 .name = "C4-ATM",
Len Brown26717172010-03-08 14:07:30 -0500524 .desc = "MWAIT 0x30",
Len Brownb1beab42013-01-31 19:55:37 -0500525 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500526 .exit_latency = 100,
Len Brown26717172010-03-08 14:07:30 -0500527 .target_residency = 400,
528 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500529 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100530 .name = "C6-ATM",
Len Brown7fcca7d2010-10-05 13:43:14 -0400531 .desc = "MWAIT 0x52",
Len Brownb1beab42013-01-31 19:55:37 -0500532 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown7fcca7d2010-10-05 13:43:14 -0400533 .exit_latency = 140,
Len Brown7fcca7d2010-10-05 13:43:14 -0400534 .target_residency = 560,
535 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500536 {
537 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500538};
Jiang Liu88390992014-01-09 15:30:27 +0800539static struct cpuidle_state avn_cstates[] = {
Len Brownfab04b22013-11-09 00:30:17 -0500540 {
541 .name = "C1-AVN",
542 .desc = "MWAIT 0x00",
543 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
544 .exit_latency = 2,
545 .target_residency = 2,
546 .enter = &intel_idle },
547 {
548 .name = "C6-AVN",
549 .desc = "MWAIT 0x51",
Bockholdt Arne22e580d2013-11-26 07:13:57 +0000550 .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownfab04b22013-11-09 00:30:17 -0500551 .exit_latency = 15,
552 .target_residency = 45,
553 .enter = &intel_idle },
Jiang Liu88390992014-01-09 15:30:27 +0800554 {
555 .enter = NULL }
Len Brownfab04b22013-11-09 00:30:17 -0500556};
Len Brown26717172010-03-08 14:07:30 -0500557
Len Brown26717172010-03-08 14:07:30 -0500558/**
559 * intel_idle
560 * @dev: cpuidle_device
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530561 * @drv: cpuidle driver
Deepthi Dharware978aa72011-10-28 16:20:09 +0530562 * @index: index of cpuidle state
Len Brown26717172010-03-08 14:07:30 -0500563 *
Yanmin Zhang63ff07b2012-01-10 15:48:21 -0800564 * Must be called under local_irq_disable().
Len Brown26717172010-03-08 14:07:30 -0500565 */
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530566static int intel_idle(struct cpuidle_device *dev,
567 struct cpuidle_driver *drv, int index)
Len Brown26717172010-03-08 14:07:30 -0500568{
569 unsigned long ecx = 1; /* break on interrupt flag */
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530570 struct cpuidle_state *state = &drv->states[index];
Len Brownb1beab42013-01-31 19:55:37 -0500571 unsigned long eax = flg2MWAIT(state->flags);
Len Brown26717172010-03-08 14:07:30 -0500572 unsigned int cstate;
Len Brown26717172010-03-08 14:07:30 -0500573 int cpu = smp_processor_id();
574
575 cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
576
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400577 /*
Len Brownc8381cc2010-10-15 20:43:06 -0400578 * leave_mm() to avoid costly and often unnecessary wakeups
579 * for flushing the user TLB's associated with the active mm.
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400580 */
Len Brownc8381cc2010-10-15 20:43:06 -0400581 if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400582 leave_mm(cpu);
583
Len Brown26717172010-03-08 14:07:30 -0500584 if (!(lapic_timer_reliable_states & (1 << (cstate))))
585 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
586
Peter Zijlstra16824252013-12-12 15:08:36 +0100587 mwait_idle_with_hints(eax, ecx);
Len Brown26717172010-03-08 14:07:30 -0500588
Len Brown26717172010-03-08 14:07:30 -0500589 if (!(lapic_timer_reliable_states & (1 << (cstate))))
590 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
591
Deepthi Dharware978aa72011-10-28 16:20:09 +0530592 return index;
Len Brown26717172010-03-08 14:07:30 -0500593}
594
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800595static void __setup_broadcast_timer(void *arg)
596{
597 unsigned long reason = (unsigned long)arg;
598 int cpu = smp_processor_id();
599
600 reason = reason ?
601 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
602
603 clockevents_notify(reason, &cpu);
604}
605
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200606static int cpu_hotplug_notify(struct notifier_block *n,
607 unsigned long action, void *hcpu)
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800608{
609 int hotcpu = (unsigned long)hcpu;
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200610 struct cpuidle_device *dev;
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800611
Prarit Bhargavae2401452013-10-23 09:44:51 -0400612 switch (action & ~CPU_TASKS_FROZEN) {
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800613 case CPU_ONLINE:
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200614
615 if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
616 smp_call_function_single(hotcpu, __setup_broadcast_timer,
617 (void *)true, 1);
618
619 /*
620 * Some systems can hotplug a cpu at runtime after
621 * the kernel has booted, we have to initialize the
622 * driver in this case
623 */
624 dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);
625 if (!dev->registered)
626 intel_idle_cpu_init(hotcpu);
627
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800628 break;
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800629 }
630 return NOTIFY_OK;
631}
632
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200633static struct notifier_block cpu_hotplug_notifier = {
634 .notifier_call = cpu_hotplug_notify,
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800635};
636
Len Brown14796fc2011-01-18 20:48:27 -0500637static void auto_demotion_disable(void *dummy)
638{
639 unsigned long long msr_bits;
640
641 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
Andi Kleenb66b8b92012-01-26 00:09:07 +0100642 msr_bits &= ~(icpu->auto_demotion_disable_flags);
Len Brown14796fc2011-01-18 20:48:27 -0500643 wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
644}
Len Brown32e95182013-02-02 01:31:56 -0500645static void c1e_promotion_disable(void *dummy)
646{
647 unsigned long long msr_bits;
648
649 rdmsrl(MSR_IA32_POWER_CTL, msr_bits);
650 msr_bits &= ~0x2;
651 wrmsrl(MSR_IA32_POWER_CTL, msr_bits);
652}
Len Brown14796fc2011-01-18 20:48:27 -0500653
Andi Kleenb66b8b92012-01-26 00:09:07 +0100654static const struct idle_cpu idle_cpu_nehalem = {
655 .state_table = nehalem_cstates,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100656 .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
Len Brown32e95182013-02-02 01:31:56 -0500657 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100658};
659
660static const struct idle_cpu idle_cpu_atom = {
661 .state_table = atom_cstates,
662};
663
664static const struct idle_cpu idle_cpu_lincroft = {
665 .state_table = atom_cstates,
666 .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
667};
668
669static const struct idle_cpu idle_cpu_snb = {
670 .state_table = snb_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500671 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100672};
673
Len Brown718987d2014-02-14 02:30:00 -0500674static const struct idle_cpu idle_cpu_byt = {
675 .state_table = byt_cstates,
676 .disable_promotion_to_c1e = true,
Len Brown8c058d532014-07-31 15:21:24 -0400677 .byt_auto_demotion_disable_flag = true,
Len Brown718987d2014-02-14 02:30:00 -0500678};
679
Len Brown6edab082012-06-01 19:45:32 -0400680static const struct idle_cpu idle_cpu_ivb = {
681 .state_table = ivb_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500682 .disable_promotion_to_c1e = true,
Len Brown6edab082012-06-01 19:45:32 -0400683};
684
Len Brown0138d8f2014-04-04 01:21:07 -0400685static const struct idle_cpu idle_cpu_ivt = {
686 .state_table = ivt_cstates,
687 .disable_promotion_to_c1e = true,
688};
689
Len Brown85a4d2d2013-01-31 14:40:49 -0500690static const struct idle_cpu idle_cpu_hsw = {
691 .state_table = hsw_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500692 .disable_promotion_to_c1e = true,
Len Brown85a4d2d2013-01-31 14:40:49 -0500693};
694
Len Browna138b562014-02-04 23:56:40 -0500695static const struct idle_cpu idle_cpu_bdw = {
696 .state_table = bdw_cstates,
697 .disable_promotion_to_c1e = true,
698};
699
Len Brownfab04b22013-11-09 00:30:17 -0500700static const struct idle_cpu idle_cpu_avn = {
701 .state_table = avn_cstates,
702 .disable_promotion_to_c1e = true,
703};
704
Andi Kleenb66b8b92012-01-26 00:09:07 +0100705#define ICPU(model, cpu) \
706 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
707
708static const struct x86_cpu_id intel_idle_ids[] = {
709 ICPU(0x1a, idle_cpu_nehalem),
710 ICPU(0x1e, idle_cpu_nehalem),
711 ICPU(0x1f, idle_cpu_nehalem),
Ben Hutchings8bf11932012-02-16 04:13:14 +0000712 ICPU(0x25, idle_cpu_nehalem),
713 ICPU(0x2c, idle_cpu_nehalem),
714 ICPU(0x2e, idle_cpu_nehalem),
Andi Kleenb66b8b92012-01-26 00:09:07 +0100715 ICPU(0x1c, idle_cpu_atom),
716 ICPU(0x26, idle_cpu_lincroft),
Ben Hutchings8bf11932012-02-16 04:13:14 +0000717 ICPU(0x2f, idle_cpu_nehalem),
Andi Kleenb66b8b92012-01-26 00:09:07 +0100718 ICPU(0x2a, idle_cpu_snb),
719 ICPU(0x2d, idle_cpu_snb),
Jan Kiszkaacead1b2014-01-25 22:24:22 +0100720 ICPU(0x36, idle_cpu_atom),
Len Brown718987d2014-02-14 02:30:00 -0500721 ICPU(0x37, idle_cpu_byt),
Len Brown6edab082012-06-01 19:45:32 -0400722 ICPU(0x3a, idle_cpu_ivb),
Len Brown0138d8f2014-04-04 01:21:07 -0400723 ICPU(0x3e, idle_cpu_ivt),
Len Brown85a4d2d2013-01-31 14:40:49 -0500724 ICPU(0x3c, idle_cpu_hsw),
725 ICPU(0x3f, idle_cpu_hsw),
726 ICPU(0x45, idle_cpu_hsw),
Len Brown0b158412013-03-15 10:55:31 -0400727 ICPU(0x46, idle_cpu_hsw),
Len Browna138b562014-02-04 23:56:40 -0500728 ICPU(0x4d, idle_cpu_avn),
729 ICPU(0x3d, idle_cpu_bdw),
730 ICPU(0x4f, idle_cpu_bdw),
731 ICPU(0x56, idle_cpu_bdw),
Andi Kleenb66b8b92012-01-26 00:09:07 +0100732 {}
733};
734MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
735
Len Brown26717172010-03-08 14:07:30 -0500736/*
737 * intel_idle_probe()
738 */
Bartlomiej Zolnierkiewicz00f3e752013-08-30 12:27:45 +0200739static int __init intel_idle_probe(void)
Len Brown26717172010-03-08 14:07:30 -0500740{
Len Brownc4236282010-05-28 02:22:03 -0400741 unsigned int eax, ebx, ecx;
Andi Kleenb66b8b92012-01-26 00:09:07 +0100742 const struct x86_cpu_id *id;
Len Brown26717172010-03-08 14:07:30 -0500743
744 if (max_cstate == 0) {
745 pr_debug(PREFIX "disabled\n");
746 return -EPERM;
747 }
748
Andi Kleenb66b8b92012-01-26 00:09:07 +0100749 id = x86_match_cpu(intel_idle_ids);
750 if (!id) {
751 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
752 boot_cpu_data.x86 == 6)
753 pr_debug(PREFIX "does not run on family %d model %d\n",
754 boot_cpu_data.x86, boot_cpu_data.x86_model);
Len Brown26717172010-03-08 14:07:30 -0500755 return -ENODEV;
Andi Kleenb66b8b92012-01-26 00:09:07 +0100756 }
Len Brown26717172010-03-08 14:07:30 -0500757
758 if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
759 return -ENODEV;
760
Len Brownc4236282010-05-28 02:22:03 -0400761 cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
Len Brown26717172010-03-08 14:07:30 -0500762
763 if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
Thomas Renninger5c2a9f02011-12-04 22:17:29 +0100764 !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
765 !mwait_substates)
Len Brown26717172010-03-08 14:07:30 -0500766 return -ENODEV;
Len Brown26717172010-03-08 14:07:30 -0500767
Len Brownc4236282010-05-28 02:22:03 -0400768 pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
Len Brown26717172010-03-08 14:07:30 -0500769
Andi Kleenb66b8b92012-01-26 00:09:07 +0100770 icpu = (const struct idle_cpu *)id->driver_data;
771 cpuidle_state_table = icpu->state_table;
Len Brown26717172010-03-08 14:07:30 -0500772
Len Brown56b9aea2010-12-02 01:19:32 -0500773 if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800774 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200775 else
Shaohua Li39a74fd2012-01-10 15:48:19 -0800776 on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200777
Len Brown26717172010-03-08 14:07:30 -0500778 pr_debug(PREFIX "v" INTEL_IDLE_VERSION
779 " model 0x%X\n", boot_cpu_data.x86_model);
780
781 pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
782 lapic_timer_reliable_states);
783 return 0;
784}
785
786/*
787 * intel_idle_cpuidle_devices_uninit()
788 * unregister, free cpuidle_devices
789 */
790static void intel_idle_cpuidle_devices_uninit(void)
791{
792 int i;
793 struct cpuidle_device *dev;
794
795 for_each_online_cpu(i) {
796 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
797 cpuidle_unregister_device(dev);
798 }
799
800 free_percpu(intel_idle_cpuidle_devices);
801 return;
802}
Len Brown0138d8f2014-04-04 01:21:07 -0400803
804/*
805 * intel_idle_state_table_update()
806 *
807 * Update the default state_table for this CPU-id
808 *
809 * Currently used to access tuned IVT multi-socket targets
810 * Assumption: num_sockets == (max_package_num + 1)
811 */
812void intel_idle_state_table_update(void)
813{
814 /* IVT uses a different table for 1-2, 3-4, and > 4 sockets */
815 if (boot_cpu_data.x86_model == 0x3e) { /* IVT */
816 int cpu, package_num, num_sockets = 1;
817
818 for_each_online_cpu(cpu) {
819 package_num = topology_physical_package_id(cpu);
820 if (package_num + 1 > num_sockets) {
821 num_sockets = package_num + 1;
822
Christoph Jaegerd27dca42014-04-12 19:57:30 +0200823 if (num_sockets > 4) {
Len Brown0138d8f2014-04-04 01:21:07 -0400824 cpuidle_state_table = ivt_cstates_8s;
825 return;
Christoph Jaegerd27dca42014-04-12 19:57:30 +0200826 }
Len Brown0138d8f2014-04-04 01:21:07 -0400827 }
828 }
829
830 if (num_sockets > 2)
831 cpuidle_state_table = ivt_cstates_4s;
832 /* else, 1 and 2 socket systems use default ivt_cstates */
833 }
834 return;
835}
836
Len Brown26717172010-03-08 14:07:30 -0500837/*
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530838 * intel_idle_cpuidle_driver_init()
839 * allocate, initialize cpuidle_states
840 */
Bartlomiej Zolnierkiewicz00f3e752013-08-30 12:27:45 +0200841static int __init intel_idle_cpuidle_driver_init(void)
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530842{
843 int cstate;
844 struct cpuidle_driver *drv = &intel_idle_driver;
845
Len Brown0138d8f2014-04-04 01:21:07 -0400846 intel_idle_state_table_update();
847
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530848 drv->state_count = 1;
849
Len Browne022e7e2013-02-01 23:37:30 -0500850 for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) {
Len Brown24bfa952014-02-14 00:50:34 -0500851 int num_substates, mwait_hint, mwait_cstate;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530852
Len Browne022e7e2013-02-01 23:37:30 -0500853 if (cpuidle_state_table[cstate].enter == NULL)
854 break;
855
856 if (cstate + 1 > max_cstate) {
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530857 printk(PREFIX "max_cstate %d reached\n",
858 max_cstate);
859 break;
860 }
861
Len Browne022e7e2013-02-01 23:37:30 -0500862 mwait_hint = flg2MWAIT(cpuidle_state_table[cstate].flags);
863 mwait_cstate = MWAIT_HINT2CSTATE(mwait_hint);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530864
Len Brown24bfa952014-02-14 00:50:34 -0500865 /* number of sub-states for this state in CPUID.MWAIT */
Len Browne022e7e2013-02-01 23:37:30 -0500866 num_substates = (mwait_substates >> ((mwait_cstate + 1) * 4))
867 & MWAIT_SUBSTATE_MASK;
868
Len Brown24bfa952014-02-14 00:50:34 -0500869 /* if NO sub-states for this state in CPUID, skip it */
870 if (num_substates == 0)
Len Browne022e7e2013-02-01 23:37:30 -0500871 continue;
872
873 if (((mwait_cstate + 1) > 2) &&
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530874 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
875 mark_tsc_unstable("TSC halts in idle"
876 " states deeper than C2");
877
878 drv->states[drv->state_count] = /* structure copy */
879 cpuidle_state_table[cstate];
880
881 drv->state_count += 1;
882 }
883
Andi Kleenb66b8b92012-01-26 00:09:07 +0100884 if (icpu->auto_demotion_disable_flags)
Shaohua Li39a74fd2012-01-10 15:48:19 -0800885 on_each_cpu(auto_demotion_disable, NULL, 1);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530886
Len Brown8c058d532014-07-31 15:21:24 -0400887 if (icpu->byt_auto_demotion_disable_flag) {
888 wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
889 wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
890 }
891
Len Brown32e95182013-02-02 01:31:56 -0500892 if (icpu->disable_promotion_to_c1e) /* each-cpu is redundant */
893 on_each_cpu(c1e_promotion_disable, NULL, 1);
894
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530895 return 0;
896}
897
898
899/*
Thomas Renninger65b7f832012-01-17 22:40:08 +0100900 * intel_idle_cpu_init()
Len Brown26717172010-03-08 14:07:30 -0500901 * allocate, initialize, register cpuidle_devices
Thomas Renninger65b7f832012-01-17 22:40:08 +0100902 * @cpu: cpu/core to initialize
Len Brown26717172010-03-08 14:07:30 -0500903 */
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200904static int intel_idle_cpu_init(int cpu)
Len Brown26717172010-03-08 14:07:30 -0500905{
Len Brown26717172010-03-08 14:07:30 -0500906 struct cpuidle_device *dev;
907
Thomas Renninger65b7f832012-01-17 22:40:08 +0100908 dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
Len Brown26717172010-03-08 14:07:30 -0500909
Thomas Renninger65b7f832012-01-17 22:40:08 +0100910 dev->cpu = cpu;
Len Brown26717172010-03-08 14:07:30 -0500911
Thomas Renninger65b7f832012-01-17 22:40:08 +0100912 if (cpuidle_register_device(dev)) {
913 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
914 intel_idle_cpuidle_devices_uninit();
915 return -EIO;
Len Brown26717172010-03-08 14:07:30 -0500916 }
917
Andi Kleenb66b8b92012-01-26 00:09:07 +0100918 if (icpu->auto_demotion_disable_flags)
Thomas Renninger65b7f832012-01-17 22:40:08 +0100919 smp_call_function_single(cpu, auto_demotion_disable, NULL, 1);
920
Bartlomiej Zolnierkiewiczdbf87ab2013-12-20 19:47:28 +0100921 if (icpu->disable_promotion_to_c1e)
922 smp_call_function_single(cpu, c1e_promotion_disable, NULL, 1);
923
Len Brown26717172010-03-08 14:07:30 -0500924 return 0;
925}
Len Brown26717172010-03-08 14:07:30 -0500926
927static int __init intel_idle_init(void)
928{
Thomas Renninger65b7f832012-01-17 22:40:08 +0100929 int retval, i;
Len Brown26717172010-03-08 14:07:30 -0500930
Thomas Renningerd1896042010-11-03 17:06:14 +0100931 /* Do not load intel_idle at all for now if idle= is passed */
932 if (boot_option_idle_override != IDLE_NO_OVERRIDE)
933 return -ENODEV;
934
Len Brown26717172010-03-08 14:07:30 -0500935 retval = intel_idle_probe();
936 if (retval)
937 return retval;
938
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530939 intel_idle_cpuidle_driver_init();
Len Brown26717172010-03-08 14:07:30 -0500940 retval = cpuidle_register_driver(&intel_idle_driver);
941 if (retval) {
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +0200942 struct cpuidle_driver *drv = cpuidle_get_driver();
Len Brown26717172010-03-08 14:07:30 -0500943 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +0200944 drv ? drv->name : "none");
Len Brown26717172010-03-08 14:07:30 -0500945 return retval;
946 }
947
Thomas Renninger65b7f832012-01-17 22:40:08 +0100948 intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
949 if (intel_idle_cpuidle_devices == NULL)
950 return -ENOMEM;
951
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530952 cpu_notifier_register_begin();
953
Thomas Renninger65b7f832012-01-17 22:40:08 +0100954 for_each_online_cpu(i) {
955 retval = intel_idle_cpu_init(i);
956 if (retval) {
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530957 cpu_notifier_register_done();
Thomas Renninger65b7f832012-01-17 22:40:08 +0100958 cpuidle_unregister_driver(&intel_idle_driver);
959 return retval;
960 }
Len Brown26717172010-03-08 14:07:30 -0500961 }
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530962 __register_cpu_notifier(&cpu_hotplug_notifier);
963
964 cpu_notifier_register_done();
Len Brown26717172010-03-08 14:07:30 -0500965
966 return 0;
967}
968
969static void __exit intel_idle_exit(void)
970{
971 intel_idle_cpuidle_devices_uninit();
972 cpuidle_unregister_driver(&intel_idle_driver);
973
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530974 cpu_notifier_register_begin();
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200975
976 if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
Shaohua Li39a74fd2012-01-10 15:48:19 -0800977 on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530978 __unregister_cpu_notifier(&cpu_hotplug_notifier);
979
980 cpu_notifier_register_done();
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800981
Len Brown26717172010-03-08 14:07:30 -0500982 return;
983}
984
985module_init(intel_idle_init);
986module_exit(intel_idle_exit);
987
Len Brown26717172010-03-08 14:07:30 -0500988module_param(max_cstate, int, 0444);
Len Brown26717172010-03-08 14:07:30 -0500989
990MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
991MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);
992MODULE_LICENSE("GPL");